JP2516902B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] When sensitivity correction of a light-receiving element that constitutes a solid-state imaging device is executed by an operation of (P−P _L ) / (P _H −P _L ), a sensitivity near the center of distribution is obtained. By setting the gain correction coefficient (∝1 / (P _H −P _L )) set in binary so that the element is appropriately corrected, the number of bits is set to be smaller by 1 to several bits, or When the correction calculation is executed, the correction coefficient is shifted to the decreasing side so that the optimum correction is performed on the pixel located at the center of the frequency distribution. In the shift at the time of calculation, the shift amount is set based on visual judgment so that the display image can be seen most easily.

When a pixel having unnatural display brightness is generated by the above process, measures such as a replacement process using data of an adjacent pixel are taken.

[Industrial applications]

The present invention relates to a solid-state image pickup device, and more particularly to improvement of a method of correcting image display data thereof.

An image pickup device divides an optical image into a large number of pixels and processes the data, but it is necessary to correct characteristic variations between the pixels in order to obtain a high-quality image signal. Although various correction methods have been conventionally proposed, there is still a strong demand for more effective correction.

[Conventional technology]

In a solid-state imaging device, a photoelectric conversion element such as a photovoltaic type, a photoconductive type, or a MIS type is usually arranged in each pixel area of a light receiving surface, and an electric signal generated by these photoelectric conversion elements is converted into a CC signal.
Time-sequentially multiplexed and detected by a charge transfer device such as D,
The sampled and digitally converted signal values are corrected appropriately and displayed on the display device.

The correction is divided into a defective pixel correction in which a defective pixel having no sensitivity is replaced with data of another pixel, and a correction of variation in sensitivity between pixels.

The former defective pixel correction is performed, for example, as shown in FIG.
When the pixel X is a defective pixel having no sensitivity among the pixels arranged two-dimensionally, the display value of the pixel X is obtained by appropriately selecting and processing from the data of the eight pixels adjacent to this pixel X. is there.

This defective pixel correction is performed by the circuit configuration as shown in the block diagram of FIG. 2B, for example. That is, when this correction function is not provided, each pixel data recorded in the frame memory 21 is sent to the display device 23 via the driver 22 by the read address signal of the synchronization signal generator 24, whereas In the pixel correction operation, the address conversion memory 25 in which the addresses of the pixels that need to be converted are recorded is provided, and for example, the address signal for reading the pixel X is converted into the address of the normal pixel 3.

The latter sensitivity variation correction is usually performed before the defective pixel correction, and is generally performed by the following arithmetic expression.

(P−P _L ) / (P _H −P _L ) ... (1) where P is the output when the target object is imaged, P _L is the output when the reference target with a small incident light amount is imaged, and P _H is This is an output when a reference target with a large incident light amount is imaged.

This sensitivity variation correction is divided into an offset correction corresponding to the numerator of the above equation (1) and a gain correction corresponding to the denominator. The offset correction is a correction of the variation of the DC component irrelevant to the amount of incident light, and the gain correction is a correction of the ratio of the change amount of the output to the change amount of the incident light. These corrections, as shown in the block diagram in FIG.
The offset correction and the gain correction are performed in this order.

That is, the offset correction value of each pixel is prepared in the offset memory 28, and the same gain correction coefficient is prepared in the gain memory 29, and the offset correction value and the gain correction coefficient are respectively added to and multiplied with the image data. 26 is an adder, 27
Is a multiplier. As easily estimated from equation (1),
Offset correction value -P _L, the gain correction coefficient 1 / (P _H -
It is set by multiplying P _L ) with an appropriate constant.

 A conventional example of such arithmetic processing will be described with reference to FIG.

Although three types of diagrams are drawn in the D line in the figure, these represent 8-bit, 15-bit, and 16-bit binary numbers in order from the left. First, looking at the columns labeled with gain, this 8-bit numerical group (displayed in 8 rows) represents the gain set to 256 gradations, and the top row is represented by only 1 bit. The lowest two gradations are shown as representative of the four gradations that require 2 bits in the next row and the eight gradations that require three bits in the next row.
The following rows have the same meaning, and the eighth row represents 256 gradations that require 8 bits, and the maximum value of gain is included here. 0,1 written in these binary cells indicates that the digit is 0,1 and * and x are either 0 or 1, and x is the least significant digit. The position of the digit is shown.

For these gains, a gain correction coefficient calculated from the reciprocal of the gain is displayed in a 15-digit binary number, which is a group of 15-bit numbers placed in the gain correction coefficient column. If the gain is small, the reciprocal of the gain correction coefficient is large, so the top row is a number expressed using 15 bits fully. The numerical value becomes smaller as moving to the lower line, the number of required bits is reduced, and the lowermost line becomes an 8-digit binary number.

The rightmost 16-bit number indicates the result of correcting the pixel data using the correction coefficient. In the case of P = P _H , this operation is the product of the numbers in the two columns on the left side, and therefore, in the following description, this case is represented as a matter of convenience. Since the calculation result is originally a calculation for correcting the unevenness of the gain, it has a uniform number of digits. Also, looking at the number of significant digits, this is the same as the smaller number of significant digits out of the two numbers multiplied, so the top line is one significant digit, and the digits below are one digit at a time. As a result, the bottom line has 8 significant digits.

This means that the smaller the gain, the higher the possibility that the correction will be inappropriate. In normal pixel display, it is said that the observer's rejection reaction is strong with respect to pixels with brightness higher than the normal value, and if the correction may not be appropriate, it is easier to see if it is suppressed to the low brightness side. Becomes

From this viewpoint, a method of conservatively correcting low-gain pixels has been proposed. This second conventional example is shown by three kinds of binary numbers in line E of FIG. This will be described below. In addition,
In the binary numbers used in the following description, * is omitted, and the digit indicated by a blank cell is 1 or 0.

Here, the content of the gain at the left end is the same as in the D row. The central gain correction coefficient is a value calculated as a 15-bit binary number and rounded to cut off the upper 3 bits. In this rounding process, the maximum number of 12 digits is set for those having significant digits exceeding 12 digits, and the other 3 bits are simply truncated. In this way, a 12-bit correction coefficient as shown in the center of row E is prepared.

The calculation result using this correction coefficient is shown at the right end. The fourth and subsequent rows from the top have the same results as in the first conventional technique, but the number of bits is reduced and the numerical values are small in the three rows on the low gain side. That is, the correction result of the low-gain pixel is suppressed to be lower than that corrected by the first conventional technique, and the luminance is not too high, and an annoying pixel does not occur. In this correction example, in an extreme case, the pixel whose brightness drops to 1/8 comes out, but the number of such low-gain pixels is very small, and some pixels are replaced as defective pixels. Overall, the image quality is greatly improved. The second conventional example is disclosed in JP-A-59-72.
No. 163 is disclosed.

[Problems to be solved by the invention]

In the above-described conventional technique, it is considered that there is little occurrence of inconvenience in a high gain pixel, and no special processing is performed. However, in the case of an actual imaging device, pixels with extremely high sensitivity may appear beyond the theoretical sensitivity. In that case, if the sensitivity of other pixels has a frequency distribution close to the normal distribution, the distribution center is Apparently it shifts to the low sensitivity side. As an extreme example, when the correction processing is performed by the correction coefficient whose low gain side is rounded to a wide range as shown in the row A of FIG. 1, the correction result is unsuitable for many pixels having a gain near the distribution center. Therefore, the displayed image has extremely low fidelity.

An object of the present invention is to provide a sensitivity correction method for a solid-state imaging device that enables high-quality image display by performing the most effective sensitivity correction under the constraint of hardware and software functions. To be more specific, a processing method that causes a gain memory with a limited number of digits to function as if the number of digits increased and appropriately corrects the sensitivity of pixels having sensitivity close to the center of distribution is provided. Is to provide.

[Means for solving problems]

The above-mentioned problem is a method of correcting a sensitivity difference between the light receiving elements of a solid-state image pickup device in which a plurality of light receiving elements are arranged. In the sensitivity correction method that multiplies the gain correction coefficient set individually according to the reciprocal of, to output the image, m and n are both natural numbers and m> n, and n-bit binary number The correction coefficient omits the upper (m−n) bits from the numerical value calculated as a maximum m-bit binary number, and replaces it with the maximum number when the number of significant digits decreases by the omission. In the light receiving element included in the central part of the gain frequency distribution of the light receiving element, the number of significant digits of the correction coefficient does not exceed n. Of the solid-state image pickup device characterized in that the value is set A sensitivity correction method, or in the sensitivity correction method of the above solid-state imaging device,
M so that the number of significant figures of the correction coefficient does not exceed n
The process corresponding to the process of setting the value of is such that when the multiplication process is performed using the correction coefficient, k is a natural number, and the correction coefficient is shifted by k bits, so that the correction coefficient is effectively 2 ^The problem can also be solved by a sensitivity correction method for a solid-state imaging device, which is a process of multiplying by ^-k .

[Action]

In the sensitivity correction method of the present invention, in the output correction of the low-sensitivity light receiving element, the excessive high brightness of the pixel is suppressed by adopting the correction coefficient in which the upper bits in the problem solving means are omitted, and further, the abnormal high Incorrect correction problem that occurs due to the presence of a sensitive light receiving element, that is, the sensitivity correction of the light receiving element located near the median value of the frequency distribution of gain is the rounding processing of the correction coefficient for low sensitivity elements. With respect to the problem to be included, in the invention of claim 1, the number of significant figures of the sensitivity correction coefficient is reduced so that the correction coefficient of the light receiving element in question is the target of the rounding process. In the invention of claim 2, the problem is solved by shifting the sensitivity correction coefficient and performing the multiplication process to effectively reduce the number of significant figures of the sensitivity correction coefficient. Photo detector Correction coefficient is prevented from becoming subject to rounding.

As a result, it is possible to obtain a high-quality image even when there is a low-sensitivity light receiving element or an abnormally high-sensitivity light receiving element by the correction processing using the standard hardware configuration and the sensitivity correction coefficient calculated as standard. Become.

〔Example〕

The problems and embodiments of the present invention will be described with reference to FIG. The line A in the figure is an explanation of the problems that occur in the second conventional example, the line B in the figure is an explanation illustrating the correction processing in the first embodiment of the present invention, and the line C in the figure is the explanation. It is the explanation which illustrates the correction processing in the 2nd example of the invention. Also,
FIG. 5 is a block diagram of an apparatus for executing the processing of the second embodiment, and this drawing will be referred to as needed.

In both embodiments of the present invention, the gain is set to 10 bits (1024 gradations), the gain correction coefficient is set to 12 bits, and the gain correction calculation result is output in 16 bits. Curves showing the number of light receiving elements corresponding to the gain values are drawn in the columns labeled with the gain distribution in the rows A to C of FIG. This drawing is drawn on a linear scale to show the average frequency distribution, and it does not exactly match the scale that divides the gain and gain correction coefficient into multiple lines, but it is expressed in this way for convenience. There is.

As shown in line A of the figure, when the gain correction coefficient applied to the high gain pixel including the maximum gain is set to 10 bits and the maximum side of the gain correction coefficient is rounded to 12 bits, the gain becomes 8 Pixels on the high gain side of up to 10 bits are accurately corrected, but pixels with a gain represented by less bits are corrected with suppressed brightness. By comparing this with the gain distribution curve, it can be seen that appropriate correction is not performed for most of the pixels distributed in the vicinity of the median value.

In order to cope with such a situation, in the first embodiment, the number of bits of the correction coefficient for the highest gain pixel is reduced to 7 as shown in the line B of FIG. 1 for processing. As is apparent at first glance, the range in which proper correction is performed is expanded to the low-gain pixel side, and as a result, most pixels are accurately gain-corrected.

Note that in this process, the number of significant digits in the product of binary numbers is the same as the minimum number of significant digits of the numbers involved, so if the number of significant digits of the correction coefficient is extremely reduced, the correction result Is an inaccurate point. For example, in the example of the line B of FIG. 1, the number of significant figures of the correction calculation result of the portion including the highest gain pixel is reduced to 7 digits. Therefore, when the number of bits of the correction coefficient is set from the viewpoint of frequency distribution, it should be considered that the correction of the highest gain pixel is performed by the replacement process.

Generally speaking, when a target of standard illuminance is imaged by an image pickup device and a correction coefficient is obtained from the data, the number of significant digits of the correction coefficient is changed for each image pickup device in order not to complicate the calculation program. I want to avoid doing it. In the second embodiment, the correction coefficient obtained by the standard setting is used to perform the processing that produces substantially the same effect as that obtained by reducing the number of significant figures.

In this embodiment, the device shown in the block diagram of FIG. 5 is used. The structure of this device is such that a shift register 30 is added to the structure of FIG. The correction coefficient obtained by the standard calculation method is stored in the gain memory as it is, and the correction coefficient read from the gain memory when the gain correction operation is executed is shifted to the right by k bits by this shift register and then multiplied. Input to the device.
In the case of binary numbers, shifting to the right by k bits means 1/2 ^k times, and protruding from k bits means truncating the lowest k digits.

In FIG. 5, the gain correction coefficient output from the gain memory 29 is shifted to the k-bit decreasing side by the shift register and input to the multiplier 27. Therefore, the effective number of the gain correction coefficient is reduced by k bits. The same operation result as is output from the multiplier. It is convenient to set the number of bits k to be shifted to an optimum value while viewing the actually corrected image. Therefore, it is desirable that the shift register be configured so that the number of shift bits can be designated from the outside.

The row C in FIG. 1 illustrates a case where the operation is performed by shifting by 1 bit. Explaining the gain correction coefficient, the contents stored in the gain memory are obtained according to a standardly set formula, and the rounding process is not performed. Here, in order to indicate that the least significant 1 bit is truncated during arithmetic operation and the least significant 1 bit is truncated, the rightmost 1 bit is drawn with a dotted line, and x, which represents the least significant digit of the significant figure, moves to the next adjacent bit on the left. ing. Further, on the low gain side, rounding processing is performed on the 12-bit correction coefficient after shifting. That is, those having 1 in the higher-order bit are replaced with the maximum number of 12 bits, and this is input to the multiplier.

The result of the above correction calculation is shown at the right end of the figure. It can be seen that, in the pixels located near the center of the distribution, a larger number of pixels are accurately corrected as compared with the processing in row B. On the other hand, with respect to the pixel having the highest gain, the number of significant figures of the applied correction coefficient is reduced and the accuracy is deteriorated. If the accuracy of the correction deteriorates with such a high-gain pixel, there is a greater risk that the brightness will become excessively high.
For this type of pixel, it is desirable to perform the replacement process using the data of the adjacent pixel, and thereby a higher quality image can be obtained.

〔The invention's effect〕

As described above, according to the present invention, in a solid-state imaging device of a given scale, it is possible to easily obtain an appropriate correction result for a pixel having a gain value with the highest appearance frequency, and to obtain a favorable result without a peculiar pixel. An image is obtained.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the effect of the present invention by an embodiment, FIG. 2 (a) is a schematic diagram of defective pixel correction, FIG. 2 (b) is a block diagram of defective pixel correction, and FIG. 3 is sensitivity variation. FIG. 4 is a block diagram of correction, FIG. 4 is a diagram showing an example of a conventional gain correction method, and FIG. 5 is a block diagram showing an apparatus for carrying out the present invention.

Claims (2)

(57) [Claims] 1. A method of correcting a sensitivity difference between light-receiving elements of a solid-state image pickup device comprising a plurality of light-receiving elements arranged, wherein each image pickup output of the light-receiving element has a gain of each light-receiving element. In the sensitivity correction method that multiplies the gain correction coefficient set individually according to the reciprocal of, to output the image, m and n are both natural numbers and m> n, and n-bit binary number This correction coefficient omits the upper (m−n) bits from the numerical value calculated as a maximum m-bit binary number and replaces it with the maximum number when the number of significant digits decreases by the abbreviation. In the light receiving element included in the central portion of the gain frequency distribution of the light receiving element, the number of significant figures of the correction coefficient is n.
A method for correcting the sensitivity of a solid-state image pickup device, wherein the value of m is set so as not to exceed. 2. A method of correcting the sensitivity of a solid-state image pickup device according to claim 1, further comprising the step of setting a value of m so that the number of significant digits of the correction coefficient does not exceed n. Correspondingly, when carrying out the multiplication process using the correction coefficient,
A sensitivity correction method for a solid-state imaging device, characterized in that k is a natural number, and the correction coefficient is effectively shifted by 2 ^-k times by shifting the correction coefficient by k bits.