JP2016103502A - 配線基板及びその製造方法と電子部品装置 - Google Patents
配線基板及びその製造方法と電子部品装置 Download PDFInfo
- Publication number
- JP2016103502A JP2016103502A JP2014239557A JP2014239557A JP2016103502A JP 2016103502 A JP2016103502 A JP 2016103502A JP 2014239557 A JP2014239557 A JP 2014239557A JP 2014239557 A JP2014239557 A JP 2014239557A JP 2016103502 A JP2016103502 A JP 2016103502A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- electrode pad
- component mounting
- pad
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 229920005989 resin Polymers 0.000 claims description 32
- 239000011347 resin Substances 0.000 claims description 32
- 229910052751 metal Inorganic materials 0.000 claims description 29
- 239000002184 metal Substances 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 20
- 239000011888 foil Substances 0.000 claims description 11
- 238000000059 patterning Methods 0.000 claims description 8
- 230000000149 penetrating effect Effects 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 44
- 238000007747 plating Methods 0.000 description 42
- 229920001721 polyimide Polymers 0.000 description 39
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 34
- 229910000679 solder Inorganic materials 0.000 description 32
- 239000011889 copper foil Substances 0.000 description 29
- 239000010931 gold Substances 0.000 description 22
- 239000000758 substrate Substances 0.000 description 19
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 17
- 229910052737 gold Inorganic materials 0.000 description 17
- 239000010949 copper Substances 0.000 description 16
- 229910052802 copper Inorganic materials 0.000 description 15
- 229910052759 nickel Inorganic materials 0.000 description 15
- 238000012986 modification Methods 0.000 description 12
- 230000004048 modification Effects 0.000 description 12
- 238000007789 sealing Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 230000001681 protective effect Effects 0.000 description 8
- 239000003990 capacitor Substances 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000007864 aqueous solution Substances 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229960003280 cupric chloride Drugs 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 230000037303 wrinkles Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4828—Etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49558—Insulating layers on lead frames, e.g. bridging members
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
を有する配線基板の製造方法が提供される。
図2〜図14は第1実施形態の配線基板及び電子部品装置を説明するための図である。以下、配線基板及び電子部品装置の製造方法を説明しながら、配線基板及び電子部品装置の構造について説明する。
図17〜図20は第2実施形態に配線基板及び電子部品装置を説明するための図である。
図21〜図23は第3実施形態の配線基板及び電子部品装置を説明するための図である。
Claims (11)
- 電子部品搭載パッドと、
前記電子部品搭載パッドの外側に配置された電極パッドと、
前記電子部品搭載パッド及び前記電極パッドの上に形成された第1絶縁層と、
前記電子部品搭載パッド上の前記第1絶縁層に形成された開口部と、
前記電極パッド上の前記第1絶縁層に形成された接続ホールと、
前記開口部内の電子部品搭載パッド及び前記接続ホール内の電極パッドにそれぞれ形成された凹部と
を有することを特徴とする配線基板。 - 電極パッドと、
前記電極パッドの上に形成された第1絶縁層と、
前記電極パッド上の前記第1絶縁層に形成された接続ホールと、
前記接続ホール内の電極パッドに形成された凹部と
を有することを特徴とする配線基板。 - 前記電子部品搭載パッド及び前記電極パッドの下に形成された第2絶縁層と、
前記電極パッド下の前記第2絶縁層に形成された開口部とを有し、
前記第2絶縁層の開口部内の前記電極パッドに凹部が形成されていることを特徴とする請求項1に記載の配線基板。 - 前記電子部品搭載パッド及び前記電極パッドは、金属箔から形成されることを特徴とする請求項1に記載の配線基板。
- 前記第1絶縁層は、樹脂フィルムであることを特徴とする請求項1又は2に記載の配線基板。
- 電子部品搭載パッドと、
前記電子部品搭載パッドの外側に配置された電極パッドと、
前記電子部品搭載パッド及び前記電極パッドの上に形成された第1絶縁層と、
前記電子部品搭載パッド上の前記第1絶縁層に形成された開口部と、
前記電極パッド上の前記第1絶縁層に形成された接続ホールと、
前記開口部内の電子部品搭載パッド及び前記接続ホール内の電極パッドにそれぞれ形成された凹部と、
前記電子部品搭載パッドの上に搭載された電子部品と、
前記電子部品と前記電極パッドとを接続する金属ワイヤと
を有することを特徴とする電子部品装置。 - 電極パッドと、
前記電極パッドの上に形成された第1絶縁層と、
前記電極パッド上の前記第1絶縁層に形成された接続ホールと、
前記接続ホール内の電極パッドに形成された凹部と
前記接続ホール内の前記電極パッドの凹部にフリップチップ接続された電子部品と
を有することを特徴とする電子部品装置。 - 樹脂フィルムを貫通加工することにより、開口部と、前記開口部の外側に接続ホールを形成する工程と、
前記樹脂フィルムの一方の面に金属箔を貼付する工程と、
前記金属箔をパターニングして、前記樹脂フィルムの開口部を含む領域に電子部品搭載パッドを配置すると共に、前記樹脂フィルムの接続ホールを含む領域に電極パッドを配置する工程と、
前記樹脂フィルムの開口部内の電子部品搭載パッドと、前記樹脂フィルムの接続ホール内の電極パッドとに凹部をそれぞれ形成する工程と
を有することを特徴とする配線基板の製造方法。 - 樹脂フィルムを貫通加工することにより、接続ホールを形成する工程と、
前記樹脂フィルム一方の面に金属箔を貼付する工程と、
前記金属箔をパターニングして、前記樹脂フィルムの接続ホールを含む領域に電極パッドを配置する工程と、
前記樹脂フィルムの接続ホール内の電極パッドに凹部を形成する工程と
を有することを特徴とする配線基板の製造方法。 - 前記金属箔をパターニングする工程の後に、
前記電子部品搭載パッド及び前記電極パッドの前記樹脂フィルムが貼付された面と反対面に、前記電極パッド上に開口部を備えた第2絶縁層を形成する工程を有し、
前記凹部を形成する工程において、前記第2絶縁層の開口部内の前記電極パッドに凹部を同時に形成することを特徴とする請求項8に記載の配線基板の製造方法。 - 前記金属箔をパターニングする工程の後に、
前記電極パッドの前記樹脂フィルムが貼付された面と反対面に、前記電極パッド上に開口部を備えた第2絶縁層を形成する工程を有し、
前記凹部を形成する工程において、前記第2絶縁層の開口部内の前記電極パッドに凹部を同時に形成することを特徴とする請求項9に記載の配線基板の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014239557A JP6453625B2 (ja) | 2014-11-27 | 2014-11-27 | 配線基板及びその製造方法と電子部品装置 |
US14/950,762 US9837337B2 (en) | 2014-11-27 | 2015-11-24 | Wiring substrate, method of manufacturing the same and electronic component device |
TW104139407A TWI666737B (zh) | 2014-11-27 | 2015-11-26 | 佈線基板、製造佈線基板之方法及電子組件裝置 |
CN201510836888.7A CN105655319B (zh) | 2014-11-27 | 2015-11-26 | 布线衬底及其制造方法、电子组件装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014239557A JP6453625B2 (ja) | 2014-11-27 | 2014-11-27 | 配線基板及びその製造方法と電子部品装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016103502A true JP2016103502A (ja) | 2016-06-02 |
JP6453625B2 JP6453625B2 (ja) | 2019-01-16 |
Family
ID=56080094
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014239557A Active JP6453625B2 (ja) | 2014-11-27 | 2014-11-27 | 配線基板及びその製造方法と電子部品装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9837337B2 (ja) |
JP (1) | JP6453625B2 (ja) |
CN (1) | CN105655319B (ja) |
TW (1) | TWI666737B (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018147958A (ja) * | 2017-03-02 | 2018-09-20 | 三菱電機株式会社 | 半導体パワーモジュール及び電力変換装置 |
US11611009B2 (en) | 2021-03-22 | 2023-03-21 | Kabushiki Kaisha Toshiba | Semiconductor device |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6856444B2 (ja) * | 2017-05-12 | 2021-04-07 | 新光電気工業株式会社 | 配線基板、配線基板の製造方法 |
WO2020116240A1 (ja) * | 2018-12-06 | 2020-06-11 | 株式会社村田製作所 | モジュールおよびその製造方法 |
CN109926566A (zh) * | 2019-04-03 | 2019-06-25 | 上海迈铸半导体科技有限公司 | 一种结合微电子机械和铸造的金属沉积方法 |
US20200395272A1 (en) | 2019-06-11 | 2020-12-17 | Amkor Technology Singapore Holding Pte. Ltd. | Semiconductor device and method of manufacturing a semiconductor device |
JP7483595B2 (ja) * | 2020-11-13 | 2024-05-15 | 新光電気工業株式会社 | 配線基板、電子装置及び配線基板の製造方法 |
US11942448B2 (en) * | 2021-07-16 | 2024-03-26 | Texas Instruments Incorporated | Integrated circuit die pad cavity |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11354673A (ja) * | 1998-06-05 | 1999-12-24 | Toshiba Microelectronics Corp | 半導体装置 |
JP2000244127A (ja) * | 1998-12-24 | 2000-09-08 | Ngk Spark Plug Co Ltd | 配線基板および配線基板の製造方法 |
JP2002184906A (ja) * | 2000-11-27 | 2002-06-28 | Orient Semiconductor Electronics Ltd | フィルムパッケージ |
JP2007027924A (ja) * | 2005-07-13 | 2007-02-01 | Seiko Epson Corp | 圧電デバイスおよびリードフレーム |
JP2009277987A (ja) * | 2008-05-16 | 2009-11-26 | Mitsui Mining & Smelting Co Ltd | 電子部品実装用フィルムキャリアテープ、その製造方法、および、半導体装置 |
JP2011077200A (ja) * | 2009-09-29 | 2011-04-14 | Panasonic Corp | 半導体装置およびその製造方法 |
JP2012004399A (ja) * | 2010-06-18 | 2012-01-05 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法 |
JP2015162660A (ja) * | 2014-02-28 | 2015-09-07 | イビデン株式会社 | プリント配線板、プリント配線板の製造方法、パッケージ−オン−パッケージ |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6001671A (en) * | 1996-04-18 | 1999-12-14 | Tessera, Inc. | Methods for manufacturing a semiconductor package having a sacrificial layer |
JPH10270496A (ja) * | 1997-03-27 | 1998-10-09 | Hitachi Ltd | 電子装置、情報処理装置、半導体装置並びに半導体チップの実装方法 |
JP2001338947A (ja) * | 2000-05-26 | 2001-12-07 | Nec Corp | フリップチップ型半導体装置及びその製造方法 |
JP2007059767A (ja) * | 2005-08-26 | 2007-03-08 | Shinko Electric Ind Co Ltd | アンダーフィル材を用いて電子部品を搭載した基板及びその製造方法 |
CN101615583B (zh) * | 2008-06-25 | 2011-05-18 | 南茂科技股份有限公司 | 芯片堆栈结构的形成方法 |
US8124447B2 (en) * | 2009-04-10 | 2012-02-28 | Advanced Semiconductor Engineering, Inc. | Manufacturing method of advanced quad flat non-leaded package |
-
2014
- 2014-11-27 JP JP2014239557A patent/JP6453625B2/ja active Active
-
2015
- 2015-11-24 US US14/950,762 patent/US9837337B2/en active Active
- 2015-11-26 TW TW104139407A patent/TWI666737B/zh active
- 2015-11-26 CN CN201510836888.7A patent/CN105655319B/zh active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11354673A (ja) * | 1998-06-05 | 1999-12-24 | Toshiba Microelectronics Corp | 半導体装置 |
JP2000244127A (ja) * | 1998-12-24 | 2000-09-08 | Ngk Spark Plug Co Ltd | 配線基板および配線基板の製造方法 |
JP2002184906A (ja) * | 2000-11-27 | 2002-06-28 | Orient Semiconductor Electronics Ltd | フィルムパッケージ |
JP2007027924A (ja) * | 2005-07-13 | 2007-02-01 | Seiko Epson Corp | 圧電デバイスおよびリードフレーム |
JP2009277987A (ja) * | 2008-05-16 | 2009-11-26 | Mitsui Mining & Smelting Co Ltd | 電子部品実装用フィルムキャリアテープ、その製造方法、および、半導体装置 |
JP2011077200A (ja) * | 2009-09-29 | 2011-04-14 | Panasonic Corp | 半導体装置およびその製造方法 |
JP2012004399A (ja) * | 2010-06-18 | 2012-01-05 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法 |
JP2015162660A (ja) * | 2014-02-28 | 2015-09-07 | イビデン株式会社 | プリント配線板、プリント配線板の製造方法、パッケージ−オン−パッケージ |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018147958A (ja) * | 2017-03-02 | 2018-09-20 | 三菱電機株式会社 | 半導体パワーモジュール及び電力変換装置 |
US11611009B2 (en) | 2021-03-22 | 2023-03-21 | Kabushiki Kaisha Toshiba | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
US20160157345A1 (en) | 2016-06-02 |
CN105655319B (zh) | 2019-06-21 |
TWI666737B (zh) | 2019-07-21 |
US9837337B2 (en) | 2017-12-05 |
TW201631715A (zh) | 2016-09-01 |
CN105655319A (zh) | 2016-06-08 |
JP6453625B2 (ja) | 2019-01-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6453625B2 (ja) | 配線基板及びその製造方法と電子部品装置 | |
KR100437436B1 (ko) | 반도체패키지의제조법및반도체패키지 | |
JP4752825B2 (ja) | 半導体装置の製造方法 | |
US9698094B2 (en) | Wiring board and electronic component device | |
US10002825B2 (en) | Method of fabricating package structure with an embedded electronic component | |
JP2008306128A (ja) | 半導体装置およびその製造方法 | |
JP5151158B2 (ja) | パッケージ、およびそのパッケージを用いた半導体装置 | |
KR101538541B1 (ko) | 반도체 디바이스 | |
JP5406572B2 (ja) | 電子部品内蔵配線基板及びその製造方法 | |
JP6510897B2 (ja) | 配線基板及びその製造方法と電子部品装置 | |
JP2017163027A (ja) | 配線基板、半導体装置及び配線基板の製造方法 | |
JP2010192696A (ja) | 電子部品装置及びその製造方法 | |
JP2016039290A (ja) | プリント配線板および半導体パッケージ | |
JP6643213B2 (ja) | リードフレーム及びその製造方法と電子部品装置 | |
CN201247772Y (zh) | 线路板 | |
JP4398683B2 (ja) | 多層配線基板の製造方法 | |
JP5315447B2 (ja) | 配線基板及びその製造方法 | |
JP2019125709A (ja) | 配線基板及びその製造方法と電子部品装置 | |
JP2016039302A (ja) | プリント配線板とその製造方法および半導体パッケージ | |
JP6397313B2 (ja) | プリント配線板および半導体パッケージ | |
JP6387226B2 (ja) | 複合基板 | |
JP2011029370A (ja) | 積層型半導体装置及びその製造方法 | |
JP6216157B2 (ja) | 電子部品装置及びその製造方法 | |
JP2016046509A (ja) | プリント配線板および半導体パッケージ | |
JP2009043858A (ja) | 半導体装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170529 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180118 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180206 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180313 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20180726 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180821 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20180824 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20181018 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20181204 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20181213 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6453625 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |