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JP2007095786A - Group iii nitride-based compound semiconductor light emitting element - Google Patents

Group iii nitride-based compound semiconductor light emitting element Download PDF

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JP2007095786A
JP2007095786A JP2005280052A JP2005280052A JP2007095786A JP 2007095786 A JP2007095786 A JP 2007095786A JP 2005280052 A JP2005280052 A JP 2005280052A JP 2005280052 A JP2005280052 A JP 2005280052A JP 2007095786 A JP2007095786 A JP 2007095786A
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group iii
iii nitride
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JP2007095786A5 (en
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Yoshiki Saito
義樹 齋藤
Tetsuya Taki
瀧  哲也
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Toyoda Gosei Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To improve the electrostatic withstand voltage of a group III nitride-based compound semiconductor light emitting element. <P>SOLUTION: When an about 2 μm-thick GaN layer is formed on an AlN buffer layer formed by sputtering, its surface has unevenness of about 0.9 nm in average. When the GaN layer is doped with a donor, the unevenness is not so improved. In contrast, when the GaN layer is doped with an acceptor, the unevenness is found to be improved to about 1/2. The improvement also improves the electrostatic withstand voltage. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明はIII族窒化物系化合物半導体発光素子に関する。   The present invention relates to a group III nitride compound semiconductor light emitting device.

III族窒化物系化合物半導体発光素子は、現在その静電耐圧の向上が求められている。一方、サファイア基板にIII族窒化物系化合物半導体発光素子を形成する際、スパッタリングによってAlNバッファ層を形成し、その後にエピタキシャル成長させる技術が検討されている。   Group III nitride compound semiconductor light emitting devices are currently required to have improved electrostatic withstand voltage. On the other hand, when forming a group III nitride compound semiconductor light emitting device on a sapphire substrate, a technique of forming an AlN buffer layer by sputtering and then epitaxially growing it has been studied.

サファイア基板に、スパッタリングによってAlNバッファ層を形成し、その後にドーパント無しでGaN層を形成した場合に、フォトルミネッセンスにより強い蛍光現象がおきることを本願発明者らは見出した。一方、AlNバッファ層をMOVPEにより形成した場合は、その上にドーパント無しでGaN層を形成しても、スパッタリングによってAlNバッファ層を形成した場合と比較するとほとんどフォトルミネッセンスによる蛍光現象は生じなかった。   The inventors of the present invention have found that when an AlN buffer layer is formed on a sapphire substrate by sputtering, and then a GaN layer is formed without a dopant, a strong fluorescence phenomenon occurs due to photoluminescence. On the other hand, when the AlN buffer layer was formed by MOVPE, even if a GaN layer was formed without a dopant on the AlN buffer layer, the fluorescence phenomenon due to photoluminescence hardly occurred as compared with the case where the AlN buffer layer was formed by sputtering.

本発明者らは、スパッタリングによってAlNバッファ層を形成したのちに形成するGaN層の表面モホロジーを改善すべく検討を重ね、本願発明を完成した。   The present inventors have repeatedly studied to improve the surface morphology of the GaN layer formed after forming the AlN buffer layer by sputtering, and completed the present invention.

請求項1に係る発明は、サファイア基板と、その上に形成されたバッファ層と、ドナーをドープされたIII族窒化物系化合物半導体から成り、n電極が形成されたn型層とを有するIII族窒化物系化合物半導体発光素子において、バッファ層とn型層との間に、アクセプタをドープされたIII族窒化物系化合物半導体層を有することを特徴とするIII族窒化物系化合物半導体発光素子である。   The invention according to claim 1 includes a sapphire substrate, a buffer layer formed thereon, and an n-type layer made of a group III nitride compound semiconductor doped with a donor and having an n-electrode formed thereon. A group III nitride compound semiconductor light-emitting device comprising a group III nitride compound semiconductor layer doped with an acceptor between a buffer layer and an n-type layer It is.

また、請求項2に係る発明は、バッファ層はスパッタリングにより形成されたAlN層であることを特徴とする。   The invention according to claim 2 is characterized in that the buffer layer is an AlN layer formed by sputtering.

スパッタリングによって形成したAlNバッファ層の上にGaN層を2μm厚程形成すると、その表面は平均約0.9nm程の凹凸が生じる。GaN層にドナーをドープした場合はこの凹凸が余り改善されない。一方、GaN層にアクセプタをドープした場合は凹凸が1/2程度に改善されることが見出された。この改善により静電耐圧も向上する。   When a GaN layer having a thickness of about 2 μm is formed on an AlN buffer layer formed by sputtering, the surface has irregularities of about 0.9 nm on average. When the GaN layer is doped with a donor, the unevenness is not improved so much. On the other hand, it has been found that when the GaN layer is doped with an acceptor, the unevenness is improved to about 1/2. This improvement also improves the electrostatic withstand voltage.

本発明の適用される半導体発光素子の半導体材料は限定されるものではないが、半導体発光素子をIII族窒化物半導体で構成した場合には、形成する各半導体層は、少なくともAlxGayIIn1-x-y(N(0≦x≦1,0≦y≦1,0≦x+y≦1)にて表される2元系、3元系若しくは4元系の半導体から成るIII族窒化物系化合物半導体等で形成することができる。また、これらのIII族元素の一部は、ボロン(B)、タリウム(Tl)で置き換えても良く、また、窒素(N)の一部をリン(P)、砒素(As)、アンチモン(Sb)、ビスマス(Bi)で置き換えても良い。 Although not a semiconductor material of the semiconductor light-emitting device is limited to be applied to the present invention, a semiconductor light-emitting device when composed of a group III nitride semiconductors, the semiconductor layer to form at least Al x Ga y IIn Group III nitride compounds composed of binary, ternary or quaternary semiconductors represented by 1-xy (N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1)) It can be formed of a semiconductor, etc. In addition, some of these group III elements may be replaced by boron (B) and thallium (Tl), and part of nitrogen (N) may be phosphorus (P). , Arsenic (As), antimony (Sb), and bismuth (Bi) may be substituted.

更に、これらの半導体を用いてn型のIII族窒化物系化合物半導体層を形成する場合には、n型不純物として、Si、Ge、Se、Te、C等を添加し、p型不純物としては、Zn、Mg、Be、Ca、Sr、Ba等を添加することができる。   Further, when an n-type group III nitride compound semiconductor layer is formed using these semiconductors, Si, Ge, Se, Te, C, etc. are added as n-type impurities, and p-type impurities are used as p-type impurities. Zn, Mg, Be, Ca, Sr, Ba and the like can be added.

また、これらの半導体層を結晶成長させる基板としては、サファイヤ、スピネル、Si、SiC、ZnO、MgO或いは、III族窒化物系化合物単結晶等を用いることができる。   In addition, as a substrate for crystal growth of these semiconductor layers, sapphire, spinel, Si, SiC, ZnO, MgO, a group III nitride compound single crystal, or the like can be used.

また、これらの半導体層を結晶成長させる方法としては、分子線気相成長法(MBE)、有機金属気相成長法(MOVPE)、ハライド気相成長法(HVPE)等が有効である。   As a method for crystal growth of these semiconductor layers, molecular beam vapor phase epitaxy (MBE), metal organic vapor phase epitaxy (MOVPE), halide vapor phase epitaxy (HVPE) and the like are effective.

以下、本発明を具体的な実施例に基づいて説明する。ただし、本発明は以下に示す実施例に限定されるものではない。   Hereinafter, the present invention will be described based on specific examples. However, the present invention is not limited to the following examples.

まず、ドーパントの影響を次のように調べた。厚さ300μmのサファイア基板のA面に、DCマグネトロンスパッタ装置を用いて、高純度金属アルミニウムと窒素ガスを原材料とし、基板温度430℃にてリアクティブスパッタ法を実行して膜厚3〜35nmのAlNバッファ層を形成した。次に、窒化ガリウム層を、MOVPEにより2μmの厚さに形成した。この際、トリメチルガリウムは成長速度〜70nm/分で形成した。   First, the influence of the dopant was examined as follows. Using a DC magnetron sputtering apparatus on a surface of a 300 μm thick sapphire substrate, a high-purity metallic aluminum and nitrogen gas are used as raw materials, and a reactive sputtering method is performed at a substrate temperature of 430 ° C. An AlN buffer layer was formed. Next, a gallium nitride layer was formed to a thickness of 2 μm by MOVPE. At this time, trimethylgallium was formed at a growth rate of ˜70 nm / min.

窒化ガリウム層に、Mgを2×1018/cm3ドープした場合、Siを2×1018/cm3ドープした場合、何もドープしなかった場合の表面の凹凸を観察したところ、Mgドープの場合は平均0.49nm、Siドープの場合は平均0.67nm、何もドープしなかった場合は平均0.86nm,の凹凸が観察された。これより、スパッタAlNバッファ層の上にGaN層を形成する場合、アクセプタであるMgをドープした場合に最も表面の凹凸が抑制された。 When the gallium nitride layer was doped with Mg at 2 × 10 18 / cm 3 , when Si was doped at 2 × 10 18 / cm 3 , the surface irregularities when nothing was doped were observed. In the case of 0.49 nm on average, in the case of Si doping, an average of 0.67 nm was observed, and in the case of nothing being doped, an average of 0.86 nm was observed. Thus, when the GaN layer is formed on the sputtered AlN buffer layer, the surface unevenness is most suppressed when Mg as an acceptor is doped.

図1の構成の発光ダイオードを形成して、静電耐圧を測定した。サファイア基板101上に、スパッタAlNバッファ層102、Mgが2×1018/cm3ドープされた膜厚2μmのi−GaN層103、膜厚2.5μmのシリコン(Si)が5×1018/cm3ドープされたGaNから成るn型コンタクト層104(高キャリヤ濃度n+層)が形成されている。 The light emitting diode having the configuration shown in FIG. 1 was formed, and the electrostatic withstand voltage was measured. On a sapphire substrate 101, a sputtered AlN buffer layer 102, a 2 μm thick i-GaN layer 103 doped with Mg 2 × 10 18 / cm 3 , and a 2.5 μm thick silicon (Si) 5 × 10 18 / An n-type contact layer 104 (high carrier concentration n + layer) made of GaN doped with cm 3 is formed.

このn型コンタクト層104の上には、膜厚0.3μmのアンドープGaN層105aと膜厚30nmのシリコン(Si)が3×1018/cm3ドープされたn型GaN層105bが形成されている。この上にはn側超格子層106、発光層107、p側超格子層108が形成されている。更にその上には、膜厚0.3μmのアンドープAl0.05Ga0.95Nから成る層109、膜厚80nmのマグネシウム(Mg)が1×1020/cm3ドープされたp−GaN層110、マグネシウム(Mg)が2×1020/cm3ドープされた膜厚20nmのp+−GaN層111が形成されている。 On this n-type contact layer 104, an undoped GaN layer 105a having a thickness of 0.3 μm and an n-type GaN layer 105b doped with 3 × 10 18 / cm 3 of silicon (Si) having a thickness of 30 nm are formed. Yes. An n-side superlattice layer 106, a light emitting layer 107, and a p-side superlattice layer 108 are formed thereon. Further thereon, a layer 109 made of 0.3 μm-thick undoped Al 0.05 Ga 0.95 N, a p-GaN layer 110 doped with 80 nm-thick magnesium (Mg) at 1 × 10 20 / cm 3 , magnesium ( A p + -GaN layer 111 having a thickness of 20 nm doped with 2 × 10 20 / cm 3 of Mg) is formed.

n側超格子層106は、厚さ2〜5nmのInxGa1-xN層(0.06≦x≦0.14)と厚さ3〜6nmのn−GaN層とを繰り返しにより10周期の超格子層としたものである。 The n-side superlattice layer 106 includes 10 cycles by repeating an In x Ga 1-x N layer (0.06 ≦ x ≦ 0.14) having a thickness of 2 to 5 nm and an n-GaN layer having a thickness of 3 to 6 nm. This is a superlattice layer.

発光層107は、いずれもアンドープ層で形成されており、膜厚3nmのIn0.25Ga0.75Nと低温成長された膜厚2nmのGaNと、高温成長された膜厚4nmのAl0.05Ga0.95Nとを5周期、更に膜厚3nmのIn0.25Ga0.75Nと低温成長された膜厚2nmのGaNと、高温成長された膜厚2.5nmのGaNとから形成された。 Each of the light emitting layers 107 is formed of an undoped layer, and includes 3 nm thick In 0.25 Ga 0.75 N, a low temperature grown GaN 2 nm thick film, and a high temperature grown 4 nm thick Al 0.05 Ga 0.95 N film. For 5 cycles, further 3 nm thick In 0.25 Ga 0.75 N, low temperature grown GaN with a thickness of 2 nm, and high temperature grown GaN with a thickness of 2.5 nm.

p側超格子層108は、アンドープのAlxGa1-xN層(0.05≦x≦0.4)を2.5nm厚で形成したのち、840℃以下の低温成長でマグネシウム(Mg)が2×1019/cm3ドープされた膜厚2nmのInxGa1-xN(0.05≦x≦0.12)の形成と、マグネシウム(Mg)が2×1019/cm3ドープされたAlxGa1-xN層(0.25≦x≦0.4)を2.5nm形成とを5回繰り返して、総膜厚25nmの超格子層とした。 The p-side superlattice layer 108 is formed of an undoped Al x Ga 1-x N layer (0.05 ≦ x ≦ 0.4) with a thickness of 2.5 nm, and then grown at a low temperature of 840 ° C. or lower to form magnesium (Mg). Of 2 × 10 19 / cm 3 -doped In x Ga 1-x N (0.05 ≦ x ≦ 0.12) doped with 2 × 10 19 / cm 3 and 2 × 10 19 / cm 3 doped with magnesium (Mg) The formed Al x Ga 1-x N layer (0.25 ≦ x ≦ 0.4) was repeated 2.5 times to form a superlattice layer having a total thickness of 25 nm.

尚、p電極はp+層111の上に膜厚〜300nmのITO電極120で構成し、n電極140はn+層の上に膜厚約20nmのバナジウム層141と膜厚約2μmのアルミニウム層142とで構成した。また、接続部分を除いて二酸化ケイ素絶縁膜130で素子上部を覆った。   The p electrode is composed of an ITO electrode 120 having a film thickness of about 300 nm on the p + layer 111, and the n electrode 140 has a vanadium layer 141 having a film thickness of about 20 nm and an aluminum layer 142 having a film thickness of about 2 μm on the n + layer. Consists of. In addition, the upper part of the device was covered with a silicon dioxide insulating film 130 except for the connection portion.

このような構成の、発光素子100を1枚のウエハに多数形成して個々のチップとして分離し、−1000Vの静電耐圧を印加したところ85%が生存した。   A large number of light emitting elements 100 having such a structure were formed on one wafer and separated as individual chips, and when an electrostatic withstand voltage of −1000 V was applied, 85% survived.

〔比較例〕
上記実施例で、膜厚2μmのi−GaN層103、膜厚2.5μmのGaNから成るn型コンタクト層104の構成から、i−GaN層103を除き、n型コンタクト層104の膜厚を4.5μmとしたほかは全く同様に形成した発光素子を比較のために静電耐圧を測定した。−1000Vの印加で生存率は25%であった。
[Comparative example]
In the above embodiment, the i-GaN layer 103 having a thickness of 2 μm and the n-type contact layer 104 made of GaN having a thickness of 2.5 μm are excluded from the configuration of the n-type contact layer 104 except for the i-GaN layer 103. For comparison, the electrostatic withstand voltage was measured for a light-emitting element formed in the same manner except that the thickness was 4.5 μm. The survival rate was 25% when -1000 V was applied.

(変形例)
本発明は、上記実施例に限定されるものではなく他に様々な変形が考えられる。例えば、III族窒化物系化合物半導体素子として、GaN系の半導体層を用いたが、勿論GaxIn1-xN等から成る層、その他、任意の混晶比の3元乃至4元系のAlGaInNとしても良い。より具体的には、「AlxGayIn1-x-yN(0≦x≦1,0≦y≦1,0≦x+y≦1)」成る一般式で表される3元(GaInN,AlInN,AlGaN)或いは4元(AlGaInN)のIII族窒化物系化合物半導体等を用いることもできる。また、そられの化合物のNの一部をP、As等のV族元素で置換しても良い。
(Modification)
The present invention is not limited to the above embodiments, and various other modifications are possible. For example, a GaN-based semiconductor layer is used as a group III nitride compound semiconductor element, but of course, a layer composed of Ga x In 1-x N or the like, or any other ternary to quaternary system with any mixed crystal ratio. AlGaInN may also be used. More specifically, "Al x Ga y In 1-xy N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) " consisting formula ternary represented (GaInN, AlInN, AlGaN) or quaternary (AlGaInN) group III nitride compound semiconductors can also be used. Further, a part of N of the compound may be substituted with a group V element such as P or As.

実施例2に係る発光素子100の構成を示す断面図。Sectional drawing which shows the structure of the light emitting element 100 which concerns on Example 2. FIG.

符号の説明Explanation of symbols

101:サファイア基板
102:スパッタAlNバッファ
103:i−GaN:Mg層
104:n+−GaN層
105a:アンドープGaN層
105b:n−GaN:Si層
106:n側超格子層
107:MQW発光層
108:p側超格子層
109:アンドープAlGaN層
110:p−GaN:Mg層
111:p+−GaN:Mg層
101: sapphire substrate 102: sputtered AlN buffer 103: i-GaN: Mg layer 104: n + -GaN layer 105a: undoped GaN layer 105b: n-GaN: Si layer 106: n-side superlattice layer 107: MQW light emitting layer 108 : P-side superlattice layer 109: undoped AlGaN layer 110: p-GaN: Mg layer 111: p + -GaN: Mg layer

Claims (2)

サファイア基板と、その上に形成されたバッファ層と、ドナーをドープされたIII族窒化物系化合物半導体から成り、n電極が形成されたn型層とを有するIII族窒化物系化合物半導体発光素子において、
前記バッファ層と前記n型層との間に、アクセプタをドープされたIII族窒化物系化合物半導体層を有することを特徴とするIII族窒化物系化合物半導体発光素子。
A group III nitride compound semiconductor light-emitting device comprising a sapphire substrate, a buffer layer formed thereon, and a group III nitride compound semiconductor doped with a donor, and an n-type layer on which an n electrode is formed In
A group III nitride compound semiconductor light emitting device having a group III nitride compound semiconductor layer doped with an acceptor between the buffer layer and the n-type layer.
前記バッファ層はスパッタリングにより形成されたAlN層であることを特徴とする請求項1に記載のIII族窒化物系化合物半導体発光素子。 The group III nitride compound semiconductor light emitting device according to claim 1, wherein the buffer layer is an AlN layer formed by sputtering.
JP2005280052A 2005-09-27 2005-09-27 Group iii nitride-based compound semiconductor light emitting element Withdrawn JP2007095786A (en)

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JP2009283895A (en) * 2008-12-15 2009-12-03 Showa Denko Kk Group iii nitride semiconductor laminate structure
JP2009283785A (en) * 2008-05-23 2009-12-03 Showa Denko Kk Group iii nitride semiconductor laminate structure and manufacturing method thereof
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JP2010272887A (en) * 2008-03-13 2010-12-02 Showa Denko Kk Group III nitride semiconductor device manufacturing method and group III nitride semiconductor light emitting device manufacturing method
JP2011108747A (en) * 2009-11-13 2011-06-02 Showa Denko Kk Method of manufacturing semiconductor light-emitting element, lamp, electronic apparatus, and mechanical apparatus
JP2016184718A (en) * 2015-03-24 2016-10-20 日亜化学工業株式会社 Manufacturing method for light emission element
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010272887A (en) * 2008-03-13 2010-12-02 Showa Denko Kk Group III nitride semiconductor device manufacturing method and group III nitride semiconductor light emitting device manufacturing method
JPWO2009113458A1 (en) * 2008-03-13 2011-07-21 昭和電工株式会社 Group III nitride semiconductor device and group III nitride semiconductor light emitting device
US8569794B2 (en) 2008-03-13 2013-10-29 Toyoda Gosei Co., Ltd. Group III nitride semiconductor device and method for manufacturing the same, group III nitride semiconductor light-emitting device and method for manufacturing the same, and lamp
JP2009283785A (en) * 2008-05-23 2009-12-03 Showa Denko Kk Group iii nitride semiconductor laminate structure and manufacturing method thereof
JP2010116621A (en) * 2008-11-14 2010-05-27 Stanley Electric Co Ltd ZnO-BASED SEMICONDUCTOR LAYER, METHOD FOR FORMING THE SAME, LIGHT-EMITTING ELEMENT OF ZnO-BASED SEMICONDUCTOR, AND ZnO-BASED SEMICONDUCTOR ELEMENT
JP2009283895A (en) * 2008-12-15 2009-12-03 Showa Denko Kk Group iii nitride semiconductor laminate structure
JP2011108747A (en) * 2009-11-13 2011-06-02 Showa Denko Kk Method of manufacturing semiconductor light-emitting element, lamp, electronic apparatus, and mechanical apparatus
JP2016184718A (en) * 2015-03-24 2016-10-20 日亜化学工業株式会社 Manufacturing method for light emission element
CN109256443A (en) * 2018-09-03 2019-01-22 淮安澳洋顺昌光电技术有限公司 A kind of semiconductor light-emitting-diode and preparation method of the epitaxial growth using sputtering GaN substrate

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