JP2003124483A - Photovoltaic element - Google Patents
Photovoltaic elementInfo
- Publication number
- JP2003124483A JP2003124483A JP2001319717A JP2001319717A JP2003124483A JP 2003124483 A JP2003124483 A JP 2003124483A JP 2001319717 A JP2001319717 A JP 2001319717A JP 2001319717 A JP2001319717 A JP 2001319717A JP 2003124483 A JP2003124483 A JP 2003124483A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- type
- type semiconductor
- layer
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 85
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 238000009792 diffusion process Methods 0.000 claims abstract description 15
- 239000011810 insulating material Substances 0.000 claims description 10
- 230000000694 effects Effects 0.000 abstract description 9
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000011109 contamination Methods 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F10/00—Individual photovoltaic cells, e.g. solar cells
- H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
- H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
- H10F10/146—Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
Landscapes
- Photovoltaic Devices (AREA)
Abstract
(57)【要約】
【課題】 裏面に拡散層として設けられるｐ+型層とｎ+
型層とを電気的に分離してトンネル効果によりそれらの
間をリーク電流が通り抜けるのを防止することにより性
能の向上を図った裏面電極型光起電力素子を提供する。
【解決手段】 半導体基板１０と、該半導体基板１０の
裏面に拡散により形成され、該半導体基板１０のキャリ
ア濃度よりも高いキャリア濃度を有するｐ+型半導体層
２２及びｎ+型半導体層２０と、該ｐ+型半導体層２２及
びｎ+型半導体層２０にそれぞれ接続された正電極３２
及び負電極３０と、を備えた裏面電極型の光起電力素子
において、該ｐ+型半導体層２２と該ｎ+型半導体層２０
との間に溝が形成される。
(57) [Problem] To provide a p + -type layer and an n +
Provided is a back electrode type photovoltaic element in which performance is improved by electrically separating a mold layer and preventing a leakage current from passing between them by a tunnel effect. SOLUTION: A semiconductor substrate 10, ap + -type semiconductor layer 22 and an n + -type semiconductor layer 20 formed by diffusion on the back surface of the semiconductor substrate 10 and having a carrier concentration higher than the carrier concentration of the semiconductor substrate 10; Positive electrodes 32 connected to the p + -type semiconductor layer 22 and the n + -type semiconductor layer 20, respectively.
And a back electrode type photovoltaic element having a negative electrode 30 and the p + type semiconductor layer 22 and the n + type semiconductor layer 20.
Is formed between them.
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、太陽電池等の、光
エネルギーを電力に変換する光起電力(photovoltaic)素
子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photovoltaic device for converting light energy into electric power, such as a solar cell.
【０００２】[0002]
【従来の技術】光起電力素子では、表面側に電極を設け
た場合、入射する光の量が減少することから、裏面側に
のみ電極を有する裏面電極型という構造の光起電力素子
がある。かかる裏面電極型光起電力素子として、裏面で
の表面再結合を防止して高性能化を図るべく裏面全体に
拡散層を設けた構造のものが知られている（例えば、特
開平８−２１３６４６号公報参照）。2. Description of the Related Art In a photovoltaic element, when an electrode is provided on the front surface side, the amount of incident light is reduced, and thus there is a back surface electrode type photovoltaic element having an electrode only on the back surface side. . As such a back electrode type photovoltaic element, one having a structure in which a diffusion layer is provided on the entire back surface in order to prevent surface recombination on the back surface and to improve performance is known (for example, Japanese Patent Laid-Open No. 8-213646). (See the official gazette).
【０００３】[0003]
【発明が解決しようとする課題】図１は、ｐ+型層及び
ｎ+型層からなる拡散層が裏面全体に形成された従来の
裏面電極型光起電力素子の構造を示す断面図である。こ
の構造ではｐ+型層とｎ+型層とが接しており、このよう
にｐ+型層とｎ+型層とが隣り合うときのエネルギーバン
ド構造は図２に示されるようになる。FIG. 1 is a sectional view showing the structure of a conventional back electrode type photovoltaic element in which a diffusion layer composed of ap + type layer and an n + type layer is formed on the entire back surface. . In this structure, the p + -type layer and the n + -type layer are in contact with each other, and the energy band structure when the p + -type layer and the n + -type layer are adjacent to each other as shown in FIG.
【０００４】そして、電子の波動性により、図中の矢印
で示されるような、ポテンシャルバリヤーを突き抜ける
トンネル現象が生ずる。これは、ｎ+型層に収集された
電子の一部がｐ+型層に（又は、ｐ+型層に収集された正
孔の一部がｎ+型層に）流れ込むことを意味する。結果
として、光起電力素子での発電による電流量が低下し、
損失となる。Due to the wave nature of the electrons, a tunnel phenomenon that penetrates the potential barrier as shown by the arrow in the figure occurs. This is part of the collected electrons to the n + -type layer is the p + -type layer (or, a portion of holes collected to the p + -type layer is the n + -type layer) means to flow. As a result, the amount of current generated by the photovoltaic device is reduced,
It will be a loss.
【０００５】本発明は、上述した問題点に鑑みてなされ
たものであり、その目的は、裏面に拡散層として設けら
れるｐ+型層とｎ+型層とを電気的に分離してトンネル効
果によりそれらの間をリーク電流が通り抜けるのを防止
することにより性能の向上を図った裏面電極型光起電力
素子を提供することにある。The present invention has been made in view of the above-described problems, and an object thereof is to electrically separate a p + type layer and an n + type layer provided as a diffusion layer on the back surface into a tunnel effect. Therefore, it is an object of the present invention to provide a back electrode type photovoltaic element having improved performance by preventing leakage current from passing through them.
【０００６】[0006]
【課題を解決するための手段】上記目的を達成するため
に、本発明の第１の面によれば、半導体基板と、前記半
導体基板の裏面に拡散により形成され、前記半導体基板
のキャリア濃度よりも高いキャリア濃度を有するｐ+型
半導体層及びｎ+型半導体層と、前記ｐ+型半導体層及び
ｎ+型半導体層にそれぞれ接続された正電極及び負電極
と、を備えた裏面電極型の光起電力素子において、前記
ｐ+型半導体層と前記ｎ+型半導体層との間に溝が形成さ
れていることを特徴とする光起電力素子が提供される。In order to achieve the above object, according to a first aspect of the present invention, a semiconductor substrate and a back surface of the semiconductor substrate are formed by diffusion, and the carrier concentration of the semiconductor substrate is higher than that of the semiconductor substrate. A back electrode type having a p + type semiconductor layer and an n + type semiconductor layer having a high carrier concentration, and a positive electrode and a negative electrode connected to the p + type semiconductor layer and the n + type semiconductor layer, respectively. In the photovoltaic element, there is provided a photovoltaic element, wherein a groove is formed between the p + type semiconductor layer and the n + type semiconductor layer.
【０００７】上述の如く構成された、本発明の第１の面
による光起電力素子においては、ｐ +型半導体層とｎ+型
半導体層とが溝により分離されることにより、トンネル
現象が発生しない。したがって、収集された電子及び正
孔を効率良く電極から取り出すことができ、光起電力素
子の性能が向上する。The first aspect of the present invention configured as described above
In the photovoltaic element according to +Type semiconductor layer and n+Type
A tunnel separates the semiconductor layer from the trench.
The phenomenon does not occur. Therefore, the collected electrons and positive
The holes can be efficiently taken out from the electrode,
The child's performance is improved.
【０００８】また、本発明の第２の面によれば、前記本
発明の第１の面による光起電力素子において前記溝が絶
縁性物質で埋められる。Further, according to the second aspect of the present invention, in the photovoltaic element according to the first aspect of the present invention, the groove is filled with an insulating material.
【０００９】この本発明の第２の面による光起電力素子
においては、溝が絶縁性物質で埋められていることで、
素子の強度が増大せしめられるとともに、溝の部分の汚
染が防止される。In the photovoltaic element according to the second aspect of the present invention, the groove is filled with the insulating material,
The strength of the element is increased and contamination of the groove portion is prevented.
【００１０】また、本発明の第３の面によれば、前記本
発明の第２の面による光起電力素子において、前記ｐ+
型半導体層又はｎ+型半導体層と前記半導体基板とが接
する部分の面積よりも、前記ｐ+型半導体層又はｎ+型半
導体層と前記正電極又は負電極とが接する部分の面積が
小さくなるように、前記溝が形成される。According to a third aspect of the present invention, in the photovoltaic element according to the second aspect of the present invention, the p +
The area of the part where the p + type semiconductor layer or the n + type semiconductor layer is in contact with the positive electrode or the negative electrode is smaller than the area of the part where the type semiconductor layer or the n + type semiconductor layer is in contact with the semiconductor substrate. Thus, the groove is formed.
【００１１】半導体層と電極との接触面積は、大きすぎ
るとキャリアの再結合が促進されるため、接触抵抗が問
題にならない程度にまで小さいことが好ましい。この本
発明の第３の面による光起電力素子においては、絶縁性
物質上に電極を形成することができるため、半導体層と
電極との接触面積を増加することなく電極の面積を大き
くすることができる。その結果、電極の抵抗による損失
を低減することができる。If the contact area between the semiconductor layer and the electrode is too large, the recombination of carriers is promoted, so that it is preferable that the contact resistance is small enough not to cause a problem. In the photovoltaic device according to the third aspect of the present invention, since the electrode can be formed on the insulating material, it is possible to increase the area of the electrode without increasing the contact area between the semiconductor layer and the electrode. You can As a result, the loss due to the resistance of the electrodes can be reduced.
【００１２】[0012]
【発明の実施の形態】以下、添付図面を参照して本発明
の実施形態について説明する。DETAILED DESCRIPTION OF THE INVENTION Embodiments of the present invention will be described below with reference to the accompanying drawings.
【００１３】図３は、本発明の第１実施形態に係る光起
電力素子の断面図である。ｐ型又はｎ型の半導体基板１
０の裏面には、拡散法を用いて、ｎ+型半導体層２０と
ｐ+型半導体層２２とがそれぞれ交互に形成されてい
る。キャリアを収集するために、これらのｎ+型半導体
層２０及びｐ+型半導体層２２のキャリア濃度は、ｐ又
はｎ型半導体基板１０のキャリア濃度よりも高い。FIG. 3 is a sectional view of the photovoltaic element according to the first embodiment of the present invention. p-type or n-type semiconductor substrate 1
On the back surface of 0, n + type semiconductor layers 20 and p + type semiconductor layers 22 are alternately formed by a diffusion method. In order to collect carriers, the carrier concentration of these n + type semiconductor layer 20 and p + type semiconductor layer 22 is higher than that of the p or n type semiconductor substrate 10.
【００１４】また、半導体基板１０の裏面側には、ｎ+
型半導体層２０に接続される負（−）電極３０とｐ+型
半導体層２２に接続される正（＋）電極３２とが設けら
れ、裏面電極型構造を実現している。On the back side of the semiconductor substrate 10, n +
The negative (−) electrode 30 connected to the positive type semiconductor layer 20 and the positive (+) electrode 32 connected to the p + type semiconductor layer 22 are provided to realize a back electrode type structure.
【００１５】図３の光起電力素子では、表面側から入射
した光が半導体基板１０において吸収され、電子と正孔
とが生成される。生成された電子は、ｎ+型半導体層２
０の領域へと拡散していき負（−）電極３０に集められ
る一方、生成された正孔は、ｐ+型半導体層２２へと拡
散していき正（＋）電極３２に集められる。かくして、
光の吸収によって生成された電子と正孔とが分離され、
光起電力が生ずることとなる。In the photovoltaic element of FIG. 3, light incident from the front side is absorbed by the semiconductor substrate 10 and electrons and holes are generated. The generated electrons are the n + type semiconductor layer 2
The holes are diffused to the region of 0 and collected in the negative (−) electrode 30, while the generated holes are diffused to the p + type semiconductor layer 22 and collected in the positive (+) electrode 32. Thus,
Electrons and holes generated by absorption of light are separated,
Photovoltaic will be generated.
【００１６】そして、図３に示される光起電力素子で
は、ｎ+型半導体層２０とｐ+型半導体層２２とは、その
境界にエッチング、機械加工等により溝が形成されるこ
とにより、分離されている。したがって、先に図１及び
図２により説明したトンネル現象は発生せず、収集され
た電子及び正孔は効率良く負（−）電極３０及び正
（＋）電極３２から取り出されることとなり、光起電力
素子の性能が向上する。In the photovoltaic element shown in FIG. 3, the n + type semiconductor layer 20 and the p + type semiconductor layer 22 are separated from each other by forming a groove at the boundary between them by etching, machining or the like. Has been done. Therefore, the tunnel phenomenon described above with reference to FIGS. 1 and 2 does not occur, and the collected electrons and holes are efficiently taken out from the negative (−) electrode 30 and the positive (+) electrode 32. The performance of the power device is improved.
【００１７】なお、かかる溝の形成により露出した表面
を、水素、ハロゲン元素等で終端処理（パッシベーショ
ン）することにより、効果的に光起電力素子の特性を向
上させることができる。The characteristics of the photovoltaic element can be effectively improved by terminating (passivating) the surface exposed by the formation of the groove with hydrogen, a halogen element or the like.
【００１８】ここで、図３に示される光起電力素子の具
体的構造について説明すると、例えば、半導体基板１０
は、キャリア濃度１×１０16ｃｍ-3、厚さ１００μｍを
有するｐ型Ｇｅ基板である。The specific structure of the photovoltaic element shown in FIG. 3 will now be described. For example, the semiconductor substrate 10
Is a p-type Ge substrate having a carrier concentration of 1 × 10 16 cm −3 and a thickness of 100 μm.
【００１９】また、ｎ+型半導体層２０は、キャリア濃
度１×１０19ｃｍ-3、拡散深さ１μｍを有するｎ+型Ｇ
ｅ層である。同様に、ｐ+型半導体層２２は、キャリア
濃度１×１０19ｃｍ-3、拡散深さ１μｍを有するｐ+型
Ｇｅ層である。Further, the n + type semiconductor layer 20 is an n + type G having a carrier concentration of 1 × 10 19 cm -3 and a diffusion depth of 1 μm.
It is the e layer. Similarly, the p + type semiconductor layer 22 is a p + type Ge layer having a carrier concentration of 1 × 10 19 cm −3 and a diffusion depth of 1 μm.
【００２０】また、負（−）電極３０は、膜厚２μｍを
有するＡｌ電極である。同様に、正（＋）電極３２は、
膜厚２μｍを有するＡｌ電極である。The negative (-) electrode 30 is an Al electrode having a film thickness of 2 μm. Similarly, the positive (+) electrode 32 is
It is an Al electrode having a film thickness of 2 μm.
【００２１】なお、半導体基板１０としては、Ｇｅ基板
に代えて、Ｓｉ、ＳｉＧｅ、ＳｉＣ、ＣＳｉＧｅ等の基
板を用いることができる。As the semiconductor substrate 10, a substrate of Si, SiGe, SiC, CSiGe or the like can be used instead of the Ge substrate.
【００２２】また、図３では、ｎ+型半導体層２０より
もｐ+型半導体層２２が大きく示されているが、これと
は逆、又は同じ大きさであってもよい。Further, in FIG. 3, the p + type semiconductor layer 22 is shown to be larger than the n + type semiconductor layer 20, but it may have the opposite size or the same size.
【００２３】図４は、本発明の第２実施形態に係る光起
電力素子の断面図である。図４においては、図３におけ
る要素と同一の要素に同一の符号が付されることによ
り、その説明が省略される。FIG. 4 is a sectional view of a photovoltaic element according to the second embodiment of the present invention. 4, the same elements as those in FIG. 3 are designated by the same reference numerals, and the description thereof will be omitted.
【００２４】図３の構造に対する図４の構造の相違点
は、ｎ+型半導体層２０とｐ+型半導体層２２と間に形成
された溝の部分が絶縁性物質４０で埋められているとい
う点にある。The structure of FIG. 4 is different from the structure of FIG. 3 in that the groove formed between the n + type semiconductor layer 20 and the p + type semiconductor layer 22 is filled with the insulating material 40. In point.
【００２５】したがって、図４の構造では、図３の構造
による作用効果に加えて、溝が絶縁性物質で埋められて
いることにより、素子の強度が増大するとともに溝の部
分の汚染が防止されるという作用効果がある。Therefore, in the structure of FIG. 4, in addition to the function and effect of the structure of FIG. 3, since the groove is filled with the insulating material, the strength of the element is increased and contamination of the groove portion is prevented. There is a function and effect.
【００２６】ここで、図４に示される光起電力素子の具
体的構造について説明すると、例えば、半導体基板１０
は、キャリア濃度１×１０16ｃｍ-3、厚さ１００μｍを
有するｐ型Ｇｅ基板である。The specific structure of the photovoltaic element shown in FIG. 4 will now be described. For example, the semiconductor substrate 10
Is a p-type Ge substrate having a carrier concentration of 1 × 10 16 cm −3 and a thickness of 100 μm.
【００２７】また、ｎ+型半導体層２０は、キャリア濃
度１×１０19ｃｍ-3、拡散深さ１μｍを有するｎ+型Ｇ
ｅ層である。同様に、ｐ+型半導体層２２は、キャリア
濃度１×１０19ｃｍ-3、拡散深さ１μｍを有するｐ+型
Ｇｅ層である。The n + type semiconductor layer 20 has an n + type G having a carrier concentration of 1 × 10 19 cm −3 and a diffusion depth of 1 μm.
It is the e layer. Similarly, the p + type semiconductor layer 22 is a p + type Ge layer having a carrier concentration of 1 × 10 19 cm −3 and a diffusion depth of 1 μm.
【００２８】また、負（−）電極３０は、膜厚２μｍを
有するＡｌ電極である。同様に、正（＋）電極３２は、
膜厚２μｍを有するＡｌ電極である。また、絶縁性物質
４０は、ＳｉＮｘである。The negative (-) electrode 30 is an Al electrode having a film thickness of 2 μm. Similarly, the positive (+) electrode 32 is
It is an Al electrode having a film thickness of 2 μm. The insulating material 40 is SiNx.
【００２９】なお、半導体基板１０としては、Ｇｅ基板
に代えて、Ｓｉ、ＳｉＧｅ、ＳｉＣ、ＣＳｉＧｅ等の基
板を用いることができる。As the semiconductor substrate 10, a substrate of Si, SiGe, SiC, CSiGe or the like can be used instead of the Ge substrate.
【００３０】また、図４では、ｎ+型半導体層２０より
もｐ+型半導体層２２が大きく示されているが、これと
は逆、又は同じ大きさであってもよい。Although the p + type semiconductor layer 22 is shown to be larger than the n + type semiconductor layer 20 in FIG. 4, the size may be reversed or the same.
【００３１】図５は、本発明の第３実施形態に係る光起
電力素子の断面図である。図５においては、図３及び図
４における要素と同一の要素に同一の符号が付されるこ
とにより、その説明が省略される。図５の構造は、図３
又は図４の構造による作用効果に加えて、以下のような
作用効果を奏する。FIG. 5 is a sectional view of a photovoltaic element according to the third embodiment of the present invention. In FIG. 5, the same elements as those in FIGS. 3 and 4 are designated by the same reference numerals, and the description thereof will be omitted. The structure of FIG. 5 corresponds to that of FIG.
Alternatively, the following operational effects are obtained in addition to the operational effects provided by the structure shown in FIG.
【００３２】図４の構造に対する図５の構造の相違点
は、ｎ+型半導体層２０とｐ+型半導体層２２との間に形
成された溝の形状にある。すなわち、溝の形状がＶ字型
とされており、ｐ+型半導体層２２又はｎ+型半導体層２
０と半導体基板１０とが接する部分の面積よりも、ｐ+
型半導体層２２又はｎ+型半導体層２０と正電極３２又
は負電極３０とが接する部分の面積が小さくなってい
る。The structure of FIG. 5 is different from the structure of FIG. 4 in the shape of the groove formed between the n + type semiconductor layer 20 and the p + type semiconductor layer 22. That is, the shape of the groove is V-shaped, and the p + type semiconductor layer 22 or the n + type semiconductor layer 2 is formed.
0 is smaller than the area where the semiconductor substrate 10 is in contact with p +
The area of the portion where the type semiconductor layer 22 or the n + type semiconductor layer 20 is in contact with the positive electrode 32 or the negative electrode 30 is small.
【００３３】半導体層２０，２２と電極３０，３２との
接触面積は、大きすぎるとキャリアの再結合が促進され
るため、接触抵抗が問題にならない程度にまで小さいこ
とが好ましい。If the contact area between the semiconductor layers 20 and 22 and the electrodes 30 and 32 is too large, the recombination of carriers is promoted. Therefore, it is preferable that the contact resistance is small enough not to cause a problem.
【００３４】図５の構造の光起電力素子においては、絶
縁性物質４０上に電極３０，３２を形成することができ
るため、半導体層２０，２２と電極３０，３２との接触
面積を増加することなく電極３０，３２の面積を大きく
することができる。その結果、電極の抵抗による損失を
低減することができる。In the photovoltaic device having the structure shown in FIG. 5, since the electrodes 30 and 32 can be formed on the insulating material 40, the contact area between the semiconductor layers 20 and 22 and the electrodes 30 and 32 is increased. The area of the electrodes 30 and 32 can be increased without the need. As a result, the loss due to the resistance of the electrodes can be reduced.
【００３５】また、図５の構造の光起電力素子において
は、表面に垂直な入射光に対して垂直でない面を溝が備
えているため、裏面側まで到達した光は斜め方向に反射
する。その結果、光閉じ込め効果がある。Further, in the photovoltaic device having the structure shown in FIG. 5, since the groove has a surface that is not perpendicular to the incident light that is perpendicular to the front surface, the light that reaches the back surface side is reflected obliquely. As a result, there is a light confinement effect.
【００３６】ここで、図５に示される光起電力素子の具
体的構造について説明すると、例えば、半導体基板１０
は、キャリア濃度１×１０15ｃｍ-3、厚さ１５０μｍを
有するｐ型Ｓｉ基板である。The specific structure of the photovoltaic element shown in FIG. 5 will now be described. For example, the semiconductor substrate 10
Is a p-type Si substrate having a carrier concentration of 1 × 10 15 cm −3 and a thickness of 150 μm.
【００３７】また、ｎ+型半導体層２０は、キャリア濃
度１×１０19ｃｍ-3、拡散深さ２μｍを有するｎ+型Ｓ
ｉ層である。同様に、ｐ+型半導体層２２は、キャリア
濃度１×１０19ｃｍ-3、拡散深さ２μｍを有するｐ+型
Ｓｉ層である。The n + type semiconductor layer 20 is an n + type S having a carrier concentration of 1 × 10 19 cm -3 and a diffusion depth of 2 μm.
It is the i layer. Similarly, the p + type semiconductor layer 22 is a p + type Si layer having a carrier concentration of 1 × 10 19 cm −3 and a diffusion depth of 2 μm.
【００３８】また、負（−）電極３０は、膜厚２μｍを
有するＡｌ電極である。同様に、正（＋）電極３２は、
膜厚２μｍを有するＡｌ電極である。また、絶縁性物質
４０は、ＳｉＯ2である。The negative (-) electrode 30 is an Al electrode having a film thickness of 2 μm. Similarly, the positive (+) electrode 32 is
It is an Al electrode having a film thickness of 2 μm. The insulating material 40 is SiO 2 .
【００３９】なお、半導体基板１０としては、Ｓｉ基板
に代えて、Ｇｅ、ＳｉＧｅ、ＳｉＣ、ＣＳｉＧｅ等の基
板を用いることができる。As the semiconductor substrate 10, a substrate of Ge, SiGe, SiC, CSiGe or the like can be used instead of the Si substrate.
【００４０】また、図５に示される構造では、Ｖ字型の
溝が形成されているが、図６に示されるように、円弧状
の溝を形成するようにしても、あるいは、図７に示され
るように、階段状の溝を形成するようにしてもよい。た
だし、図７に示されるように階段状の溝を形成する場合
にあっては、光閉じ込めの効果はない。Although the V-shaped groove is formed in the structure shown in FIG. 5, an arc-shaped groove may be formed as shown in FIG. As shown, a stepped groove may be formed. However, in the case of forming a stepped groove as shown in FIG. 7, there is no light confinement effect.
【００４１】[0041]
【発明の効果】以上説明したように、本発明によれば、
裏面電極型光起電力素子において、裏面に拡散層として
設けられるｐ+型層とｎ+型層とが電気的に分離されるこ
とで、トンネル効果によりそれらの間をリーク電流が通
り抜けるのが防止され、性能の向上が図られる。As described above, according to the present invention,
In the back electrode type photovoltaic element, the p + type layer and the n + type layer provided as a diffusion layer on the back surface are electrically separated from each other, so that the leakage current is prevented from passing through them due to the tunnel effect. The performance is improved.
【図１】ｐ+型層及びｎ+型層からなる拡散層が裏面全体
に形成された従来の裏面電極型光起電力素子の構造を示
す断面図である。FIG. 1 is a cross-sectional view showing the structure of a conventional back electrode type photovoltaic element in which a diffusion layer including ap + type layer and an n + type layer is formed on the entire back surface.
【図２】ｐ+型層とｎ+型層とが隣り合うときのエネルギ
ーバンド構造を示す図である。FIG. 2 is a diagram showing an energy band structure when ap + type layer and an n + type layer are adjacent to each other.
【図３】本発明の第１実施形態に係る光起電力素子の断
面図である。FIG. 3 is a cross-sectional view of the photovoltaic element according to the first embodiment of the present invention.
【図４】本発明の第２実施形態に係る光起電力素子の断
面図である。FIG. 4 is a sectional view of a photovoltaic element according to a second embodiment of the present invention.
【図５】本発明の第３実施形態に係る光起電力素子の断
面図である。FIG. 5 is a sectional view of a photovoltaic element according to a third embodiment of the present invention.
【図６】第３実施形態の変形例を示す断面図である。FIG. 6 is a cross-sectional view showing a modified example of the third embodiment.
【図７】第３実施形態の他の変形例を示す断面図であ
る。FIG. 7 is a sectional view showing another modification of the third embodiment.
１０…ｐ型又はｎ型の半導体基板 ２０…ｎ+型半導体層 ２２…ｐ+型半導体層 ３０…負（−）電極 ３２…正（＋）電極 ４０…絶縁性物質10 ... P-type or n-type semiconductor substrate 20 ... N + type semiconductor layer 22 ... P + type semiconductor layer 30 ... Negative (-) electrode 32 ... Positive (+) electrode 40 ... Insulating material
Claims (3)
体基板のキャリア濃度よりも高いキャリア濃度を有する
ｐ+型半導体層及びｎ+型半導体層と、 前記ｐ+型半導体層及びｎ+型半導体層にそれぞれ接続さ
れた正電極及び負電極と、 を備えた裏面電極型の光起電力素子において、 前記ｐ+型半導体層と前記ｎ+型半導体層との間に溝が形
成されていることを特徴とする光起電力素子。1. A semiconductor substrate, is formed by diffusion on the rear surface of the semiconductor substrate, a p + -type semiconductor layer and the n + -type semiconductor layer having a higher carrier concentration than the carrier concentration of the semiconductor substrate, the p + -type A back electrode type photovoltaic device comprising a positive electrode and a negative electrode connected to a semiconductor layer and an n + -type semiconductor layer, respectively, wherein the p + -type semiconductor layer and the n + -type semiconductor layer are between A photovoltaic device having a groove formed therein.
とを特徴とする、請求項１に記載の光起電力素子。2. The photovoltaic device according to claim 1, wherein the groove is filled with an insulating material.
前記半導体基板とが接する部分の面積よりも、前記ｐ+
型半導体層又はｎ+型半導体層と前記正電極又は負電極
とが接する部分の面積が小さくなるように、前記溝が形
成されていることを特徴とする、請求項２に記載の光起
電力素子。3. The area of the p + -type semiconductor layer or the n + -type semiconductor layer and the p +
The photovoltaic device according to claim 2, wherein the groove is formed so that an area of a portion where the positive type semiconductor layer or the n + type semiconductor layer is in contact with the positive electrode or the negative electrode is small. element.
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