JP2002353838A - Direct conversion receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a direct conversion receiver that can surely detect that an unexpected single carrier is leaked to a signal via an antenna so as to cause hindrance to substantial reception performance and detect an adverse effect caused by substantial existence of a single carrier with the same frequency as the frequency of the received signal without fail. SOLUTION: The direct conversion receiver has a reference oscillator 25 including; a 1st means that obtains reception C/N information and BER information generated by a demodulator 23; a 2nd means that generates a control data signal CONT on the basis of the information obtained by the 1st means; and a 3rd means that controls the demodulation signal obtained by the 2nd means so as to be given to a mixer 24, where its output terminal is connected to a 1st input terminal of a phase comparator 26 and an output terminal of a frequency divider 29 is connected to a 2nd input terminal of the phase comparator 26. The frequency divider 29 is controlled by a signal outputted from a microcomputer 22. The output terminal of the phase comparator 26 is connected to an input terminal of a voltage-controlled oscillator 28 via a low pass filter 27, its 1st output terminal is connected to a control terminal of the frequency divider 29 and a 2nd output terminal is connected to the input terminal of the mixer 24.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a direct conversion for directly demodulating a signal obtained by radio wave reception based on a demodulation signal having the same frequency as a received signal frequency when demodulating a signal obtained by a demodulation circuit section. It relates to improvement of a receiver.

[0002]

2. Description of the Related Art A conversion receiver having a demodulation circuit for converting a reception signal obtained by receiving a radio wave such as a satellite broadcast into an image signal of a predetermined format such as an MPEG output, as shown in FIG. A signal of a predetermined band is extracted from the BSIF signal obtained by
The signal is supplied to one input of the mixer 3 via the GC amplifier 2, and the output of the reference oscillator 4 is supplied to the other input.

The frequency of this reference oscillator 4 is controlled by a PLL circuit 5 so as to be lower than the frequency of the received signal by, for example, 480 MHz, and the output of the mixer 3 is passed through an amplifier 6 and a band pass filter 7 to an AGC amplifier. 8 is supplied. This AGC amplifier 8 and the aforementioned AG
The gain of each of the C amplifiers 2 is controlled by a control signal from the demodulator 17.

The output of the AGC amplifier 8 is supplied to first input terminals of a mixer 9 and a mixer 10, respectively. A second input terminal of the mixer 9 has a reference oscillator 1
A signal obtained by shifting the output of 1 by 90 degrees by the phase shifter 12 is supplied. The output of the reference oscillator 11 is shifted by 0 degrees by the phase shifter 12 to the second input terminal of the mixer 10. Signal is supplied.

The output of the mixer 9 is input as an I signal to a demodulator 17 via an amplifier 13 and a low-pass filter 14 in sequence, while the output of the mixer 10 is
5 and a demodulator 17 through a low-pass filter 16 sequentially.
The signal is input as a Q signal, and is converted by a demodulator 17 into a TS signal which is a demodulated output of a predetermined format.

[0006] Such a superheterodyne receiver has been the mainstream until recently, but has recently been shifted to a direct conversion receiver which directly demodulates at the same frequency as the frequency of a received signal. I have.

[0007] The basic circuit configuration of such a direct conversion receiver is a circuit configuration as shown in FIG. 4 by removing circuit members 1 to 7 shown in FIG. 3. The BSIF signal is a high-pass filter. After the high frequency component is extracted by 18, the signal is input to the AGC amplifier 8,
The output is supplied to respective first input terminals of the mixer 9 and the mixer 10. The output of the reference oscillator 11 a is supplied to the second input terminal of the mixer 9 by the phase shifter 12.
The phase-shifted signal is supplied, and the second
The input terminal is supplied with a signal obtained by performing a 0-degree phase shift on the output of the reference oscillator 11 a by the phase shifter 12.

The reference oscillator 11a is controlled by the PLL circuit 11b to have a frequency equal to the frequency of the BSIF signal.

The output of the mixer 9 is supplied to the amplifier 1
3 and the demodulator 17 via the low-pass filter 14 in order.
, While the output of the mixer 10 is input as a Q signal to a demodulator 17 via an amplifier 15 and a low-pass filter 16 in order. This amplifier 1
Each of the amplifier 3 and the amplifier 15 is configured as an AGC amplifier whose gain is controlled by a control signal from the demodulator 17.

Therefore, the direct conversion receiver shown in FIG. 4 has a demodulator 17 directly in a predetermined format with a "demodulation signal" having the same frequency as the "reception signal" which is the frequency of the BSIF signal. Is converted into a TS signal which is a demodulated output of

[0011]

In the conventional direct conversion receiver, circuit components are designed so that stable reception can be performed over a wide reception band, for example, from 950 MHz to 2150 MHz, such as satellite broadcast reception. Since the frequency of the "demodulation signal" of the "received signal" is equal, the output of D
Since an adverse effect such as generation of the C component is exerted, the frequency of the oscillation is devised to be set to an integer fraction of the actually required frequency.

However, in the case of the direct conversion receiver, since a single carrier having the same frequency as the frequency of the received signal always exists in the circuit in principle, the absolute level in the characteristics of the multiplication function also increases. I have.

A plurality of direct conversion receivers identical to those shown in FIG. 4 are provided as a first circuit section 20 and a second circuit section 21 as shown in FIG.
0a and the input terminal 21a via the signal distributor 19, respectively.
The leak component c generated due to the output of the first circuit unit 2
0 leaks to the signal distributor 19 through the input terminal 20a, and leaks as leak component d to the second circuit unit 21 via the input terminal 21a via leak components a and b generated inside the signal distributor 19. Will be.

Conversely, the reference oscillator 11a of the second circuit section 21
The frequency component generated due to the output of the second circuit unit 21 leaks to the signal distributor 19 side through the input terminal 21a of the second circuit unit 21 in a direction opposite to the above-described leak component d, and the leakage generated inside the signal distributor 19 The components a and b leak to the first circuit section 20 via the input terminal 20a and leak out.

Although such a leak has a low level,
It is difficult to prevent it because it is performed directly through the antenna wiring or indirectly through other members, and even if the specific direct conversion receiver itself has its prevention measures, There is a problem that an unexpected single carrier leaks into a signal via an antenna, which hinders the original receiving performance.

In this phenomenon, even if the signal of the direct conversion receiver is observed with a spectrum analyzer, the desired signal is a broadband PKS modulated wave as shown in FIG. 6, and leak carriers are buried therein. Since it occurs even at the level, there is a case where it is not clear from observation of the signal unless the resolution bandwidth is extremely narrow.

Therefore, an object of the present invention is to provide an unexpected single carrier that leaks into a signal via an antenna and impairs the original receiving performance, or that a single carrier having the same frequency as the frequency of a received signal is generated. An object of the present invention is to provide a direct conversion receiver capable of reliably detecting an adverse effect due to the presence of a direct conversion circuit.

[0018]

In order to solve the above problems, a direct conversion receiver according to the present invention comprises:
The following characteristic configuration is adopted.

(1) A direct conversion receiver for directly demodulating a signal obtained by radio wave reception based on a demodulation signal having the same frequency as a reception signal frequency when demodulating a signal obtained by radio wave reception. First means for obtaining reception C / N information obtained based on the I signal and the Q signal generated by the demodulation circuit unit and bit error rate information obtained from the reception C / N information; A second means for generating based on the information obtained by the first means; and a third means for controlling the demodulation signal obtained by the second means to be input to the demodulation circuit unit. Direct conversion receiver.

(2) The third means of the above (1) comprises the second means
A direct conversion receiver configured to automatically input the demodulation signal obtained by the means to the demodulation circuit unit.

(3) The third means of the above (1) comprises the second means
A direct conversion receiver configured to be capable of giving a command to manually input the demodulation signal obtained by the means to the demodulation circuit unit when the user detects that the reception state is poor.

(4) The second means of the above (1) is a direct conversion receiver configured to obtain prediction data from actually measured reception C / N information.

(5) The second means of the above (1) is a direct conversion receiver configured to obtain predicted data from actually measured bit error rate information.

(6) The first means according to any one of (1) to (5), wherein the error value of the bit error rate information obtained based on the I signal and the Q signal generated by the demodulation circuit section is A direct conversion receiver configured to prohibit a subsequent process when the value is equal to or less than a predetermined value.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below in detail with reference to FIGS. First, the circuit configuration of the direct conversion receiver of the present embodiment will be described. The signal form to the demodulator 23 and the mixer 24 included in the main circuit forming the direct conversion receiver is according to the present invention, When the demodulator 23 demodulates the obtained signal, the demodulator 23 performs direct conversion reception such that demodulation is performed directly with the demodulation signal input to the mixer 24 based on the demodulation signal having the same frequency as the reception signal frequency. Machine is configured.

That is, the I signal generated by the demodulator 23 and Q
Receiving C / N information obtained based on the signal,
N means for obtaining bit error rate (BER) information obtained from N information, second means for generating a control data signal (CONT) generated based on the information obtained by the first means, and this second means And a third means for controlling the demodulation signal obtained in step (1) to be input to the mixer 24 to constitute the direct conversion receiver according to the present embodiment.

Further, a microcomputer 22 for controlling the entire main circuit of the direct conversion receiver in a complex manner is provided, and a memory (not shown) is connected to the microcomputer 22, and a series of predetermined programs are executed in the memory. In addition, data for performing the operation is fixedly stored, and writing and reading of data temporarily required for performing an intended operation can be performed.

Further, a reference oscillator 25 is provided, the output terminal of which is connected to the first input terminal of the phase comparator 26, and the output terminal of the frequency divider 29 is connected to the second input terminal of the phase comparator 26. ing. The frequency divider 29 is controlled by a signal output from the microcomputer 22.

The output terminal of the phase comparator 26 is connected to the input terminal of a voltage controlled oscillator 28 via a low-pass filter 27, and the first output terminal is connected to the control terminal of the frequency divider 29 and Two output terminals are connected to the input terminal of the mixer 24.

Therefore, when the tuning operation is performed in the normal operation, the microcomputer 22 generates frequency division ratio data for generating an oscillation frequency in a circuit block or the like of the PLL following the information of the received transport stream. Divider 29
Send to

At this time, I is obtained by actually performing frequency lock and demodulation by the demodulator 23.
The received C / N signal can be estimated based on the signal and the Q signal, and the BER signal of the received signal can be measured (measured) by performing the Viterbi decoding and Reed-Solomon decoding processes performed by the demodulator 23. Such C / N signal and BE
Since there is a characteristic having a constant curve such as the symbol e shown in FIG. 2 between the R signal and the R signal, the BER signal data can be predicted from the actually measured C / N signal data.

Here, if the BER signal is deteriorated for some reason, the data of the actually measured BER signal indicates a worse value than the data of the predicted BER signal.
Therefore, by storing the characteristic curves (for example, symbol e in FIG. 2) of the C / N signal and the BER signal, which the direct conversion receiver will show, in advance as a data table, interference from other direct conversion receivers can be obtained. Even if it is not completely a wave, it can almost certainly detect that some interference is added to its own direct conversion receiver.

In such data determination of the BER signal, when the error value of the bit error rate information obtained based on the I signal and the Q signal generated by the demodulator 23 is smaller than a predetermined value, the detection error is large. Since it is difficult to make an accurate determination, for example, when the power is less than 10 −6, the subsequent processing may be controlled to be prohibited. For a value out of the prediction, a certain threshold value is provided to determine the value. If this is not done, unnecessary corrections will be constantly made, so the threshold is set to prevent this.

C / N obtained from the signal received by the main circuit
Each data of the signal and the BER signal is determined by the microcomputer 22, and the predicted BER signal obtained based on the actually measured C / N signal is compared with the actually measured BER signal.

Here, if D0 = (actual BER signal)-(predicted BER signal) -threshold, when D0 ≧ 0, the frequency division ratio data is resent to the PLL circuit block. The division ratio data sent here is not the division ratio N for normal reception but N ± n. Where n is an integer of 1, 2, 3
.. K.

In the PLL circuit block, the oscillation frequency can be changed at a frequency that is a fraction of a reference frequency, so that by changing the value of n, the oscillation frequency changes according to the above-described steps. Where Dn
+ Is the (measured BER signal)-(predicted BER signal) -calculated value of the threshold when the dividing ratio is N + n, and Dn- is (actually measured BER signal)-(predicted BER) when the dividing ratio is N-n. Signal) -the calculated value of the threshold.

Therefore, after re-tuning is once performed at the frequency division ratio of N + 1, data comparison between the predicted BER signal and the actually measured BER signal is performed in the same manner as described above, and if the relationship of D1 ≧ 0 is reproduced and D1 ≦ If D0, N + 2 data is sent and the above operation is repeated. If D1 ≧ D0, the operation is performed in the direction of N−n, and the operation in the minus direction is the same as the operation in the following plus direction, and the description thereof is omitted.

Assuming that the operation is performed in a good direction by such correction, Dk ≦ 0 when the frequency division ratio is k.

In this state, the control may be stopped.
Since there is a possibility that the control may be further improved by continuing the control, the control of N + k + 1 is also performed, the control is continued until Dk <Dk + 1, or until n = K, and finally, n = k or K is retransmitted and stopped. As described above, since the problem of frequency tracking in the direct conversion receiver and the interference by a single carrier greatly affect the reception characteristics near the reception center frequency, an upper limit value of n (K) is set for this operation. It is desirable to keep.

In the above description, the BER signal and C
Although the control operation is automatically started from each data of the / N signal, the user may be given a command to manually input when it is detected that the reception state is bad. Alternatively, the configuration may be such that the automatic mode and the manual mode can be selected in advance.

[0041]

As is apparent from the above description, the direct conversion receiver according to the present invention obtains the actual BER signal and the predicted BER signal based on the actually measured C / N signal to obtain an accurate frequency output. As a result, unexpected single carriers leak into the signal via the antenna and hinder the original reception performance, or a single carrier having the same frequency as the frequency of the received signal always exists inside the circuit. Thus, it is possible to provide a direct conversion receiver capable of reliably detecting an adverse effect caused by performing a direct conversion.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram illustrating a main circuit of a direct conversion receiver according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a correlation between a BER signal and a C / N signal of the direct conversion receiver shown in FIG.

FIG. 3 is a circuit block diagram showing an example of a circuit of a conventional superheterodyne receiver.

FIG. 4 is a circuit block diagram illustrating an example of a circuit of a conventional direct conversion receiver.

FIG. 5 is a circuit block diagram for explaining a problem when a plurality of direct conversion receivers shown in FIG. 4 are used.

FIG. 6 is a diagram showing a frequency spectrum of the direct conversion receiver shown in FIG. 5;

[Explanation of symbols]

 22 Microcomputer 23 Demodulator 24 Mixer 25 Reference Oscillator 26 Phase Comparator 27 Low-Pass Filter 28 Voltage Controlled Oscillator 29 Divider

Claims (6)

[Claims] 1. A direct conversion receiver for directly demodulating a signal obtained by radio wave reception based on a demodulation signal having the same frequency as a reception signal frequency when demodulating a signal obtained by radio wave reception. First means for obtaining reception C / N information obtained based on the I signal and the Q signal generated by the circuit unit and bit error rate information obtained from the reception C / N information; A second means for generating based on the information obtained by the first means; and a third means for controlling the demodulation signal obtained by the second means to be input to the demodulation circuit section. Direct conversion receiver characterized by the following. 2. The direct conversion according to claim 1, wherein the third means is configured to automatically input the demodulation signal obtained by the second means to the demodulation circuit. Receiving machine. 3. The third means gives a command to manually input the demodulation signal obtained by the second means to the demodulation circuit when the user detects that the reception state is bad. The direct conversion receiver according to claim 1, wherein the direct conversion receiver is configured to obtain the direct conversion. 4. The direct conversion receiver according to claim 1, wherein said second means is configured to obtain prediction data from actually measured reception C / N information. 5. The direct conversion receiver according to claim 1, wherein said second means is configured to obtain predicted data from actually measured bit error rate information. 6. The method according to claim 1, wherein the first means inhibits a subsequent process when an error value of bit error rate information obtained based on the I signal and the Q signal generated by the demodulation circuit unit is equal to or less than a predetermined value. The direct conversion receiver according to any one of claims 1 to 5, wherein the direct conversion receiver is configured to perform the following.