JP3898908B2 - Direct conversion receiver - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an improvement of a direct conversion receiver that directly performs demodulation based on a demodulation signal having the same frequency as the reception signal frequency when a demodulation circuit unit demodulates a signal obtained by radio wave reception.
[0002]
[Prior art]
A conversion receiver having a demodulation circuit that converts a received signal obtained by receiving radio waves such as satellite broadcasting into an image signal of a predetermined format such as an MPEG output is obtained by receiving, for example, as shown in FIG. A signal in a predetermined band is extracted from the BSIF signal by the bandpass filter 1 and supplied to one input of the mixer 3 via the AGC amplifier 2, and the output of the reference oscillator 4 is supplied to the other input.
[0003]
The frequency of the reference oscillator 4 is controlled by the PLL circuit 5 so as to be lower than the frequency of the received signal by, for example, 480 MHz, and the output of the mixer 3 is supplied to the AGC amplifier 8 via the amplifier 6 and the bandpass filter 7. Is done. The gain of each of the AGC amplifier 8 and the AGC amplifier 2 is controlled by a control signal from the demodulator 17.
[0004]
The output of the AGC amplifier 8 is supplied to the first input terminals of the mixer 9 and the mixer 10. A signal whose phase shift by the phase shifter 12 is 0 degree is supplied to the second input terminal of the mixer 9, and the output of the reference oscillator 11 is shifted to the second input terminal of the mixer 10. The phase shifter 12 supplies a signal that has been phase shifted by 90 degrees.
[0005]
The output of the mixer 9 is input as an I signal to the demodulator 17 through the amplifier 13 and the low-pass filter 14 in sequence, while the output of the mixer 10 is demodulated through the amplifier 15 and the low-pass filter 16 in sequence. 17 is input as a Q signal and converted by a demodulator 17 into a TS signal which is a demodulated output of a predetermined format.
[0006]
Such superheterodyne receivers have been mainstream until recently, but recently they have shifted to direct conversion receivers that directly perform demodulation at the same frequency as the frequency of the received signal.
[0007]
The basic circuit configuration of the direct conversion receiver is obtained by removing the circuit members 1 to 7 shown in FIG. 3 and forming a circuit as shown in FIG. After the band component is extracted, it is input to the AGC amplifier 8, and its output is supplied to the first input terminals of the mixer 9 and the mixer 10. The second input of the mixer 9, the phase shift due to the output of the reference oscillator 11a to the phase shifter 12 is supplied with 0 degree signal, the second input of the mixer 10, the output of the reference oscillator 11a The phase shifter 12 supplies a signal that has been shifted by 90 degrees.
[0008]
The reference oscillator 11a is controlled by the PLL circuit 11b so as to have a frequency equal to the frequency of the BSIF signal.
[0009]
The output of the mixer 9 is input as an I signal to the demodulator 17 via the amplifier 13 and the low-pass filter 14 sequentially, while the output of the mixer 10 is sequentially supplied via the amplifier 15 and the low-pass filter 16. And input to the demodulator 17 as a Q signal. Each of the amplifier 13 and the amplifier 15 is configured as an AGC amplifier whose gain is controlled by a control signal from the demodulator 17.
[0010]
Therefore, the direct conversion receiver shown in FIG. 4 directly outputs a demodulated signal of a predetermined format by the demodulator 17 with a signal of “demodulation signal” having the same frequency as the frequency of the “reception signal” which is the frequency of the BSIF signal. Is converted into a TS signal.
[0011]
[Problems to be solved by the invention]
The conventional direct conversion receiver, the design of the individual circuit components to allow stable reception over a wide range, for example, from 950MHz reception band of satellite or the like to 2150MHz is taking place, the "receive signal""demodulation Since the frequency of the “signal” is equal, the leakage of the demodulation signal oscillated by itself causes a negative effect such as causing a DC component in the output. A device such as 1 is devised.
[0012]
However, in the case of a direct conversion receiver, a single carrier having the same frequency as the frequency of the received signal always exists in the circuit in principle, so that the absolute level on the characteristic of the multiplication function is also high.
[0013]
Also, the same plurality of direct conversion receivers as shown in FIG. 4 are provided as the first circuit unit 20 and the second circuit unit 21 as shown in FIG. 5, and the signal distributor 19 is connected to these input terminals 20a and 21a. In this case, a leak component c caused by the output of the reference oscillator 11a of the first circuit unit 20 leaks out to the signal distributor 19 side via the input terminal 20a of the first circuit unit 20. The leakage component d leaks to the second circuit portion 21 side via the input terminal 21a via the leakage components a and b generated in the signal distributor 19.
[0014]
On the contrary, the frequency component generated due to the output of the reference oscillator 11a of the second circuit unit 21 is in the direction opposite to the above-described leak component d via the input terminal 21a of the second circuit unit 21 on the signal distributor 19 side. Leaking to the first circuit section 20 side via the input terminal 20a via the leak components a and b generated inside the signal distributor 19.
[0015]
Although such leaks are low in level, they are difficult to prevent because they are performed directly through the antenna wiring or indirectly through other members. as well as preventive measures had been taken, there is a problem that a single carrier not expected to interfere with the original reception performance have leaks to the signal via an antenna.
[0016]
Even if the signal of the direct conversion receiver is observed with a spectrum analyzer, this phenomenon is a level at which the desired signal is a broadband PKS modulated wave as shown in FIG. 6 and leak carriers are buried therein. However, what happens is sometimes not clear from signal observations unless the resolution bandwidth is extremely narrow.
[0017]
Therefore, an object of the present invention is to cause an unexpected single carrier to leak into a signal through an antenna and hinder the original reception performance, or to have a single carrier having the same frequency as the frequency of the received signal inside the circuit. An object of the present invention is to provide a direct conversion receiver capable of reliably detecting an adverse effect based on the existence of a direct conversion receiver.
[0018]
[Means for Solving the Problems]
In order to solve the above-described problems, the direct conversion receiver according to the present invention employs a characteristic configuration as described below.
[0019]
(1) In a direct conversion receiver that directly demodulates a signal obtained by radio wave reception based on a demodulation signal having the same frequency as the received signal frequency when demodulating a signal obtained by a demodulation circuit unit,
Viterbi decoding processing in the demodulation circuit unit is performed on the received C / N information based on the I signal and the Q signal generated in the demodulation circuit unit and the predicted bit error rate information predicted from the received C / N information. Means for obtaining measured bit error rate information obtained by performing ,
Comparison means for comparing the measured bit error rate and the predicted bit error rate;
Frequency changing means for changing the frequency of the demodulation signal when the measured bit error rate in the comparison result of the comparison means is greater than or equal to a predetermined value compared to the predicted bit error rate; ,
Direct conversion receiver comprising a.
[0020]
(2) The direct conversion receiver that ends the frequency changing operation by the frequency changing means of (1) when the comparison result of the comparing means becomes smaller than the predetermined value .
[0021]
(3) The direct conversion receiver that ends when the frequency changing operation by the frequency changing means of (1) is changed a predetermined number of times .
[0025]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. 1 and FIG. First, the circuit configuration of the direct conversion receiver according to the present embodiment will be described. The signal form to the demodulator 23 and the mixer 24 included in the main circuit constituting the direct conversion receiver is according to the present invention. When the demodulator 23 demodulates the signal obtained in this way, direct conversion reception is performed so that demodulation is performed directly with the demodulation signal input to the mixer 24 based on the demodulation signal having the same frequency as the reception signal frequency. The machine is configured.
[0026]
That is, the first means for obtaining the received C / N information obtained based on the I signal and the Q signal generated by the demodulator 23, and the bit error rate (BER) information obtained from the received C / N information, and the first means. Second means for generating a control data signal (CONT) generated based on information obtained by one means, and third means for controlling the demodulation signal obtained by the second means to be input to the mixer 24 The direct conversion receiver according to the present embodiment is configured.
[0027]
In addition, a microcomputer 22 is provided for controlling the entire main circuit of the direct conversion receiver in a complex manner, and a memory (not shown) is connected to the microcomputer 22 for executing a series of predetermined programs. Data is stored in a fixed manner, and data that is temporarily required to perform an intended operation can be written and read.
[0028]
Further, a reference oscillator 25 is provided, and its output terminal is connected to the first input terminal of the phase comparator 26, and the output terminal of the frequency divider 29 is connected to the second input terminal of this phase comparator 26. The frequency divider 29 is controlled by a signal output from the microcomputer 22.
[0029]
The output terminal of the phase comparator 26 is connected to the input terminal of the voltage controlled oscillator 28 via the low-pass filter 27. The first output terminal is connected to the control terminal of the frequency divider 29 and the second output terminal. Is connected to the input end of the mixer 24.
[0030]
Therefore, when the channel selection operation is performed in the normal operation, the microcomputer 22 generates frequency division ratio data for generating an oscillation frequency in the PLL circuit block or the like following the information of the received transport stream, and performs frequency division. To the device 29.
[0031]
At this time, the received C / N signal can be estimated from the I signal and the Q signal obtained by actually performing the frequency lock and demodulating by the demodulator 23, and Viterbi decoding and Reed-Solomon decoding executed by the demodulator 23 can be performed. By performing the processing, the BER signal of the reception signal can be measured (actual measurement). Since the C / N signal and the BER signal have a certain curve such as the symbol e shown in FIG. 2, for example, the BER signal data is obtained from the actually measured C / N signal data. Can be predicted.
[0032]
Here, if the BER signal deteriorates for some reason, the actually measured BER signal data shows a worse value than the predicted BER signal data. Therefore, the characteristic curve (for example, symbol e in FIG. 2) of the C / N signal and the BER signal that the direct conversion receiver will show is stored in advance as a data table, thereby preventing interference from other direct conversion receivers. Even if it cannot be said to be a complete wave, it can be detected with certainty that some sort of disturbing wave is applied to its direct conversion receiver.
[0033]
Such data determination of the BER signal is performed when the error value of the bit error rate information obtained based on the I signal and the Q signal generated by the demodulator 23 is equal to or less than a predetermined value (for example, 10 −6). The detection error is large and accurate determination becomes difficult . In addition, for a value that is out of prediction, if a certain threshold value is not used for determination, unnecessary correction is constantly performed. Therefore, the threshold value is set to prevent this.
[0034]
Each data of the C / N signal and the BER signal obtained from the signal received by the main circuit is judged by the microcomputer 22, and the predicted BER signal obtained based on the actual C / N signal is compared with the actual BER signal. .
[0035]
Here, if D0 = (actually measured BER signal) − (predicted BER signal) −threshold, when D0 ≧ 0, the division ratio data is sent again to the PLL circuit block. The division ratio data sent here is not the normal reception division ratio N but N ± n. Here, n is an integer 1, 2, 3,.
[0036]
In the PLL circuit block, the oscillation frequency can be changed at a frequency that is a fraction of an integer of the reference frequency. Therefore, by changing the value of n, the oscillation frequency is changed according to the above-described steps. Here, Dn + is (measured BER signal) at the frequency division ratio N + n− (predicted BER signal) −calculated value of threshold value, and Dn− is (actually measured BER signal) at the frequency division ratio N−n− (Predicted BER signal) −A calculated value of a threshold value.
[0037]
Therefore, after re-tuning with a frequency division ratio of N + 1, the data comparison between the predicted BER signal and the measured BER signal is performed in the same manner as described above. If the relationship of D1 ≧ 0 is reproduced and D1 ≦ D0, Send N + 2 data and repeat the above operation. Further, if D1 ≧ D0, the operation is performed in the direction of N−n, and the operation in the minus direction is omitted because the same operation is performed in the following plus direction.
[0038]
If the operation is performed in a good direction by such correction, Dk ≦ 0 when the frequency division ratio is k.
[0039]
The control may be stopped in this state, but if the control is continued continuously, the control may be further improved. Therefore, the control of N + k + 1 is also performed, and the control continues until Dk <Dk + 1 or n = K, and finally n = k Or send K again and stop. As described above, the problem of frequency tracking in the direct conversion receiver and the interference due to a single carrier greatly affect the reception characteristics in the vicinity of the reception center frequency, so an upper limit value of n (K) is set for this operation. It is desirable to keep it.
[0040]
In the description so far, the control operation is automatically started from the data of the BER signal and the C / N signal. However, when the user senses that the reception state is bad, the command that the user manually inputs is detected. The automatic mode and the manual mode may be selected in advance.
[0041]
【The invention's effect】
As is clear from the above description, the direct conversion receiver according to the present invention obtains an accurate frequency output by obtaining a predicted BER signal based on the measured BER signal and the measured C / N signal . An undesired single carrier leaks into the signal via the antenna and interferes with the original reception performance, or a single carrier with the same frequency as the received signal always exists inside the circuit. The direct conversion receiver which can detect reliably is provided.
[Brief description of the drawings]
FIG. 1 is a circuit block diagram showing a main circuit of a direct conversion receiver according to an embodiment of the present invention.
FIG. 2 is a characteristic diagram showing a correlation between a BER signal and a C / N signal of the direct conversion receiver shown in FIG.
FIG. 3 is a circuit block diagram showing an example of a circuit of a conventional superheterodyne receiver.
FIG. 4 is a circuit block diagram showing an example of a circuit of a conventional direct conversion receiver.
5 is a circuit block diagram for explaining a problem when a plurality of direct conversion receivers shown in FIG. 4 are used.
6 is a diagram showing a frequency spectrum of the direct conversion receiver shown in FIG. 5. FIG.
[Explanation of symbols]
22 Microcomputer 23 Demodulator 24 Mixer 25 Reference oscillator 26 Phase comparator 27 Low-pass filter 28 Voltage-controlled oscillator 29 Frequency divider

Claims (3)

In a direct conversion receiver that directly demodulates a signal obtained by radio wave reception based on a demodulation signal having the same frequency as the reception signal frequency when demodulating in a demodulation circuit unit,
Viterbi decoding processing in the demodulation circuit unit is performed on the received C / N information based on the I signal and the Q signal generated in the demodulation circuit unit and the predicted bit error rate information predicted from the received C / N information. Means for obtaining measured bit error rate information obtained by performing ,
Comparison means for comparing the measured bit error rate and the predicted bit error rate;
Frequency changing means for changing the frequency of the demodulation signal when the measured bit error rate in the comparison result of the comparison means is greater than or equal to a predetermined value compared to the predicted bit error rate; ,
Direct conversion receiver comprising: a. 2. The direct conversion receiver according to claim 1 , wherein the frequency changing operation by the frequency changing unit is terminated when a comparison result of the comparing unit becomes smaller than the predetermined value . 2. The direct conversion receiver according to claim 1 , wherein the frequency changing operation by the frequency changing unit is ended when the frequency is changed a predetermined number of times .

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