JP2002343935A - Power semiconductor module - Google Patents
Power semiconductor moduleInfo
- Publication number
- JP2002343935A JP2002343935A JP2001141057A JP2001141057A JP2002343935A JP 2002343935 A JP2002343935 A JP 2002343935A JP 2001141057 A JP2001141057 A JP 2001141057A JP 2001141057 A JP2001141057 A JP 2001141057A JP 2002343935 A JP2002343935 A JP 2002343935A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor module
- power semiconductor
- electrical insulating
- chip component
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 229920005989 resin Polymers 0.000 claims abstract description 9
- 239000011347 resin Substances 0.000 claims abstract description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 14
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 239000010949 copper Substances 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 150000002894 organic compounds Chemical class 0.000 claims description 6
- 239000003566 sealing material Substances 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 abstract description 14
- 239000012212 insulator Substances 0.000 abstract description 2
- 238000000465 moulding Methods 0.000 abstract 1
- 239000006071 cream Substances 0.000 description 5
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 239000000615 nonconductor Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000002305 electric material Substances 0.000 description 1
- -1 for example Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229920002379 silicone rubber Polymers 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は電力用半導体チップ
やチップ抵抗器などのチップ部品を一つのモジュール内
にはんだ付けして形成した電力用半導体モジュールに関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor module formed by soldering chip components such as a power semiconductor chip and a chip resistor in one module.
【0002】[0002]
【従来の技術】図4に従来の電力用半導体モジュールの
断面図を示し,図4によって従来の構造を説明する。表
面に銅回路3を形成した電気絶縁層2で金属基板1の片
面を覆い,銅回路3のランド5にチップ部品4がはんだ
8で固着され,回路基板11が完成し,この回路基板1
1を樹脂ケース21で囲み,上からエポキシ樹脂等の封
止材22で充填されて完成する電力用半導体モジュール
は電力制御等の用途に用いられる。チップ部品4の下部
と金属基板上の電気絶縁層とで挟まれた隙間6は熱伝導
率が良くない空気で充たされている。チップ部品4で発
生した熱が熱伝導で主として放出する経路は,微少断面
のはんだ8,ランド5,電気絶縁層2,とその下層の金
属基板1へと熱伝導して該金属基板から外部に放出して
いた。電力用半導体モジュールに通電する電力が大きく
なると内部で発生する熱が増し,チップ部品の接続部の
はんだ8の温度が高くなり通電時と停止時との温度差が
大きくなってはんだクラックが発生して接続不良となっ
て信頼性低下の原因となっていた。2. Description of the Related Art FIG. 4 is a sectional view of a conventional power semiconductor module, and the conventional structure will be described with reference to FIG. One surface of the metal substrate 1 is covered with an electric insulating layer 2 having a copper circuit 3 formed on the surface, and a chip component 4 is fixed to a land 5 of the copper circuit 3 with solder 8 to complete a circuit board 11.
1 is surrounded by a resin case 21 and is filled with a sealing material 22 such as an epoxy resin from above, and the completed power semiconductor module is used for applications such as power control. The gap 6 sandwiched between the lower part of the chip component 4 and the electrical insulating layer on the metal substrate is filled with air having poor thermal conductivity. The path in which the heat generated by the chip component 4 is mainly released by heat conduction is conducted by heat conduction to the solder 8, the land 5, the electric insulating layer 2, and the metal substrate 1 under the micro-section and from the metal substrate to the outside. Had released. When the power supplied to the power semiconductor module increases, the heat generated inside increases, the temperature of the solder 8 at the connection part of the chip component increases, and the temperature difference between when the power is supplied and when the power is stopped increases, causing solder cracks. As a result, the connection was poor and the reliability was reduced.
【0003】[0003]
【発明が解決しようとする課題】大電力を通電する電力
用半導体モジュールでは,はんだクラックが発生しやす
くなり寿命が低下するので,発生した熱の放出が効果的
に行われる電力用半導体モジュールの提供が本発明の課
題である。SUMMARY OF THE INVENTION In a power semiconductor module for supplying a large amount of power, a solder crack is apt to occur and its life is shortened. Therefore, a power semiconductor module in which generated heat is effectively released is provided. Is an object of the present invention.
【0004】[0004]
【課題を解決するための手段】チップ部品から発生する
熱を効果的に放出する為に,熱伝導率が悪い空気層の厚
みを極小にすることに着眼した。金属基板上に電気絶縁
層を介して設けられた銅回路のランドに,チップ部品を
はんだ付けし,樹脂ケースで囲まれ,該樹脂ケースの内
部に封止材が注入硬化される電力用半導体モジュールに
おいて,対向する一対のランド間の中間位置で,銅回路
の下層の電気絶縁層と,上記チップ部品とで挟まれる隙
間に対して,高熱伝導性電気絶縁部材を圧入させること
によってチップ部品表面から直に金属基板に熱伝導する
経路を形成して,従来の熱伝導経路に加えて熱放出させ
るようにした。Means for Solving the Problems In order to effectively release the heat generated from the chip components, the present inventors have focused on minimizing the thickness of the air layer having poor thermal conductivity. A power semiconductor module in which a chip component is soldered to a copper circuit land provided on a metal substrate via an electric insulating layer, surrounded by a resin case, and a sealing material is injected and cured inside the resin case. In the intermediate position between a pair of opposing lands, a high thermal conductive electrical insulating member is press-fitted into a gap sandwiched between an electrical insulating layer below a copper circuit and the above-mentioned chip component. A heat conduction path is formed directly on the metal substrate, and heat is released in addition to the conventional heat conduction path.
【0005】請求項2に関しては,高熱伝導性電気絶縁
部材はチップ部品及び部品取付基板に対して密着させる
為に,弾性を有するゴム状の有機化合物又は,無機物が
混錬されたゴム状の有機化合物で形成された部材とし
た。固体の電気絶縁物である有機化合物は空気より熱伝
導率が大きい。シリコンカーバイドのような無機物は熱
伝導率が大きくて,これをシリコンゴムで混錬して弾性
体の高熱伝導性電気絶縁部材を得て,チップ部品及び部
品取付基板に対して密着させるように挟み込むと効果的
な熱伝合経路が形成される。According to a second aspect of the present invention, the high heat conductive electrical insulating member is made of a rubbery organic compound having elasticity or a rubbery organic compound kneaded with an inorganic substance in order to adhere to the chip component and the component mounting board. The member was made of a compound. Organic compounds, which are solid electrical insulators, have higher thermal conductivity than air. Inorganic substances such as silicon carbide have a high thermal conductivity, and they are kneaded with silicon rubber to obtain an elastic, highly thermally conductive electrical insulating member, which is sandwiched so as to be in close contact with the chip component and component mounting board. Thus, an effective heat transfer path is formed.
【0006】請求項3に関しては,金属基板上に固着さ
れた電気絶縁層表面上のチップ部品の投影位置に,投影
面積と略同等,かつ,銅回路の厚さに略同等の高さに隆
起する電気絶縁層の凸部である部品載置台を形成し,こ
の部品載置台の上のチップ部品がランドに対してはんだ
付けされて,チップ部品と部品取付基板との空気の層を
極小にした。According to the third aspect, the projected position of the chip component on the surface of the electrical insulating layer fixed on the metal substrate is raised to a height substantially equal to the projected area and substantially equal to the thickness of the copper circuit. The component mounting table, which is the convex part of the electrical insulating layer to be formed, is formed, and the chip components on the component mounting table are soldered to the lands to minimize the air layer between the chip component and the component mounting board. .
【0007】[0007]
【発明の実施の形態】本発明の実施の一形態を図1およ
びその要部拡大図である図2によって説明する。金属基
板1の上に電気絶縁層2を介して銅回路3が形成され,
4のチップ部品がはんだ付けされるランド5が銅回路に
設けられている。クリームはんだを該ランドに印刷塗布
し,チップ部品の端子が該クリームはんだ上に載置され
た部分に光ビームを照射することで局部加熱されてはん
だが融解し,照射を停止して冷却すると,はんだ8が硬
化し,その後,必要部位にボンディングワイヤ7でボン
ディングすると回路が接続されて回路基板11が完成す
る。この回路基板を底部となるように樹脂ケース21で
囲んで固着し,上からエポキシ樹脂などの封止材22を
注入して加熱硬化する。このようにして形成した電力用
半導体モジュールは使用電力が大きくなるに従い内部発
熱量が多くなるので,この熱を効果的に放熱させる為に
チップ部品の銅回路への固着の前に次の工程を行う。チ
ップ部品4が固着される一対のランド5とランド51と
の間にゴム状の有機化合物に高熱伝導性の無機物,例え
ばシリコンカーバイドやベリリヤセラミックスを混錬し
てシート状にした高熱伝導性電気絶縁部材9(以下、伝
熱部材9と称する)を挟み込むようにしてチップ部品を
載置しランドのクリームはんだに光ビームを照射して加
熱し,はんだ付けが完了する。固着したチップ部品4の
下部と回路基板との間の隙間6には弾性を有する伝熱部
材9が,はさみ込まれておりチップの温度上昇は,従来
の伝熱部材9が無い場合より低い値となり半導体モジュ
ールの寿命,信頼性の向上に寄与した。DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIG. 1 and FIG. A copper circuit 3 is formed on a metal substrate 1 with an electric insulating layer 2 interposed therebetween.
Lands 5 to which the chip components 4 are soldered are provided on the copper circuit. The cream solder is printed and applied to the land, and the terminal of the chip component is irradiated with a light beam on the portion placed on the cream solder, whereby the solder is locally heated and melted. When the solder 8 is hardened and then bonded to the required portions with the bonding wires 7, the circuit is connected and the circuit board 11 is completed. The circuit board is surrounded and fixed by a resin case 21 so as to be the bottom, and a sealing material 22 such as an epoxy resin is injected from above and cured by heating. Since the power semiconductor module formed in this way generates a large amount of internal heat as the power used increases, the following steps must be performed before the chip components are fixed to the copper circuit in order to effectively dissipate this heat. Do. A highly thermally conductive electric material formed by kneading a rubbery organic compound with a highly thermally conductive inorganic material, for example, silicon carbide or beryllia ceramic, between a pair of lands 5 and the lands 51 to which the chip parts 4 are fixed. The chip component is placed so as to sandwich the insulating member 9 (hereinafter, referred to as the heat transfer member 9), and the cream solder on the land is irradiated with a light beam and heated to complete the soldering. A heat transfer member 9 having elasticity is interposed in the gap 6 between the lower part of the fixed chip component 4 and the circuit board, and the temperature rise of the chip is lower than that in the case where the conventional heat transfer member 9 is not provided. This contributed to the improvement of the life and reliability of the semiconductor module.
【0008】他の実施の形態では,図3に示すように,
金属基板1の上に固着した電気絶縁層2はベリリヤセラ
ミックスであり,熱伝導率は0.58を有し,アルミナ
の熱伝導率0.070に対し8倍以上も高い。(熱伝導
率の単位は,キロカロリー/平方センチ・秒・℃)この
ような電気絶縁物に接してチップ部品を搭載することに
着目したもので,金属基板1の上にベリリヤセラミック
スの電気絶縁層2を介して銅回路3が形成され,該銅回
路の厚みに相当する高さの部品載置台10が電気絶縁層
2に形成されている。チップ部品4がこの部品載置台に
載せられてランド5にはんだ付けされる。クリームはん
だを該ランドに印刷塗布し,チップ部品の端子が該クリ
ームはんだ上に載置された基板全体を加熱してもよく,
絶縁物が無機物のみであり,高い温度に耐えるので,光
ビームを照射することで局部加熱しなくてもよい。その
後,必要部位にボンディングワイヤ7でボンディングす
ると回路が接続されて回路基板11が完成する。この回
路基板11を底部となるように樹脂ケース21で囲んで
固着し,上からエポキシ樹脂などの封止材22を注入し
て加熱硬化するIn another embodiment, as shown in FIG.
The electrical insulating layer 2 fixed on the metal substrate 1 is made of beryllia ceramic and has a thermal conductivity of 0.58, which is at least 8 times higher than the thermal conductivity of alumina of 0.070. (The unit of thermal conductivity is kilocalories / square centimeter-second- ° C.) This focuses on mounting chip components in contact with such an electrical insulator. A copper circuit 3 is formed via the layer 2, and a component mounting table 10 having a height corresponding to the thickness of the copper circuit is formed on the electrically insulating layer 2. The chip component 4 is mounted on the component mounting table and soldered to the land 5. A cream solder may be printed and applied to the land, and the terminals of the chip component may heat the entire substrate placed on the cream solder,
Since the insulator is only an inorganic material and withstands high temperatures, it is not necessary to perform local heating by irradiating a light beam. Thereafter, the circuit is connected by bonding to a necessary portion with the bonding wire 7, and the circuit board 11 is completed. The circuit board 11 is surrounded and fixed by a resin case 21 so as to be the bottom, and a sealing material 22 such as an epoxy resin is injected from above and cured by heating.
【0009】図3に示した実施例で寸法精度をゆるめて
コストを下げる為には,チップ部品4が直に接している
部品載置台11の上に隙間が出来るので,隙間にシリコ
ンオイルのような毛細管現象で吸い上げて保持されるよ
うな耐熱性の液体を充顛させることも有効である。In the embodiment shown in FIG. 3, in order to loosen the dimensional accuracy and reduce the cost, a gap is formed on the component mounting table 11 with which the chip component 4 is in direct contact. It is also effective to fill a heat-resistant liquid that can be sucked up and held by a simple capillary phenomenon.
【0010】[0010]
【発明の効果】従来,チップ部品と回路基板の隙間に空
気が断熱していた部分に対して,熱伝導性を向上させた
ので,従来と同一の電力容量でのモジュールの回路基板
サイズを小さくすることが出来たのでコストが削減出来
て,省資源にも寄与した。チップ部品の温度を低く抑え
る事ができたので半導体モジュール全体の寿命,信頼性
の向上に寄与している。According to the present invention, the thermal conductivity is improved in a portion where air is insulated in the gap between the chip component and the circuit board, so that the size of the circuit board of the module with the same power capacity as the conventional one can be reduced. As a result, costs were reduced and resources were saved. Since the temperature of the chip components could be kept low, it contributed to the improvement of the life and reliability of the entire semiconductor module.
【図1】 本発明の実施形態を示す断面図である。FIG. 1 is a sectional view showing an embodiment of the present invention.
【図2】 本発明の実施形態を示す要部拡大図である。FIG. 2 is an enlarged view of a main part showing an embodiment of the present invention.
【図3】 本発明の他の実施形態を示す断面図である。FIG. 3 is a cross-sectional view showing another embodiment of the present invention.
【図4】 従来の回路装置の構造を示す断面図である。FIG. 4 is a cross-sectional view showing a structure of a conventional circuit device.
1 金属基板 2 電気絶縁層 3 銅回路 4 チップ部品 5 ランド 6 隙間 7 ボンディングワイヤ 8 はんだ 9 高熱伝導性電気絶縁部材(伝熱部材) 10 部品載置台 11 回路基板 21 樹脂ケース 22 封止材 51 ランド REFERENCE SIGNS LIST 1 metal substrate 2 electric insulating layer 3 copper circuit 4 chip component 5 land 6 gap 7 bonding wire 8 solder 9 high heat conductive electric insulating member (heat transfer member) 10 component mounting table 11 circuit board 21 resin case 22 sealing material 51 land
───────────────────────────────────────────────────── フロントページの続き (72)発明者 橘 秀久 大阪府大阪市東淀川区西淡路3丁目1番56 号 株式会社三社電機製作所内 (72)発明者 田中 成治 大阪府大阪市東淀川区西淡路3丁目1番56 号 株式会社三社電機製作所内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Hidehisa Tachibana 3-1-156 Nishi-Awaji, Higashi-Yodogawa-ku, Osaka-shi, Osaka Inside Sansha Electric Works, Ltd. (72) Inventor Seiji Tanaka Nishi-Higashi-Yodogawa-ku, Osaka-shi, Osaka Awaji 3-chome No. 1-56 Sansha Electric Manufacturing Co., Ltd.
Claims (3)
れた銅回路のランドに,チップ部品をはんだ付けし,樹
脂ケースで囲まれ,該樹脂ケースの内部に封止材が注入
硬化される電力用半導体モジュールにおいて,対向する
一対のランド間の中間位置で,銅回路の下層の電気絶縁
層と,上記チップ部品とで挟まれる隙間に対して,高熱
伝導性電気絶縁部材を圧入させたことを特徴とする電力
用半導体モジュール。1. A chip component is soldered to a land of a copper circuit provided on a metal substrate via an electrical insulating layer, surrounded by a resin case, and a sealing material is injected and cured inside the resin case. In the power semiconductor module, a high thermal conductive electrical insulating member is press-fitted into a gap between the lower electrical insulating layer of the copper circuit and the chip component at an intermediate position between a pair of opposing lands. A power semiconductor module characterized by the above-mentioned.
ゴム状の有機化合物又は,無機物が混錬されたゴム状の
有機化合物で形成された部材である請求項1記載の電力
用半導体モジュール。2. The power semiconductor module according to claim 1, wherein the high heat conductive electrical insulating member is a member formed of a rubbery organic compound having elasticity or a rubbery organic compound kneaded with an inorganic substance.
上のチップ部品の投影位置に,投影面積と略同等,か
つ,銅回路の厚さに略同等の高さに隆起する部品載置台
を形成し,この部品載置台の上のチップ部品がランドに
対してはんだ付けされている請求項1記載の電力用半導
体モジュール。3. A component mounting table which is raised at a projection position of a chip component on a surface of an electrical insulating layer fixed on a metal substrate to a height substantially equal to a projection area and substantially equal to a thickness of a copper circuit. 2. The power semiconductor module according to claim 1, wherein the chip component on the component mounting table is soldered to the land.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001141057A JP4672902B2 (en) | 2001-05-11 | 2001-05-11 | Power semiconductor module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001141057A JP4672902B2 (en) | 2001-05-11 | 2001-05-11 | Power semiconductor module |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2002343935A true JP2002343935A (en) | 2002-11-29 |
JP4672902B2 JP4672902B2 (en) | 2011-04-20 |
Family
ID=18987563
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001141057A Expired - Fee Related JP4672902B2 (en) | 2001-05-11 | 2001-05-11 | Power semiconductor module |
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JP (1) | JP4672902B2 (en) |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6161449A (en) * | 1984-09-03 | 1986-03-29 | Nec Corp | Multichip ic package |
JPS63249357A (en) * | 1987-04-04 | 1988-10-17 | Hitachi Ltd | semiconductor equipment |
JPH06275748A (en) * | 1993-03-18 | 1994-09-30 | Sharp Corp | Joining member |
JPH10135405A (en) * | 1996-11-01 | 1998-05-22 | Aisin Aw Co Ltd | Wiring board module |
JPH1118429A (en) * | 1997-06-24 | 1999-01-22 | Hitachi Ltd | Control module |
JP2000183252A (en) * | 1998-12-18 | 2000-06-30 | Kyocera Corp | Heat transfer compound |
JP2000265227A (en) * | 1999-03-16 | 2000-09-26 | Hitachi Ltd | Composite materials, their production methods and applications |
JP2000313905A (en) * | 1999-04-28 | 2000-11-14 | Hitachi Ltd | Composite materials and various applications |
JP2001015682A (en) * | 1999-06-28 | 2001-01-19 | Hitachi Ltd | Resin-sealed electronic device |
JP2001110962A (en) * | 1999-10-13 | 2001-04-20 | Denki Kagaku Kogyo Kk | Heat radiation spacer |
-
2001
- 2001-05-11 JP JP2001141057A patent/JP4672902B2/en not_active Expired - Fee Related
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6161449A (en) * | 1984-09-03 | 1986-03-29 | Nec Corp | Multichip ic package |
JPS63249357A (en) * | 1987-04-04 | 1988-10-17 | Hitachi Ltd | semiconductor equipment |
JPH06275748A (en) * | 1993-03-18 | 1994-09-30 | Sharp Corp | Joining member |
JPH10135405A (en) * | 1996-11-01 | 1998-05-22 | Aisin Aw Co Ltd | Wiring board module |
JPH1118429A (en) * | 1997-06-24 | 1999-01-22 | Hitachi Ltd | Control module |
JP2000183252A (en) * | 1998-12-18 | 2000-06-30 | Kyocera Corp | Heat transfer compound |
JP2000265227A (en) * | 1999-03-16 | 2000-09-26 | Hitachi Ltd | Composite materials, their production methods and applications |
JP2000313905A (en) * | 1999-04-28 | 2000-11-14 | Hitachi Ltd | Composite materials and various applications |
JP2001015682A (en) * | 1999-06-28 | 2001-01-19 | Hitachi Ltd | Resin-sealed electronic device |
JP2001110962A (en) * | 1999-10-13 | 2001-04-20 | Denki Kagaku Kogyo Kk | Heat radiation spacer |
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