JP2000313905A - Composite materials and various applications - Google Patents
Composite materials and various applicationsInfo
- Publication number
- JP2000313905A JP2000313905A JP12128599A JP12128599A JP2000313905A JP 2000313905 A JP2000313905 A JP 2000313905A JP 12128599 A JP12128599 A JP 12128599A JP 12128599 A JP12128599 A JP 12128599A JP 2000313905 A JP2000313905 A JP 2000313905A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- heat sink
- plate
- lead frame
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002131 composite material Substances 0.000 title claims abstract description 47
- 239000004065 semiconductor Substances 0.000 claims abstract description 131
- 239000002245 particle Substances 0.000 claims abstract description 78
- 239000004033 plastic Substances 0.000 claims abstract description 23
- 239000010949 copper Substances 0.000 claims description 149
- 239000000843 powder Substances 0.000 claims description 54
- 239000000758 substrate Substances 0.000 claims description 48
- 229910052802 copper Inorganic materials 0.000 claims description 45
- 229920005989 resin Polymers 0.000 claims description 33
- 239000011347 resin Substances 0.000 claims description 33
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 27
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 26
- 239000000203 mixture Substances 0.000 claims description 25
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 24
- 238000005245 sintering Methods 0.000 claims description 22
- 239000000919 ceramic Substances 0.000 claims description 20
- 239000010453 quartz Substances 0.000 claims description 20
- 239000003822 epoxy resin Substances 0.000 claims description 18
- 229920000647 polyepoxide Polymers 0.000 claims description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 239000011342 resin composition Substances 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 claims description 9
- 239000012298 atmosphere Substances 0.000 claims description 8
- 229910010272 inorganic material Inorganic materials 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 150000002484 inorganic compounds Chemical class 0.000 claims description 7
- 239000005751 Copper oxide Substances 0.000 claims description 6
- 150000001875 compounds Chemical class 0.000 claims description 6
- 229910000431 copper oxide Inorganic materials 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 6
- 238000002844 melting Methods 0.000 claims description 4
- 230000008018 melting Effects 0.000 claims description 4
- 229920000642 polymer Polymers 0.000 claims description 3
- 239000011256 inorganic filler Substances 0.000 claims 3
- 229910003475 inorganic filler Inorganic materials 0.000 claims 3
- 150000002902 organometallic compounds Chemical class 0.000 claims 2
- 239000002923 metal particle Substances 0.000 claims 1
- BERDEBHAJNAUOM-UHFFFAOYSA-N copper(I) oxide Inorganic materials [Cu]O[Cu] BERDEBHAJNAUOM-UHFFFAOYSA-N 0.000 abstract description 2
- KRFJLUBVMFXRPN-UHFFFAOYSA-N cuprous oxide Chemical compound [O-2].[Cu+].[Cu+] KRFJLUBVMFXRPN-UHFFFAOYSA-N 0.000 abstract description 2
- 229940112669 cuprous oxide Drugs 0.000 abstract description 2
- 229910000881 Cu alloy Inorganic materials 0.000 abstract 1
- 239000000463 material Substances 0.000 description 26
- 239000000945 filler Substances 0.000 description 23
- 238000012545 processing Methods 0.000 description 15
- 238000001513 hot isostatic pressing Methods 0.000 description 14
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 13
- 238000007789 sealing Methods 0.000 description 13
- 238000002156 mixing Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 239000004519 grease Substances 0.000 description 11
- 239000010410 layer Substances 0.000 description 11
- 229910000679 solder Inorganic materials 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 10
- 239000010931 gold Substances 0.000 description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 9
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 8
- 239000000956 alloy Substances 0.000 description 8
- 238000001816 cooling Methods 0.000 description 8
- 239000002994 raw material Substances 0.000 description 8
- 229910045601 alloy Inorganic materials 0.000 description 7
- 238000005242 forging Methods 0.000 description 7
- 230000017525 heat dissipation Effects 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 239000011812 mixed powder Substances 0.000 description 6
- 230000005855 radiation Effects 0.000 description 6
- 238000005096 rolling process Methods 0.000 description 6
- 229910000831 Steel Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 5
- 238000009826 distribution Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 5
- 238000005551 mechanical alloying Methods 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 5
- 239000010959 steel Substances 0.000 description 5
- 230000008646 thermal stress Effects 0.000 description 5
- -1 Al 2 O 3 Chemical class 0.000 description 4
- 229910000979 O alloy Inorganic materials 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 229910052742 iron Inorganic materials 0.000 description 4
- 230000015654 memory Effects 0.000 description 4
- 238000011160 research Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 238000003466 welding Methods 0.000 description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 3
- 238000005054 agglomeration Methods 0.000 description 3
- 230000002776 aggregation Effects 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000011049 filling Methods 0.000 description 3
- 239000005350 fused silica glass Substances 0.000 description 3
- 229910000833 kovar Inorganic materials 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 238000009849 vacuum degassing Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 2
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 239000010953 base metal Substances 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005097 cold rolling Methods 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 230000001186 cumulative effect Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 2
- 238000007542 hardness measurement Methods 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 229920003986 novolac Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229920005573 silicon-containing polymer Polymers 0.000 description 2
- 229920002379 silicone rubber Polymers 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- RNFJDJUURJAICM-UHFFFAOYSA-N 2,2,4,4,6,6-hexaphenoxy-1,3,5-triaza-2$l^{5},4$l^{5},6$l^{5}-triphosphacyclohexa-1,3,5-triene Chemical compound N=1P(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP=1(OC=1C=CC=CC=1)OC1=CC=CC=C1 RNFJDJUURJAICM-UHFFFAOYSA-N 0.000 description 1
- QTWJRLJHJPIABL-UHFFFAOYSA-N 2-methylphenol;3-methylphenol;4-methylphenol Chemical compound CC1=CC=C(O)C=C1.CC1=CC=CC(O)=C1.CC1=CC=CC=C1O QTWJRLJHJPIABL-UHFFFAOYSA-N 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 229910015365 Au—Si Inorganic materials 0.000 description 1
- 229910015363 Au—Sn Inorganic materials 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 101000783705 Myxoma virus (strain Uriarra) Envelope protein A28 homolog Proteins 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229920000265 Polyparaphenylene Polymers 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 150000008065 acid anhydrides Chemical class 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- HSFWRNGVRCDJHI-UHFFFAOYSA-N alpha-acetylene Natural products C#C HSFWRNGVRCDJHI-UHFFFAOYSA-N 0.000 description 1
- 125000003277 amino group Chemical group 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000012965 benzophenone Substances 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000001273 butane Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 125000003178 carboxy group Chemical group [H]OC(*)=O 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011362 coarse particle Substances 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 239000007822 coupling agent Substances 0.000 description 1
- 229930003836 cresol Natural products 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 239000004205 dimethyl polysiloxane Substances 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 125000002534 ethynyl group Chemical group [H]C#C* 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000009661 fatigue test Methods 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 239000003063 flame retardant Substances 0.000 description 1
- 239000000446 fuel Substances 0.000 description 1
- 125000000524 functional group Chemical group 0.000 description 1
- ANSXAPJVJOKRDJ-UHFFFAOYSA-N furo[3,4-f][2]benzofuran-1,3,5,7-tetrone Chemical compound C1=C2C(=O)OC(=O)C2=CC2=C1C(=O)OC2=O ANSXAPJVJOKRDJ-UHFFFAOYSA-N 0.000 description 1
- 238000001879 gelation Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000000462 isostatic pressing Methods 0.000 description 1
- 229910000464 lead oxide Inorganic materials 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- IJDNQMDRQITEOD-UHFFFAOYSA-N n-butane Chemical compound CCCC IJDNQMDRQITEOD-UHFFFAOYSA-N 0.000 description 1
- OFBQJSOFQDEBGM-UHFFFAOYSA-N n-pentane Natural products CCCCC OFBQJSOFQDEBGM-UHFFFAOYSA-N 0.000 description 1
- 229910000480 nickel oxide Inorganic materials 0.000 description 1
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 1
- 238000000879 optical micrograph Methods 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- YEXPOXQUZXUXJW-UHFFFAOYSA-N oxolead Chemical compound [Pb]=O YEXPOXQUZXUXJW-UHFFFAOYSA-N 0.000 description 1
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000002952 polymeric resin Substances 0.000 description 1
- 238000011417 postcuring Methods 0.000 description 1
- 238000004663 powder metallurgy Methods 0.000 description 1
- 239000001294 propane Substances 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 125000000714 pyrimidinyl group Chemical group 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 239000005394 sealing glass Substances 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000007873 sieving Methods 0.000 description 1
- 239000004945 silicone rubber Substances 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000010944 silver (metal) Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 238000007751 thermal spraying Methods 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48095—Kinked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
- H01L2924/30111—Impedance matching
Landscapes
- Manufacture Of Alloys Or Alloy Compounds (AREA)
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Powder Metallurgy (AREA)
Abstract
(57)【要約】
【課題】本発明の目的は高熱伝導率と低熱膨張係数で高
い塑性加工性を有する複合材料及びそれを用いた半導体
装置等の各種用途を提供する。
【解決手段】本発明の複合材料は、特に、第一酸化銅粒
子を5〜80体積%含むCu合金よりなり、等方加圧焼
結体からなるものである。室温から300℃における熱
膨張係数が5×10-6〜17×10-6/℃,熱伝導率が
30〜375W/m・Kであり、また導電率が10〜8
5%IACSが得られる。半導体装置の放熱板及び静電
吸着装置の電極板等に適用される。
(57) Abstract: An object of the present invention is to provide a composite material having high thermal conductivity, a low coefficient of thermal expansion, and high plastic workability, and various uses such as a semiconductor device using the same. The composite material of the present invention is made of a Cu alloy containing 5 to 80% by volume of cuprous oxide particles, and is made of an isotropic pressure sintered body. The coefficient of thermal expansion from room temperature to 300 ° C. is 5 × 10 −6 to 17 × 10 −6 / ° C., the thermal conductivity is 30 to 375 W / m · K, and the conductivity is 10 to 8
5% IACS is obtained. It is applied to a heat sink of a semiconductor device, an electrode plate of an electrostatic attraction device and the like.
Description
【0001】[0001]
【発明の属する技術分野】本発明は、新規な低熱膨張性
と高熱伝導性を有する複合材料及びその製造方法とそれ
を用いた半導体装置等の各種用途に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a novel composite material having low thermal expansion and high thermal conductivity, a method for producing the same, and various uses such as a semiconductor device using the same.
【0002】[0002]
【従来の技術】電子デバイスによる電力やエネルギーの
変換,制御に関連した技術、特にオン,オフモードで用
いられる電力用電子デバイスとその応用技術としての電
力変換システムがパワーエレクトロニクスである。2. Description of the Related Art Power electronics is a technology related to the conversion and control of power and energy by an electronic device, in particular, a power electronic device used in an on / off mode and a power conversion system as an application technology thereof.
【0003】電力変換のため、各種のオン,オフ機能を
持つ電力用半導体素子が用いられている。この半導体素
子としては、pn接合体を内蔵し、一方向のみの導電性
をもつ整流ダイオードをはじめ、種々のpn接合の組合
せ構造により、サイリスタ,バイポーラトランジスタ,
MOSFET等が実用化され、更には絶縁ゲート型バイ
ポーラトランジスタ(IGBT)やゲート信号によりタ
ーンオフ機能を併せもつゲートターンオフサイリスタ
(GTO)も開発されている。[0003] For power conversion, power semiconductor devices having various on / off functions are used. This semiconductor device includes a rectifier diode having a built-in pn junction and having conductivity in only one direction, and a thyristor, a bipolar transistor,
MOSFETs and the like have been put to practical use, and furthermore, insulated gate bipolar transistors (IGBTs) and gate turn-off thyristors (GTOs) having a turn-off function by a gate signal have been developed.
【0004】これらの電力用半導体素子は、通電により
発熱し、その高容量化,高速化に伴い発熱量も増大する
傾向にある。発熱に起因する半導体素子の特性劣化,短
寿命化を防止するためには、放熱部を設け、半導体素子
及びその近傍での温度上昇を抑制する必要がある。銅
は、熱伝導率が393W/m・Kと大きく、かつ低価格
であるため、放熱部材として一般に用いられている。し
かし、電力用半導体素子を備える半導体装置の放熱部材
は、熱膨張率が4.2×10-6/℃ のSiと接合される
ため、熱膨張率がこれに近い放熱部材が望まれる。銅は
熱膨張率が17×10-6/℃と大きいため、半導体素子
との半田接合性は好ましくなく、MoやWといった熱膨
張率がSiと近い材料を放熱部材として用いたり、半導
体素子と放熱部材の間に設けたりしている。[0004] These power semiconductor elements generate heat when energized, and the amount of heat generated tends to increase as their capacity and speed increase. In order to prevent the deterioration of the characteristics of the semiconductor element and the shortening of the service life due to the heat generation, it is necessary to provide a heat radiating section to suppress the temperature rise in the semiconductor element and its vicinity. Copper is generally used as a heat dissipating member because it has a large thermal conductivity of 393 W / m · K and is inexpensive. However, since the heat radiation member of the semiconductor device including the power semiconductor element is bonded to Si having a coefficient of thermal expansion of 4.2 × 10 −6 / ° C., a heat radiation member having a coefficient of thermal expansion close to this is desired. Copper has a large coefficient of thermal expansion of 17 × 10 −6 / ° C., and thus has poor solder jointability with a semiconductor element. It is provided between heat dissipating members.
【0005】一方、電子回路を一つの半導体チップ上に
集積させた集積回路(IC)は、その機能に応じたメモ
リー,ロジック,マイクロプロセッサ等に分類される。
ここでは電力用半導体素子に対し、電子用半導体素子と
呼ぶ。これらの半導体素子は、年々集積度や演算速度が
増加し、それに伴い発熱量も増大している。ところで、
一般に電子用半導体素子は、外気から遮断して故障や劣
化を防止する目的で、パッケージ内に収納されている。
この多くは、半導体素子がセラミックスにダイボンディ
ングされ、密封されているセラミックスパッケージ及び
樹脂で封止されているプラスチックパッケージである。
また、高信頼性,高速化に対応するために、複数個の半
導体装置を一つの基板上に搭載したマルチチップモジュ
ール(MCM)も製造されている。On the other hand, integrated circuits (ICs) in which electronic circuits are integrated on one semiconductor chip are classified into memories, logics, microprocessors, and the like according to their functions.
Here, the power semiconductor element is called an electronic semiconductor element. The degree of integration and the operation speed of these semiconductor elements have been increasing year by year, and accordingly, the amount of heat generated has also increased. by the way,
In general, an electronic semiconductor element is housed in a package for the purpose of shutting it off from the outside air and preventing failure and deterioration.
Many of these are a ceramic package in which a semiconductor element is die-bonded to ceramics and sealed, and a plastic package in which the semiconductor element is sealed with resin.
Also, in order to support high reliability and high speed, a multi-chip module (MCM) in which a plurality of semiconductor devices are mounted on one substrate is also manufactured.
【0006】プラスチックパッケージは、リードフレー
ムと半導体素子の端子がボンディングワイヤにより接続
され、これを樹脂で封止する構造になっている。近年
は、半導体素子の発熱量の増大に伴い、リードフレーム
に熱放散性を持たせたパッケージや熱放散のための放熱
板を搭載するパッケージも出現している。熱放散のため
には、熱伝導率の大きい銅系のリードフレームや放熱板
が多用されているが、チップあるいは封止樹脂等のパッ
ケージ構成材料との熱膨張差による不具合が懸念されて
いる。The plastic package has a structure in which a lead frame and terminals of a semiconductor element are connected by a bonding wire, and this is sealed with a resin. In recent years, with an increase in the amount of heat generated by a semiconductor element, a package in which a lead frame has heat dissipation properties and a package in which a heat dissipation plate for heat dissipation is mounted have appeared. For heat dissipation, a copper-based lead frame or a heat radiating plate having a large thermal conductivity is often used, but there is a concern about a problem due to a difference in thermal expansion from a package constituent material such as a chip or a sealing resin.
【0007】一方、セラミックスパッケージは、配線が
プリントされたセラミックス基板上に半導体素子が搭載
され、金属やセラミックスのキャップで密封する構造を
持つ。さらに、セラミックス基板にはCu−MoやCu
−Wの複合材料あるいはコバール合金などが接合され、
放熱板として用いられているが、それぞれの材料におい
て低熱膨張化あるいは高熱伝導化と共に加工性の向上,
低コストが要求されている。On the other hand, the ceramic package has a structure in which a semiconductor element is mounted on a ceramic substrate on which wiring is printed, and is sealed with a metal or ceramic cap. Furthermore, Cu-Mo or Cu
-W composite material or Kovar alloy is joined,
Although it is used as a heat sink, each material has low thermal expansion or high thermal conductivity,
Low cost is required.
【0008】MCMはSi,金属、あるいはセラミック
スの基板上に形成された薄膜配線に複数個の半導体素子
をベアチップで搭載し、これをセラミックスパッケージ
に入れ、リッドで封止する構造を持つ。放熱性が要求さ
れる場合には、パッケージに放熱板や放熱フィンを設置
する。金属製の基板材料として、銅やアルミニウムが使
用されており、これらは熱伝導度が高いという長所を持
つが、熱膨張係数が大きく半導体素子との整合性が悪
い。このため、高信頼性MCMの基板にはSiや窒化ア
ルミニウム(AlN)が用いられている。また、放熱板
はセラミックスパッケージと接合されるため、熱膨張率
の点でパッケージ材料と整合性が良く、熱伝導率が大き
な材料が望まれている。The MCM has a structure in which a plurality of semiconductor elements are mounted on a thin film wiring formed on a substrate made of Si, metal, or ceramics by a bare chip, placed in a ceramics package, and sealed with a lid. When heat dissipation is required, a heat sink or a heat dissipation fin is installed on the package. Copper or aluminum is used as a metal substrate material, which has the advantage of high thermal conductivity, but has a large coefficient of thermal expansion and poor compatibility with semiconductor elements. For this reason, Si or aluminum nitride (AlN) is used for the substrate of the highly reliable MCM. Further, since the heat radiating plate is bonded to the ceramic package, a material having good compatibility with the package material in terms of the coefficient of thermal expansion and having a large thermal conductivity is desired.
【0009】[0009]
【発明が解決しようとする課題】以上のように、半導体
素子を搭載した半導体装置は、いずれもその動作におい
て熱を発生し、蓄熱されると半導体素子の機能を損ねる
恐れがある。このため、発生する熱を外部に放散するた
めの熱伝導性に優れた放熱板が必要となる。放熱板は、
直接あるいは絶縁層を介して半導体素子と接合されるた
め、熱伝導性だけでなく、熱膨張の点でも半導体素子と
の整合性が要求される。As described above, any semiconductor device having a semiconductor element mounted thereon generates heat during its operation, and if stored, the function of the semiconductor element may be impaired. Therefore, a heat radiating plate having excellent thermal conductivity for dissipating generated heat to the outside is required. The heat sink is
Since the semiconductor element is bonded directly or via an insulating layer, the semiconductor element is required to have not only thermal conductivity but also thermal expansion.
【0010】現在用いられている半導体素子は、主にS
i及びGaAsである。これらの熱膨張係数は、それぞ
れ2.6×10-6〜3.6×10-6/℃,5.7×10-6
〜6.9×10-6/℃である。これらに近い熱膨張係数を
もつ放熱板材料には、従来よりAlN,SiC,Mo,
W,Cu−W等が知られているが、これらは単一材料で
あるため、熱伝達係数と熱伝導率を任意にコントロール
することは困難であるとともに、加工性に乏しくコスト
が高いという問題がある。特開平8−78578号公報にはC
u−Mo焼結合金,特開平9−181220号公報にはCu−
W−Ni焼結合金,特開平9−209058号公報にはCu−S
iC焼結合金,特開平9−15773号公報にはAl−SiC
が提案されている。これらの従来公知の複合材は、両成
分の比率を変えることによって熱伝達係数及び熱伝導率
を広範囲にコントロールできるが、塑性加工性が低く、
薄板の製造が困難であり、更に製造工程が多くなるもの
である。Currently used semiconductor elements are mainly S
i and GaAs. These thermal expansion coefficients, respectively 2.6 × 10 -6 ~3.6 × 10 -6 /℃,5.7×10 -6
6.9 × 10 −6 / ° C. Heat sink materials having a thermal expansion coefficient close to these include AlN, SiC, Mo,
Although W, Cu-W, etc. are known, since these are single materials, it is difficult to arbitrarily control the heat transfer coefficient and the thermal conductivity, and the workability is poor and the cost is high. There is. JP-A-8-78578 discloses C
A u-Mo sintered alloy is disclosed in Japanese Unexamined Patent Publication No. 9-181220.
W-Ni sintered alloy, Japanese Unexamined Patent Publication No. 9-209058 discloses Cu-S
iC sintered alloy, Japanese Patent Application Laid-Open No. 9-15773 discloses Al-SiC
Has been proposed. These conventionally known composite materials can control the heat transfer coefficient and the heat conductivity over a wide range by changing the ratio of both components, but have low plastic workability,
It is difficult to manufacture thin plates, and the number of manufacturing steps is further increased.
【0011】本発明の目的は、低熱膨張・高熱伝導性
で、かつ塑性加工性に優れた複合材料とそれを用いた半
導体装置とその放熱板並びに静電吸着装置とその電極板
を提供することを目的とする。An object of the present invention is to provide a composite material having low thermal expansion and high thermal conductivity and excellent in plastic workability, a semiconductor device using the same, a radiator plate thereof, an electrostatic chuck device and an electrode plate thereof. With the goal.
【0012】[0012]
【課題を解決するための手段】本発明は、等方加圧焼結
体にあり、好ましくは第一酸化銅(Cu2O )を5〜8
0体積%含み、残部が銅(Cu)と不可避的不純物から
なり、前記Cu2O 相及びCu相が分散した組織を有
し、室温から300℃における熱膨張係数が5×10-6
〜17×10-6/℃、熱伝導率が30〜375W/m・
Kであり、また導電率が10〜85%IACSであるこ
とを特徴とする銅複合材料にある。SUMMARY OF THE INVENTION The present invention resides in an isotropically pressed sintered body, and preferably comprises copper ( II ) oxide of 5 to 8%.
0% by volume, the balance being composed of copper (Cu) and unavoidable impurities, having a structure in which the Cu 2 O phase and Cu phase are dispersed, and having a coefficient of thermal expansion of 5 × 10 −6 at room temperature to 300 ° C.
~ 17 × 10 -6 / ° C, thermal conductivity 30 ~ 375W / m ·
K and a conductivity of 10 to 85% IACS.
【0013】また、この複合材料は、第一酸化銅(Cu
2O )を5〜80体積%含み、粒径が50μm以下、好
ましくは10μm以下、より好ましくはその50体積%
以下が粒径50〜200μm、残りが50μm以下であ
り、残部が銅(Cu)と不可避的不純物からなり、前記
Cu2O 相及びCu相が配向した組織を有し、室温から
300℃における熱膨張係数が5×10-6〜17×10
-6/℃,熱伝導率が30〜375W/m・Kであり、ま
た導電率が10〜85%IACSで、かつ熱伝導率及び
導電率の異方性を有し、配向方向の熱伝導率及び導電率
が配向方向に対して直角な方向のそれらよりも高いこと
が好ましい。This composite material is made of copper oxide (Cu)
2 O) in an amount of 5 to 80% by volume and a particle size of 50 μm or less, preferably 10 μm or less, more preferably 50% by volume.
The following are particle diameters of 50 to 200 μm, the remainder is 50 μm or less, the remainder is composed of copper (Cu) and unavoidable impurities, and has a structure in which the Cu 2 O phase and Cu phase are oriented. Expansion coefficient is 5 × 10 -6 to 17 × 10
−6 / ° C., thermal conductivity of 30 to 375 W / m · K, electrical conductivity of 10 to 85% IACS, thermal conductivity and anisotropy of conductivity, thermal conductivity in the alignment direction Preferably, the conductivity and conductivity are higher than those in the direction perpendicular to the orientation direction.
【0014】本発明に係る複合材料は金属として電気導
電性の高いAu,Ag,Cu,Alが用いられ、特にC
uは高融点で高強度を有する点で最も優れている。ま
た、無機化合物として前述のベースの金属に対して極端
に硬さの違う従来のSiC,Al2O3等の化合物ではな
く比較的軟かい粒子で焼結後に安定で、20〜150℃
の範囲での平均熱膨張係数が好ましくは5.0×10-6
/℃ 以下、より好ましくは3.5×10-6/℃ 以下
で、ヴィッカース硬さが300以下のものが好ましい。
このように無機化合物粒子として軟らかいものを用いる
ことによって焼結後の熱間,冷間による高い塑性加工性
が得られ、特にこれらの圧延が可能になることから、製
造時間が短縮されるとともに比較的薄い板を得ることが
できる。無機化合物粒子として酸化銅,酸化錫,酸化
鉛,酸化ニッケル等が考えられる。しかし、特に熱膨張
係数が最も小さく軟らかい酸化銅、特に第一酸化銅(C
u2O )が好ましい。得られた焼結体は理論密度の95
%以上が好ましい。In the composite material according to the present invention, Au, Ag, Cu, Al having high electric conductivity is used as a metal.
u is most excellent in that it has a high melting point and high strength. Moreover, a stable conventional SiC different as inorganic compounds extremely hardness relative to the above-mentioned base metal, after sintering at a relatively soft particles rather than compounds such as Al 2 O 3, 20~150 ℃
Is preferably 5.0 × 10 −6.
/ ° C. or lower, more preferably 3.5 × 10 −6 / ° C. or lower, and a Vickers hardness of 300 or lower.
By using soft inorganic compound particles in this way, high plastic workability by hot and cold after sintering can be obtained, and in particular, since these can be rolled, the production time is shortened and comparison is made. A very thin plate can be obtained. Copper oxide, tin oxide, lead oxide, nickel oxide and the like can be considered as the inorganic compound particles. However, soft copper oxide having the smallest coefficient of thermal expansion, especially copper oxide (C)
u 2 O) is preferred. The obtained sintered body has a theoretical density of 95.
% Or more is preferable.
【0015】更に、本発明の複合材料はSiC,Al2
O3等のよりヴィッカース硬さが1000以上の硬い平均粒
径3μm以下の微細なセラミックス粒子を5体積%以下
含有させてより強化させるのが好ましい。Further, the composite material of the present invention is made of SiC, Al 2
It is preferable to contain 5% by volume or less of fine ceramic particles having a Vickers hardness of 1000 or more and a hard average particle size of 3 μm or less, such as O 3 , to further strengthen them.
【0016】本発明に係る複合材料の製造方法は、第一
酸化銅(Cu2O )及び銅(Cu)を含む混合粉末を金
属容器に充填脱気・密封後、700℃〜1050℃で熱
間静水圧圧縮プレス(HIP)による等方加圧焼結工程
を有し、又は更に冷間もしくは熱間の少なくともいずれ
か一方で塑性加工する工程と、その後の焼鈍工程と、を
含むことを特徴とする。In the method for producing a composite material according to the present invention, a mixed powder containing cuprous oxide (Cu 2 O) and copper (Cu) is filled in a metal container, degassed and sealed, and then heated at 700 to 1050 ° C. A step of isostatic pressing by a hot isostatic pressing press (HIP), or further comprising a step of plastic working at least one of cold and hot, and a subsequent annealing step. And
【0017】また、本発明に係る複合材料の製造方法
は、第二酸化銅(CuO)を2.7〜48.8体積%含
み、残部が銅(Cu)と不可避的不純物からなる混合粉
末を金属容器に充填脱気・密封後、700℃〜1050
℃で熱間静水圧圧縮プレス(HIP)による焼結工程と、冷
間もしくは熱間の少なくともいずれか一方で塑性加工す
る工程と、その後の焼鈍工程と、を含むことを特徴とす
る。Further, the method for producing a composite material according to the present invention is characterized in that the mixed powder containing 2.7 to 48.8% by volume of copper (CuO) and the balance of copper (Cu) and unavoidable impurities After filling, degassing and sealing the container, 700 ° C-1050
It is characterized by including a sintering step by hot isostatic pressing (HIP) at ℃, a step of plastic working at least one of cold and hot, and a subsequent annealing step.
【0018】本発明は、前述に記載の複合材料よりなる
ことを特徴とする半導体装置用放熱板にある。また、そ
の表面にNiめっき層を有することを特徴とする半導体
装置用放熱板にある。According to the present invention, there is provided a heat sink for a semiconductor device, comprising a composite material as described above. Further, there is provided a heat sink for a semiconductor device having a Ni plating layer on a surface thereof.
【0019】本発明は、放熱板上に搭載した複数個の絶
縁基板と、該絶縁基板の各々に搭載された複数個の半導
体素子とを備え、前記絶縁基板は上下面に導体層が設け
られ、該導体層を介して前記放熱板に直接接合されてい
ることを特徴とする。The present invention comprises a plurality of insulating substrates mounted on a heat sink, and a plurality of semiconductor elements mounted on each of the insulating substrates, wherein the insulating substrate is provided with conductor layers on upper and lower surfaces. , And is directly joined to the heat sink through the conductor layer.
【0020】本発明は、放熱板上に搭載した絶縁基板及
び該絶縁基板上に搭載された半導体素子を有する半導体
装置において、前記放熱板は前述に記載の放熱板よりな
ることを特徴とする。According to the present invention, in a semiconductor device having an insulating substrate mounted on a radiator plate and a semiconductor element mounted on the insulating substrate, the radiator plate comprises the radiator plate described above.
【0021】本発明は、放熱板上に搭載した半導体素子
と、前記放熱板に接続されたリードフレームと、該リー
ドフレームと半導体素子とを電気的に接続する金属ワイ
ヤとを備え、前記半導体素子を樹脂封止した半導体装置
において、前記放熱板は前述に記載の放熱板よりなるこ
とを特徴とする。The present invention comprises a semiconductor element mounted on a heat sink, a lead frame connected to the heat sink, and a metal wire for electrically connecting the lead frame and the semiconductor element. In a semiconductor device in which the heat sink is resin-sealed, the heat sink is made of the heat sink described above.
【0022】本発明は、放熱板上に搭載された半導体素
子と、前記放熱板に接続されたリードフレームと、該リ
ードフレームと半導体素子とを電気的に接続する金属ワ
イヤとを備え、前記半導体素子を樹脂封止するととも
に、前記放熱板の少なくとも前記素子の接合面に対して
反対の面側が開放されている半導体装置において、前記
放熱板は前述に記載の放熱板よりなることを特徴とす
る。According to the present invention, there is provided a semiconductor device comprising: a semiconductor element mounted on a heat sink; a lead frame connected to the heat sink; and a metal wire for electrically connecting the lead frame and the semiconductor element. In a semiconductor device in which an element is sealed with a resin and at least a surface of the radiator plate opposite to a bonding surface of the element is open, the radiator plate is made of the radiator plate described above. .
【0023】本発明は、放熱板上に搭載した半導体素子
と、外部配線接続用ピンを有し、中央部に前記素子に収
納する開放空間を有するセラミックス多層配線基板と、
前記素子と基板の端子とを電気的に接続する金属ワイヤ
とを備え、前記素子を前記空間に設置するように前記放
熱板と前記基板とを接合するとともに前記基板をリッド
によって接合し前記素子を大気より遮断する半導体装置
において、前記放熱板は前述に記載の放熱板よりなるこ
とを特徴とする。According to the present invention, there is provided a ceramic multilayer wiring board having a semiconductor element mounted on a heat sink, an external wiring connection pin, and an open space in the center for housing the element.
A metal wire for electrically connecting the element and a terminal of the substrate; joining the heat sink and the substrate so as to place the element in the space; and joining the substrate with a lid to join the element. In a semiconductor device that is shielded from the atmosphere, the radiator plate includes the radiator plate described above.
【0024】本発明は、放熱板上に搭載された半導体素
子と、外部配線接続用端子を有し、中央部に前記素子を
収納する凹部を有するセラミックス多層配線基板と、前
記素子と基板の端子とを電気的に接続する金属ワイヤと
を備え、前記素子を前記凹部に設置するように前記放熱
板と前記基板の凹部とを接合するとともに前記基板をリ
ッドによって接合し前記素子を大気より遮断する半導体
装置において、前記放熱板は前述に記載の放熱板よりな
ることを特徴とする。According to the present invention, there is provided a ceramic multilayer wiring board having a semiconductor element mounted on a heat sink, a terminal for connecting an external wiring, and a concave portion for accommodating the element in the center, and a terminal of the element and the substrate. And a metal wire for electrically connecting the heat sink and the recess of the substrate so that the device is installed in the recess, and the substrate is joined by a lid to shield the device from the atmosphere. In the semiconductor device, the radiator plate may include the radiator plate described above.
【0025】本発明は、放熱板上に熱伝導性樹脂によっ
て接合された半導体素子と、セラミックス絶縁基板に接
合されたリードフレームと、前記素子とリードフレーム
とを電気的に接続するTABとを備え、前記放熱板と絶
縁基板とを接合し前記素子を大気より遮断するとともに
前記素子と絶縁基板との間に熱伝導性樹脂弾性体を介在
させた半導体装置において、前記放熱板は前述に記載の
放熱板よりなることを特徴とする。The present invention comprises a semiconductor element joined on a heat sink with a thermally conductive resin, a lead frame joined to a ceramic insulating substrate, and a TAB for electrically connecting the element to the lead frame. In a semiconductor device in which the heat sink and the insulating substrate are joined to block the element from the atmosphere and a heat conductive resin elastic body is interposed between the element and the insulating substrate, the heat sink is as described above. It is characterized by comprising a heat sink.
【0026】本発明は、第1の放熱板上に金属によって
接合された半導体素子と、接地板が接合された第2の放
熱板の前記接地板上に前記第1の放熱板を搭載し、前記
素子の端子に電気的に接続したTABとを備え、前記素
子を樹脂封止した半導体装置において、前記放熱板は前
述に記載の放熱板よりなることを特徴とする。According to the present invention, there is provided a semiconductor device joined to a first radiator plate by a metal, and the first radiator plate is mounted on the ground plate of a second radiator plate joined to a ground plate. In a semiconductor device having a TAB electrically connected to terminals of the element and resin-sealing the element, the radiator plate is formed of the radiator plate described above.
【0027】本発明は、前述に記載の複合材料よりなる
ことを特徴とする静電吸着装置用電極板にある。According to the present invention, there is provided an electrode plate for an electrostatic attraction device, comprising the composite material described above.
【0028】本発明は、電極板に電圧を印加することに
より前記電極板上に接合された誘電体板と物体との間に
静電吸引力を生じさせて前記誘電体板の表面に前記物体
を固定する静電吸着装置において、前記電極板は前述に
記載の銅複合材よりなることを特徴とする。According to the present invention, a voltage is applied to the electrode plate to generate an electrostatic attraction force between the dielectric plate bonded to the electrode plate and the object, so that the object is placed on the surface of the dielectric plate. The electrode plate is made of the above-described copper composite material.
【0029】本発明における放熱板,電極板は焼結後又
はその後の圧延等による加工後にプレスによる塑性加工
によって最終形状に形成することができる。The heat radiating plate and the electrode plate in the present invention can be formed into a final shape by plastic working by press after sintering or subsequent working by rolling or the like.
【0030】本発明に係る銅複合材料は、17.6×1
0-6/℃の熱膨張係数と391W/m・Kの高い熱伝導
率を有するCuと12W/m・Kの熱伝導率と2.7×1
0-6/℃の低熱膨張率を有するCu2O を複合化させた
材料であり、半導体装置の放熱板に適用される焼結体組
成として、Cu−5〜80体積%Cu2O の組成範囲で
選択され、室温から300℃における熱膨張係数が5×
10-6〜17×10-6/℃,熱伝導率が30〜375W
/m・Kであり、また導電率が10〜85%IACSを
有することができる。Cu2O 含有量は、5%以上で放
熱板に要求される熱膨張係数が得られ、80体積%以下
で十分な熱伝導性や構造体としての強度が得られるため
である。The copper composite material according to the present invention is 17.6 × 1
Cu having a thermal expansion coefficient of 0 -6 / ° C and a high thermal conductivity of 391 W / m · K, a thermal conductivity of 12 W / m · K and 2.7 × 1
A composite material of Cu 2 O having a low coefficient of thermal expansion of 0 −6 / ° C. and a composition of Cu-5 to 80 volume% Cu 2 O as a sintered body composition applied to a heat sink of a semiconductor device. The thermal expansion coefficient from room temperature to 300 ° C. is 5 ×
10 -6 -17 × 10 -6 / ° C, thermal conductivity 30-375 W
/ M · K and a conductivity of 10-85% IACS. When the content of Cu 2 O is 5% or more, the thermal expansion coefficient required for the heat sink is obtained, and when it is 80% by volume or less, sufficient thermal conductivity and strength as a structure are obtained.
【0031】本発明において、複合材料は基本的に粉末
冶金法によって得られるが、本発明の銅複合材料におい
ては、Cu粉末とCu2O 粉末もしくはCuO粉末を原
料粉として所定比率で混合し、HIP焼結して作製す
る。焼結時の等方加圧力によって、CuとCu2O の粒
子間に存在する空孔がつぶされ、理論密度の95%以上
の密度を有する焼結体が得られる。高密度化は熱伝導率
及び導電率の向上,塑性加工性の改善に有効である。In the present invention, the composite material is basically obtained by powder metallurgy. In the copper composite material of the present invention, Cu powder and Cu 2 O powder or CuO powder are mixed at a predetermined ratio as raw material powders, It is manufactured by HIP sintering. The voids existing between the Cu and Cu 2 O particles are crushed by the isotropic pressing force during sintering, and a sintered body having a density of 95% or more of the theoretical density is obtained. Densification is effective for improving thermal conductivity and electrical conductivity and improving plastic workability.
【0032】構成するCu及びCu2O の硬さが低く、
延性に富むため、圧延,鍛造などの冷間あるいは熱間加
工が可能であり、必要に応じて少なくとも冷間あるいは
熱間のいずれかで塑性加工が施される。加工を付与する
ことによって、材料に熱伝導及び電気伝導の異方性が発
現するが、強度向上や一定方向への伝熱,導電が必要な
用途に対して有効である。The constituent Cu and Cu 2 O have low hardness,
Due to its high ductility, cold or hot working such as rolling and forging is possible, and plastic working is performed at least in either cold or hot as required. By imparting processing, the material exhibits heat conduction and electrical conduction anisotropy. However, it is effective for applications requiring strength improvement, heat transfer in a certain direction, and conductivity.
【0033】原料粉の混合は、Vミキサー,ポットミル
あるいはメカニカルアロイング等によって行われるが、
原料粉末の粒径は混合時やHIP焼結後のCu2O の分
散性に影響を及ぼすので、Cu粉末は100μm以下、
Cu2O 及びCuO粉末の粒径は10μm以下、特に1
〜2μmが好ましい。The mixing of the raw material powder is performed by a V mixer, a pot mill, a mechanical alloying, or the like.
Since the particle size of the raw material powder affects the dispersibility of Cu 2 O during mixing and after HIP sintering, the Cu powder is 100 μm or less,
The particle diameter of Cu 2 O and CuO powder is 10 μm or less, especially 1 μm.
22 μm is preferred.
【0034】HIP焼結は、加圧力は1000〜200
0気圧程度で、700℃〜1050℃で3時間程度が好
ましく、Cu2O 含有量の増加につれて温度が高められ
る。焼結温度はベース金属によって異なるが、特にCu
においては700℃以下では、密度の高い焼結体が得ら
れず、1050℃以上ではCuとCu2O の共晶反応に
より部分溶解する危険性があるために好ましくなく、8
00℃〜1000℃が好適である。In the HIP sintering, the pressure is 1000 to 200.
The pressure is preferably about 0 atm, 700 ° C. to 1050 ° C. for about 3 hours, and the temperature is raised as the Cu 2 O content increases. The sintering temperature depends on the base metal,
At 700 ° C. or lower, a sintered body having a high density cannot be obtained. At 1050 ° C. or higher, there is a risk of partial melting due to a eutectic reaction between Cu and Cu 2 O.
00 ° C to 1000 ° C is preferred.
【0035】本発明においては、原料粉にCuOを用
い、Cu粉末を混合・充填脱気・密封後に焼結過程でC
uを内部酸化させて、最終的にCu相とCu2O 相が分
散した組織を有する焼結体とすることができる。すなわ
ち、CuOはCuと共存する場合、高温においては
(1)式によりCu2O に変態する方が熱的に安定であ
ることを利用している。In the present invention, CuO is used as a raw material powder, and after mixing, filling, deaeration and sealing of Cu powder, C
By internally oxidizing u, a sintered body having a structure in which a Cu phase and a Cu 2 O phase are dispersed can be finally obtained. That is, when CuO coexists with Cu, it utilizes the fact that it is more thermally stable to transform to Cu 2 O at high temperature according to the equation (1).
【0036】 2Cu+CuO → Cu+Cu2O …(1) (1)式が平衡に到達するためには所定の時間を要する
が、例えば焼結温度が900℃の場合には、3時間程度
で十分である。2Cu + CuO → Cu + Cu 2 O (1) It takes a predetermined time for the equation (1) to reach equilibrium. For example, when the sintering temperature is 900 ° C., about 3 hours is sufficient. .
【0037】焼結体のCu2O の粒径は密度,強度ある
いは塑性加工性に影響するので微細であることが好まし
い。しかしながら、粒径は粉末の混合方法に強く影響さ
れ、混合エネルギーが大きい方が粉同士の凝集が少な
く、焼結後に微細なCu2O 相が得られる。The particle size of Cu 2 O in the sintered body is preferably fine because it affects the density, strength or plastic workability. However, the particle size is strongly affected by the method of mixing the powders, and the larger the mixing energy, the less the agglomeration between the powders, and a fine Cu 2 O phase is obtained after sintering.
【0038】本発明において、混合エネルギーの小さい
VミキサーではCu2O相はCu2O相の50体積%以下
が粒径50〜200μmで、残部が50μm以下とし、
スチールボールを入れたポットミルでは50μm以下、
そして、最も混合エネルギーの大きいメカニカルアロイ
ングでは10μm以下と規定される。粒径が200μm
以上では、気孔率が大きく増加し、塑性加工が困難にな
り、その量がCu2O相の50体積%以上になると、熱伝
導率の減少と特性のばらつきの増加を招き、半導体装置
の放熱板に不適となる。より好ましい組織は、50μm
以下のCu2O相がCu相と均一に分散した組織である。
焼結後のCu2O 粒子は不規則な形状であるが、焼結前
の粒子が連なっているので、より高倍率で見ることによ
り、焼結前の粒子径を見ることができる。Cu2O 相は
10μm以下が好ましい。In the present invention, in a V mixer having a low mixing energy, the Cu 2 O phase has a particle size of 50 to 200 μm in 50% by volume or less of the Cu 2 O phase and the remaining 50 μm or less,
50 μm or less in a pot mill containing steel balls,
For mechanical alloying having the largest mixing energy, the diameter is specified to be 10 μm or less. Particle size 200μm
Above, the porosity greatly increases, and plastic working becomes difficult. When the porosity is 50% by volume or more of the Cu 2 O phase, the thermal conductivity decreases and the variation in characteristics increases, and the heat dissipation of the semiconductor device is caused. Unsuitable for board. More preferred tissue is 50 μm
This is a structure in which the following Cu 2 O phase is uniformly dispersed with the Cu phase.
Although the Cu 2 O particles after sintering have an irregular shape, the particles before sintering can be seen at a higher magnification because the particles before sintering are continuous. The Cu 2 O phase is preferably 10 μm or less.
【0039】本発明は、前述に記載の半導体装置がエポ
キシ樹脂,球形石英粉及びシリコン重合体を含む又はシ
リコン重合体を含まない組成物により封止されたことを
特徴とする面付実装型又は非面実装型樹脂封止半導体装
置にある。球形石英粉は組成物全体の70重量%以上、
より好ましくは80〜95重量%である。特に、本発明
は、ロジック又はメモリ半導体装置として、厚さ1.5m
m 以下の薄形に対して石英粉が82〜90重量%を有
し、シリコン重合体を含まず、石英粉の90%以上が溶
融球形石英粉からなり、3〜10%が非球形(角形)の
石英粉が用いられる。According to the present invention, there is provided a surface mounting type or semiconductor device characterized in that the semiconductor device described above is sealed with a composition containing or not containing a silicon polymer and epoxy resin, spherical quartz powder. It is a non-surface mounting type resin-sealed semiconductor device. Spherical quartz powder is 70% by weight or more of the whole composition,
More preferably, it is 80 to 95% by weight. In particular, the present invention relates to a logic or memory semiconductor device having a thickness of 1.5 m.
m is 82 to 90% by weight with respect to a thin shape having a particle diameter of not more than 90%, containing no silicon polymer, and 90% or more of the quartz powder is composed of fused spherical quartz powder, and 3 to 10% is non-spherical (square). ) Quartz powder is used.
【0040】また、本発明は、ロジック又はメモリ半導
体装置として、厚さ1.5mm 以上のロジックにおいては
普通の面実装型のQFP,非面実装型のDILP,メモ
リにおいてはSOJ,TSOPの面実装型,非面実装型
のDILPに対して充填剤、好ましくは石英粉が75〜
81%及びシリコンを有するエポキシ樹脂組成物によっ
て封止されるものである。充填剤のうち粒径5μm〜1
00μmのものの60〜80%が溶融球形石英粉が用い
られ、残りが粒径5μm未満、好ましくは3μm以下の
角形石英粉(粉砕石英粉)を用いるのが好ましい。球形
石英粉は65〜75%とするのが好ましい。The present invention also relates to a logic or memory semiconductor device which has a thickness of 1.5 mm or more and has a normal surface-mount type QFP, a non-surface-mount type DILP, and a memory having a SOJ or TSOP surface mount. Filler, preferably quartz powder is 75 ~
It is sealed with an epoxy resin composition having 81% and silicon. 5 μm to 1 particle size among fillers
Fused spherical quartz powder is used for 60 to 80% of the powder having a diameter of 00 μm, and it is preferable to use a rectangular quartz powder (crushed quartz powder) having a particle size of less than 5 μm, preferably 3 μm or less. The spherical quartz powder is preferably 65 to 75%.
【0041】本発明に係る樹脂封止半導体装置として、
SOP,PLCC,MSP等の構造に対しても用いられ
る。As the resin-sealed semiconductor device according to the present invention,
It is also used for structures such as SOP, PLCC and MSP.
【0042】[0042]
【発明の実施の形態】(実施例1)原料粉として、75
μm以下の電解Cu粉末と純度3N,粒径1〜2μmの
Cu2O 粉末を用いた。Cu粉末とCu2O 粉末を表2
に示す比率で150g調合した後、スチールボールを入
れた乾式のポットミル中で10時間以上混合した。混合
粉末を直径30mm,高さ50mmの鉄製容器に注入し、4
00℃で真空脱気・溶接密封後に、HIP焼結した。な
お、HIPは加圧力を1000気圧とし、Cu2O 含有
量に応じて800℃〜1000℃の間で変化させ、各温
度で3時間保持した。その後、組織観察,密度、熱膨張
係数,熱伝導率、導電率及びヴィッカース硬さの測定に
供した。熱膨張係数は室温から300℃の温度範囲でT
MA(Thermal Mechanical Analysis)装置を用いて行
い、熱伝導率はレーザーフラッシュ法、導電率はシグマ
テスターを用い測定した。その結果を表1に併記した。
また、得られた試料No.5HIP焼結体のミクロ組織を
図1に示す。DESCRIPTION OF THE PREFERRED EMBODIMENTS (Example 1) As a raw material powder, 75
An electrolytic Cu powder of μm or less and a Cu 2 O powder having a purity of 3N and a particle size of 1 to 2 μm were used. Table 2 shows Cu powder and Cu 2 O powder.
And then mixed in a dry pot mill containing steel balls for 10 hours or more. The mixed powder is poured into an iron container having a diameter of 30 mm and a height of 50 mm.
After vacuum degassing and welding sealing at 00 ° C., HIP sintering was performed. The HIP was applied at a pressure of 1000 atm, varied between 800 ° C. and 1000 ° C. depending on the Cu 2 O content, and maintained at each temperature for 3 hours. Thereafter, the specimen was subjected to structure observation, density, thermal expansion coefficient, thermal conductivity, conductivity and Vickers hardness measurement. The coefficient of thermal expansion is T at room temperature to 300 ° C.
The measurement was performed using an MA (Thermal Mechanical Analysis) device, and the thermal conductivity was measured using a laser flash method, and the conductivity was measured using a sigma tester. The results are shown in Table 1.
FIG. 1 shows the microstructure of the obtained sample No. 5 HIP sintered body.
【0043】熱膨張係数,熱伝導率及び導電率は、表1
より明らかなように、CuとCu2Oの組成比を調整する
ことによって、広範囲に亘って変化しており、放熱板に
求められる熱的特性にコントロールできることがわかっ
た。The thermal expansion coefficient, thermal conductivity and conductivity are shown in Table 1.
As is clear, by adjusting the composition ratio of Cu and Cu 2 O, the composition changed over a wide range, and it was found that the thermal characteristics required for the heat sink could be controlled.
【0044】一方、ミクロ組織は図1(200倍)より
明らかなように、Cu2O は混合工程において凝集,焼
結工程において肥大成長するが、粒径は50μm以下で
あり、粒子が複数個連なった複雑な形状をしたCu2O
相が均一に分散した緻密な組織となっている。なお、写
真中の白い部分がCu相、黒い部分がCu2O 相であ
る。Cu2O 粒子が30%以上のものは、複数個の粒子
が連なった塊のものが大部分であり、また、20%以下
のものはその塊が100μm平方当り10個以下で、残
りは粒子となっていた。On the other hand, as apparent from FIG. 1 (200 times), the microstructure of Cu 2 O agglomerates in the mixing step and grows enlarged in the sintering step, but the particle size is 50 μm or less, and a plurality of particles are formed. Cu 2 O with complex shape connected
It has a dense structure in which the phases are uniformly dispersed. The white part in the photograph is the Cu phase, and the black part is the Cu 2 O phase. When the Cu 2 O particles are 30% or more, most of the particles are a lump formed by connecting a plurality of particles. When the Cu 2 O particles are 20% or less, the lump is 10 or less per 100 μm square. Had become.
【0045】硬さ測定の結果、Cu相はHv75〜8
0、Cu2O がHv210〜230の硬さであった。As a result of the hardness measurement, the Cu phase was Hv 75-8.
0, Cu 2 O had a hardness of Hv 210 to 230.
【0046】[0046]
【表1】 [Table 1]
【0047】また、密度はいずれの焼結体とも理論密度
の95%以上であり、常圧焼結の場合に比べて高密度が
得られた。特に、HIPの効果はCu2O 量が多いほど
顕著であった。The density of each sintered body was 95% or more of the theoretical density, and a higher density was obtained as compared with the case of normal pressure sintering. In particular, the effect of HIP was more remarkable as the amount of Cu 2 O was larger.
【0048】(実施例2)粉末の混合をVミキサーで行
った以外は、実施例1と同一の条件でCu−55体積%
Cu2O 焼結体を作製した後に900℃に加熱して20
0トンプレスで1/2厚さまで鍛造し、500℃で軟化
焼鈍した後に、実施例1と同様にミクロ組織,熱伝導率
及び導電率の測定に供した。(Example 2) Cu-55% by volume was obtained under the same conditions as in Example 1 except that the mixing of the powder was performed with a V mixer.
After preparing a Cu 2 O sintered body, it was heated to 900 ° C.
After forging to a thickness of 1/2 with a 0-ton press and softening and annealing at 500 ° C., the microstructure, thermal conductivity and conductivity were measured in the same manner as in Example 1.
【0049】鍛造材は、側面に多少の耳割れが観察され
たが、それ以外の部分は健全であり、本発明の銅複合材
料は、塑性加工性に優れることが判明した。In the forged material, some edge cracks were observed on the side surface, but the other parts were sound. It was found that the copper composite material of the present invention was excellent in plastic workability.
【0050】熱伝導率及び導電率を表2に示すが、鍛造
することによって異方性が生じ、Cu相及びCu2O 相
の配向方向(鍛伸方向)に対して平行なL方向の熱伝導
率及び導電率は、それに直角なC方向(鍛造方向)より
も大きな値を示した。The thermal conductivity and the electrical conductivity are shown in Table 2. The anisotropy was generated by forging, and the heat in the L direction parallel to the orientation direction (forging direction) of the Cu phase and Cu 2 O phase. The conductivity and the conductivity showed values larger than the C direction (forging direction) perpendicular thereto.
【0051】[0051]
【表2】 [Table 2]
【0052】ミクロ組織は、サイズが大きく異なるCu
2O が混在した組織となっており、Vミキサーによる混
合中にCu2O 粒子同士が凝集して生成した50〜20
0μmサイズのものと50μm以下のものの混合組織で
あった。[0052] The microstructure is Cu, which differs greatly in size.
It has a structure in which 2 O is mixed, and 50 to 20 Cu 2 O particles are formed by agglomeration during mixing by a V mixer.
It was a mixed structure of 0 μm size and 50 μm or less.
【0053】(実施例3)原料粉として、74μm以下
の電解Cu粉末と純度3N,粒径1〜2μmのCuO粉
末を用い、Cu粉末とCuO粉末をCu−22.4体積
%CuOの組成比で300g調合した後、直径8mmの鋼
球を入れた直径120mmの遊星ボールミル容器中で25
時間メカニカルアロイング(MA)した。その後、混合
粉末を直径30mm,高さ50mmの鉄製容器に注入し、4
00℃で真空脱気・溶接密封後に、HIP焼結した。H
IPは加圧力を1000気圧とし、800℃×3時間で
行った。その後、組織観察,熱膨張係数及び熱伝導率の
測定,酸化物X線回折に供した。Example 3 As a raw material powder, an electrolytic Cu powder of 74 μm or less and a CuO powder having a purity of 3N and a particle size of 1 to 2 μm were used, and the composition ratio of Cu powder and CuO powder was Cu-22.4% by volume CuO. And 300 g in a 120 mm diameter planetary ball mill container containing 8 mm diameter steel balls.
Time mechanical alloying (MA) was performed. Thereafter, the mixed powder was poured into an iron container having a diameter of 30 mm and a height of 50 mm, and
After vacuum degassing and welding sealing at 00 ° C., HIP sintering was performed. H
The IP was performed at 800 ° C. for 3 hours at a pressure of 1000 atm. Then, it was subjected to structure observation, measurement of thermal expansion coefficient and thermal conductivity, and oxide X-ray diffraction.
【0054】図2にミクロ組織(200倍)を示す。写
真から明らかなように、実施例1の図1に比べて、Cu
2O は微細であり、粒径10μm以下のCu2O が均一
分散している。組織の微細化は、焼結体強度の向上や冷
間圧延性の改善に好適である。また、得られた焼結体の
密度は理論密度の96%であり、同一組成のMA粉を8
00℃×3時間で常圧焼結した場合の83%に比べて大
きく高密度化された。焼結体について、X線回折により
酸化物の同定を行った結果、検出された回折ピークはC
u2O のみであり、焼結中にCuOがCu2O に完全に
変態したことを確認した。また、化学分析の結果、焼結
体組成は、設定通りにCu−40体積%Cu2O であっ
た。FIG. 2 shows a microstructure (200 times). As is clear from the photograph, compared to FIG.
2 O is fine and Cu 2 O having a particle size of 10 μm or less is uniformly dispersed. Refinement of the structure is suitable for improving the strength of the sintered body and improving the cold rolling property. The density of the obtained sintered body was 96% of the theoretical density.
The density was greatly increased compared to 83% in the case of normal pressure sintering at 00 ° C. × 3 hours. As for the sintered body, the oxide was identified by X-ray diffraction. As a result, the detected diffraction peak was C
It was only u 2 O, and it was confirmed that CuO was completely transformed into Cu 2 O during sintering. As a result of the chemical analysis, the composition of the sintered body was Cu-40% by volume Cu 2 O as set.
【0055】一方、熱膨張係数及び熱伝導率は、実施例
1の同一組成のものと同等の値であった。On the other hand, the thermal expansion coefficient and the thermal conductivity were equal to those of the same composition of Example 1.
【0056】(実施例4)原料粉として、74μm以下
の電解Cu粉末と純度3N,粒径1〜2μmのCuO粉
末を用い、Cu−30体積%Cu2O の組成比で150
0g調合した後、スチールボールを入れた乾式のポット
ミル中で10時間以上混合した。そして混合粉末を直径
60mm,高さ100mmの鉄製容器に注入し、400℃で
真空脱気・溶接密封後に、HIP焼結した。HIPは加
圧力を1500気圧とし、900℃×3時間で行った。
その後、組織観察,圧延性の検討を行った。圧延は得ら
れた焼結体を900℃で3mmの厚さに熱間圧延及び酸洗
後、200μmの厚さまで冷間圧延した。Example 4 As raw material powder, electrolytic Cu powder having a particle size of 74 μm or less and CuO powder having a purity of 3N and a particle size of 1 to 2 μm were used at a composition ratio of Cu-30 vol% Cu 2 O of 150.
After mixing 0 g, the mixture was mixed in a dry pot mill containing steel balls for 10 hours or more. Then, the mixed powder was poured into an iron container having a diameter of 60 mm and a height of 100 mm, and after vacuum degassing and welding sealing at 400 ° C., HIP sintering was performed. HIP was performed at 900 ° C. for 3 hours with a pressure of 1500 atm.
After that, microstructure observation and rollability were examined. In the rolling, the obtained sintered body was hot-rolled at 900 ° C. to a thickness of 3 mm, pickled, and then cold-rolled to a thickness of 200 μm.
【0057】図3に得られた焼結体のミクロ組織(20
0倍)を示すが、Cu2O 相はCuとCuOの酸化反応
により生成したCu2OとCuOが分解して生成したC
u2Oからなっており、凝集及び成長肥大化して不規則
な形状を呈しているが、圧延材のミクロ組織は、図4に
示すように、Cu2O 相は塑性変形して圧延方向に配向
し、形状も粒状でかつ微細になっている。FIG. 3 shows the microstructure (20
0 times), but the Cu 2 O phase is formed by decomposition of Cu 2 O and CuO generated by the oxidation reaction of Cu and CuO.
Although it is composed of u 2 O and has an irregular shape due to agglomeration and growth and enlargement, the microstructure of the rolled material shows that the Cu 2 O phase is plastically deformed in the rolling direction as shown in FIG. It is oriented and the shape is granular and fine.
【0058】(実施例5)原料粉として、74μm以下
の電解Cu粉末と粒径1〜2μmのCu2O 粉末を用
い、Cu−15体積%Cu2O の組成比で1500g調
合した後、スチールボールを入れた乾式のポットミル中
で10時間以上混合した。そして混合粉末を直径60m
m,高さ100mmの鉄製容器に注入し、400℃で真空
脱気・溶接密封後に、HIP焼結した。HIPは加圧力
を1500気圧とし、900℃×3時間で行った。[0058] (Example 5) raw material powder, with a Cu 2 O powder of the following electrolytic Cu powder and the particle diameter 1 to 2 [mu] m 74 .mu.m, was 1500g formulated in a composition ratio of Cu-15 vol% Cu 2 O, steel The mixture was mixed in a dry pot mill containing balls for 10 hours or more. And the mixed powder is 60m in diameter
m, and poured into an iron container having a height of 100 mm, vacuum degassed at 400 ° C., sealed by welding, and then HIP-sintered. HIP was performed at 900 ° C. for 3 hours with a pressure of 1500 atm.
【0059】図5に得られた焼結体のミクロ組織(20
0倍)を示すが、30μm以下の粒状のCu2O 相が均
一に分布した組織となっている。FIG. 5 shows the microstructure (20
0 times), but has a structure in which granular Cu 2 O phases of 30 μm or less are uniformly distributed.
【0060】次いで、得られた焼結体を400μmの厚
さまで冷間圧延して塑性加工性を検討した。Cu相中に
それよりも硬さの高いCu2O 相が分散しているため
に、純Cuに比べて変形抵抗が大きくなり、圧延性が劣
る傾向が認められたが、図6に示すように、Cu2O 相
は圧延方向に配向する傾向が認められ、またCu相,C
u2O 相内及びそれらの境界にはクラック等の欠陥は認
められず、本発明の銅複合材料は、塑性加工性により薄
板化が可能であることが判明した。Next, the obtained sintered body was cold-rolled to a thickness of 400 μm to examine plastic workability. Since the Cu 2 O phase having a higher hardness is dispersed in the Cu phase, the deformation resistance is higher than that of pure Cu, and the rollability tends to be inferior. However, as shown in FIG. In addition, the Cu 2 O phase tends to be oriented in the rolling direction, and the Cu phase, C
No defects such as cracks were observed in the u 2 O phase and at the boundaries between them, and it was found that the copper composite material of the present invention can be made thinner by plastic workability.
【0061】(実施例6)本発明の銅複合材料を、パワ
ー半導体素子の内、IGBT(Insulated GateBipolar
Transistor;以下IGBTと略す)モジュールの放熱板
(ベース板)に適用した実施例を述べる。Embodiment 6 An insulated gate bipolar transistor (IGBT) is used in a power semiconductor device by using the copper composite material of the present invention.
Transistor (hereinafter abbreviated as IGBT) An embodiment applied to a heat sink (base plate) of a module will be described.
【0062】図7はIGBT素子24個の場合のモジュ
ール内部の平面図、図8はIGBT1個の場合のモジュ
ールの断面図を示す。IGBT素子101を4個とダイ
オード素子102を2個は銅箔202,203を図示し
ていない銀ろう材でAlN板204に接合したAlN基
板103に半田201により接続される。AlN基板1
03上にはエミッタ配線104とコレクタ配線105,
ゲート配線106の領域が形成されており、IGBT素
子101とダイオード素子102は、コレクタ配線10
5領域に半田付けされる。各素子からは、金属ワイヤ1
07によってエミッタ配線104に接続される。また、
ゲート配線106領域上には抵抗素子108が配置さ
れ、半導体素子であるIGBT素子101のゲートパッ
ドから金属ワイヤ107によって抵抗素子108に接続
される。半導体素子を搭載した6個のAlN基板103
が半田205によって実施例1〜5に記載の本発明に係
る全表面にNiめっきされたCu−Cu2O 複合材から
なる放熱板109に接続される。各絶縁基板間は、端子
206と樹脂性のケース207が一体になったケースブ
ロック208の端子206とAlN基板103を半田2
09によって配線する。また、ケース207と放熱板1
09はシリコンゴム系接着剤210によって接続され
る。ケースブロック208からの端子は、主端子が各A
lN基板103上でエミッタ端子接続位置110,エミ
ッタセンス端子接続位置111,コレクタ接続端子位置
112が各々2箇所,ゲート端子接続位置113が1箇
所で接続される。次に、樹脂注入口を持ったケース蓋2
11から端子全面が被覆されるようシリコンゲル212
を注入し、その後熱硬化型エポキシ樹脂213を全面に
注入してモジュールを完成させる。FIG. 7 is a plan view showing the inside of a module having 24 IGBT elements, and FIG. 8 is a sectional view showing the module having one IGBT. Four IGBT elements 101 and two diode elements 102 are connected by solder 201 to an AlN substrate 103 in which copper foils 202 and 203 are joined to an AlN plate 204 with a silver brazing material (not shown). AlN substrate 1
03, an emitter wiring 104 and a collector wiring 105,
The region of the gate wiring 106 is formed, and the IGBT element 101 and the diode element 102
Soldered to five areas. From each element, a metal wire 1
07 is connected to the emitter wiring 104. Also,
A resistance element 108 is arranged on the gate wiring 106 region, and is connected to the resistance element 108 by a metal wire 107 from a gate pad of the IGBT element 101 which is a semiconductor element. Six AlN substrates 103 on which semiconductor elements are mounted
Is connected to the heat radiating plate 109 made of a Cu—Cu 2 O composite material with Ni plating on all surfaces according to the present invention described in Examples 1 to 5 by the solder 205. The terminals 206 and the AlN substrate 103 of the case block 208 in which the terminals 206 and the resin case 207 are integrated
09 for wiring. Also, the case 207 and the heat sink 1
09 is connected by a silicone rubber adhesive 210. The terminals from the case block 208 have the main terminals
On the 1N substrate 103, an emitter terminal connection position 110, an emitter sense terminal connection position 111, and a collector connection terminal position 112 are respectively connected at two places, and a gate terminal connection position 113 is connected at one place. Next, a case lid 2 having a resin injection port
Silicon gel 212 so as to cover the entire terminal from 11
Is injected, and then a thermosetting epoxy resin 213 is injected over the entire surface to complete the module.
【0063】放熱板109はAl製支持板にボルトによ
って8ケのボルト穴114を通して支持される。ボルト
穴114は機械加工によってあけられる。更に、ケース
207は接着剤210によって結合される他8ケのボルト
によってボルト穴115を通して結合される。The heat radiating plate 109 is supported by eight bolt holes 114 on a supporting plate made of Al by bolts. The bolt holes 114 are drilled by machining. Furthermore, the case
Reference numeral 207 denotes the other two bolts which are connected by the adhesive 210, and is connected through the bolt holes 115.
【0064】表3に一般的に使用されるベース材と、本
発明のCu−Cu2O 合金材でCu−30体積%Cu2
O の熱膨張係数と熱伝導率を示す。Cu−Cu2O ベ
ース材料を用いた半導体素子は、一般的に使用されるC
uベースのモジュールに比べて熱膨張係数が小さく、A
lN基板103とベースとなる放熱板109を接続する
半田209の信頼性を向上させることができる。その一
方で、過酷な使用環境下で半田106の信頼性を向上さ
せるために使用されるMoやAl−SiCベースは、C
u−Cu2O ベースを用いた半導体素子に比べて熱膨張
係数は小さいが、熱伝導率も小さく、モジュールの熱抵
抗が大きくなる問題が生じる。本実施例のCu−Cu2
O ベースを搭載したモジュールでは、信頼性(熱疲労
試験寿命)はCuベースに比べ5倍以上、熱抵抗は同じ
ベース厚さのモジュールで、Moベースに比べて0.8
倍以下にすることができる。[0064] Table a base material generally used in 3, Cu-30% by volume Cu-Cu 2 O alloy material of the present invention Cu 2
The thermal expansion coefficient and thermal conductivity of O 2 are shown. A semiconductor device using a Cu—Cu 2 O-based material is a commonly used C element.
lower thermal expansion coefficient than u-based module,
The reliability of the solder 209 connecting the 1N substrate 103 and the heat sink 109 serving as a base can be improved. On the other hand, Mo and Al-SiC bases used for improving the reliability of the solder 106 under severe use environment
Although the coefficient of thermal expansion is smaller than that of a semiconductor element using a u-Cu 2 O base, there is a problem that the thermal conductivity is small and the thermal resistance of the module increases. Cu-Cu 2 of this example
The reliability (thermal fatigue test life) of the module equipped with the O base is more than 5 times that of the Cu base, and the thermal resistance of the module having the same base thickness is 0.8 compared to the Mo base.
It can be less than double.
【0065】[0065]
【表3】 [Table 3]
【0066】これらの効果により、モジュールの構造や
他の部材の選択の幅を拡げることが可能となる。例え
ば、図7の実施例では、Cu−Cu2O 合金ベース材は
Moベース材に比べて熱伝導率が大きい、言い換えれば
熱拡がり性が向上するため、動作時の半導体素子端部と
中央部の温度差を小さく抑えられる効果があり、半導体
素子を従来モジュールに比べ約1.2 倍に大きくしてい
る。これにより、従来素子では同じ電流量を確保するた
めに、IGBTで30個使用していた構造を24で設計
が可能になり、モジュールサイズを小型化することがで
きた。さらに、AlNより熱伝導率が約20%小さいア
ルミナ基板を絶縁基板に使用することが可能になる。ア
ルミナはAlNに比ベ抗折強度が強く、基板サイズを大
きくすることができる。また、アルミナ板は熱膨張係数
がAlN板に比べ大きく、ベース材料との熱膨張差を小
さくできるので、モジュール自身の反り量も小さくする
ことができる。アルミナ基板の使用により、基板の許容
サイズを大きくできるので、1枚当りの搭載できる半導
体素子数を多くすることができる。つまり、各絶縁板毎
に必須な絶縁確保用の面積や基板間の面積を減らすこと
ができ、モジュールサイズを小さくすることが可能であ
る。With these effects, it is possible to expand the range of selection of the module structure and other members. For example, in the embodiment of FIG. 7, the Cu—Cu 2 O alloy base material has a higher thermal conductivity than the Mo base material, in other words, the heat spreadability is improved. This has the effect of suppressing the temperature difference of the semiconductor module to a small value, and the semiconductor element is about 1.2 times larger than the conventional module. As a result, in order to secure the same amount of current in the conventional device, the structure using 30 IGBTs can be designed with 24, and the module size can be reduced. Further, it becomes possible to use an alumina substrate having a thermal conductivity smaller than that of AlN by about 20% as the insulating substrate. Alumina has higher bending strength than AlN, and can increase the substrate size. Further, since the alumina plate has a larger thermal expansion coefficient than the AlN plate and can reduce the difference in thermal expansion from the base material, the warpage of the module itself can be reduced. By using an alumina substrate, the allowable size of the substrate can be increased, so that the number of semiconductor elements that can be mounted on one substrate can be increased. That is, it is possible to reduce an area for securing insulation and an area between substrates, which are indispensable for each insulating plate, and it is possible to reduce a module size.
【0067】図9は、本実施例のモジュール製造過程の
模式図を示す。(a)Cu−Cu2O放熱板109は、表
面がNiめっきされ、ほぼ平坦な状態で入荷される。
(b)は半導体素子101を半田102により接合した
AlN基板103を半田205により接合する。この時
放熱板109の熱膨張係数が半導体素子とAlN基板の
複合体より大きいので、半田の冷却過程でモジュール裏
面が凹の形状で反る。(c)ケースブロック208を熱
硬化型の接着剤で組立てる工程で、半田接合完了の複合
体301に比べケースの熱膨張係数が大きいため、接着
剤の冷却過程でモジュール裏面がほぼ平坦になる。(d)
モジュール内部にシリコンゲル212,熱硬化型エポキ
シ樹脂213を充填すると、樹脂の熱膨張係数が大きい
ためモジュール裏面が凸の形状で反る。FIG. 9 is a schematic diagram showing a module manufacturing process according to this embodiment. (a) The Cu—Cu 2 O radiator plate 109 is received in a substantially flat state with the surface plated with Ni.
2B, the AlN substrate 103 in which the semiconductor element 101 is joined by the solder 102 is joined by the solder 205. At this time, since the thermal expansion coefficient of the heat radiating plate 109 is larger than the composite of the semiconductor element and the AlN substrate, the back surface of the module warps in a concave shape during the cooling of the solder. (C) In the process of assembling the case block 208 with a thermosetting adhesive, the coefficient of thermal expansion of the case is larger than that of the composite body 301 after the soldering is completed, so that the module back surface becomes almost flat during the cooling of the adhesive. (d)
When the inside of the module is filled with the silicon gel 212 and the thermosetting epoxy resin 213, the back surface of the module is warped in a convex shape due to a large thermal expansion coefficient of the resin.
【0068】図10に、各工程での裏面反り量の実測結
果を示す。変形量がプラスは裏面が凹、マイナスは裏面
凸となるものである。本発明のCu−Cu2O ベースを
使用すると、反り量は従来のMoベースを使用したモジ
ュールに比べると、約1/3に抑えることができる。ま
た、Cuベースの結果は図示していないが、AlN基板
との膨張係数差が大きく(b)の工程で裏面が凹の方向
で反り量が大きく、モジュール完成後でも裏面が凹で1
00μm以上の反りが発生する。本発明のCu−Cu2
O ベースではモジュールの反り量を小さくすることが
できるのでモジュールの大型化が可能になる。また、組
立工程での反り量と同じく、モジュール実働時の温度変
化による反りの変化量も小さいので、モジュールと冷却
フィンの間に塗布するグリースの流失を抑えることがで
きる。FIG. 10 shows the results of measurement of the amount of back surface warpage in each step. When the deformation amount is positive, the back surface is concave, and when the deformation amount is negative, the back surface is convex. When the Cu—Cu 2 O base of the present invention is used, the amount of warpage can be suppressed to about 3 as compared with a module using a conventional Mo base. Although the results for the Cu base are not shown, the difference in expansion coefficient from the AlN substrate is large, and in the step (b), the amount of warpage is large in the direction in which the back surface is concave.
Warpage of 00 μm or more occurs. Cu-Cu 2 of the present invention
With the O base, the amount of warpage of the module can be reduced, so that the module can be made larger. Also, since the amount of change in the warpage due to the temperature change during the actual operation of the module is small, as in the amount of warpage in the assembly process, it is possible to suppress the grease applied to the space between the module and the cooling fins.
【0069】図11に、本発明のモジュールを適用した
電力変換装置の一実施例を示す。パワー半導体装置50
1は、Al製ヒートシンク511上に放熱性グリース5
10をはさんで締め付けボルト512により実装され、
2レベルインバータを構成した例を示す。一般的にモジ
ュール501は、中間点(B点)を一本の中間点配線5
03で配線できるように左右を反転させて実装する。コ
レクタ側配線502とエミッタ側配線504は各々U,
V,W相を配線して電源電圧509を供給する。信号線
は各IGBTモジュール501〜ゲート配線505,エ
ミッタ補助配線506,コレクタ補助配線507によっ
て構成する。508は負荷である。FIG. 11 shows an embodiment of a power converter to which the module of the present invention is applied. Power semiconductor device 50
1 is a heat dissipating grease 5 on an aluminum heat sink 511.
It is mounted with fastening bolts 512 across 10
An example in which a two-level inverter is configured will be described. Generally, the module 501 connects the intermediate point (point B) to one intermediate point wiring 5.
The circuit is mounted with the left and right reversed so that wiring can be performed at 03. Collector-side wiring 502 and emitter-side wiring 504 are U,
The power supply voltage 509 is supplied by wiring the V and W phases. The signal line is composed of each IGBT module 501 to gate wiring 505, auxiliary emitter wiring 506, and auxiliary collector wiring 507. 508 is a load.
【0070】図12に、モジュールの反り量及び図13
にモジュールを実装した場合の締め付け前後のモジュー
ル裏面の反り量(グリース厚さ)を示し、(a)が本発
明、(b)が従来法のものである。従来知られているA
l−SiCベースのモジュールの場合、裏面の凸量が約
100μmであるが、モジュールをグリースを塗布して
締め付けると、締め付け時にグリースに押されて変形
し、逆にモジュールの裏面が凹の状態に変形して中央部
でのグリース厚さが厚くなり、接触抵抗が大きくなる。
これに対して、本発明のCu−Cu2O ベースの場合、
初期の裏面の反り量が約50μmであるが、ベース材の
剛性が大きいので、グリースを塗布して締め付けた後の
モジュール中央部のグリース厚さを約50μmに抑えら
れ、従来のAl−SiCベースに比べて半減させること
ができた。さらにモジュール内でのグリース厚さのばら
つきも小さくすることができる。実装時のグリースに押
されて変形する問題は、Cu−Cu2O 合金よりも剛性
の小さなCuベースモジュールの実装時にも当然発生す
る問題となり、本発明のCu−Cu2O 合金で対策でき
る。FIG. 12 shows the warpage of the module and FIG.
2 shows the amount of warpage (grease thickness) on the back surface of the module before and after tightening when the module is mounted, (a) is the present invention, and (b) is the conventional method. A conventionally known
In the case of an l-SiC-based module, the convexity of the back surface is about 100 μm. However, when the module is coated with grease and tightened, the module is deformed by being pressed by the grease at the time of tightening. Deformation increases the grease thickness at the center and increases the contact resistance.
In contrast, in the case of the Cu—Cu 2 O base of the present invention,
Although the initial back surface warpage is about 50 μm, the rigidity of the base material is large, so the grease thickness at the center of the module after grease is applied and tightened can be reduced to about 50 μm, and the conventional Al-SiC base Was halved compared to. Further, the variation of the grease thickness in the module can be reduced. Implementation of grease pushed deformation problem, a problem which naturally also occurs when implementing the rigidity of small Cu base module than Cu-Cu 2 O alloy, measures in Cu-Cu 2 O alloy of the present invention.
【0071】図に示すように、本発明のCu−Cu2O
合金ベースは従来の高信頼性モジュールで適用されてい
たMoあるいはAl−SiC等のベース材に比べ熱抵
抗,接触熱抵抗を小さくすることができることを説明し
た。それにより、図11に示すようにモジュールを細密
の状態で実装できた。さらに、冷却フィンの冷却効率を
下げることができるので電力変換装置の実装面積,体積
を小さくすることができる。また、グリース厚さを薄く
できることから、冷却フィンの平坦度の許容範囲を大き
く設定できるので、大型フィンでの電力変換装置の組立
ても可能になる。また、強制空冷等の補助冷却機能をな
くすこともでき、この点でも小型化,低騒音化を図るこ
とができる。As shown in the figure, the Cu--Cu 2 O of the present invention
It has been described that the alloy base can reduce the thermal resistance and the contact thermal resistance as compared with the base material such as Mo or Al-SiC used in the conventional high reliability module. As a result, the module can be mounted in a fine state as shown in FIG. Furthermore, since the cooling efficiency of the cooling fins can be reduced, the mounting area and volume of the power converter can be reduced. Further, since the grease thickness can be reduced, the allowable range of the flatness of the cooling fins can be set large, so that it is possible to assemble the power converter using large fins. Further, an auxiliary cooling function such as forced air cooling can be eliminated, and in this respect, the size and noise can be reduced.
【0072】(実施例7)実施例1〜5に記載の本発明
の銅複合材料を放熱板33として図14及び図15に示
すICを搭載したプラスチックパッケージに適用した。
図14は放熱板内蔵型であり、図15は放熱板露出型で
ある。Example 7 The copper composite material of the present invention described in Examples 1 to 5 was applied to a plastic package on which an IC shown in FIGS.
FIG. 14 shows a heat sink built-in type, and FIG. 15 shows a heat sink exposed type.
【0073】放熱板は、モールド樹脂の熱膨張係数を考
慮して、室温から300℃における熱膨張係数が9×1
0-6〜14×10-6/℃の範囲となるように、Cu−2
0〜55体積%Cu2O の範囲内で組成を変えて作製
し、機械加工及びNiめっき処理を施して供した。The heat radiation plate has a thermal expansion coefficient of 9 × 1 from room temperature to 300 ° C. in consideration of the thermal expansion coefficient of the mold resin.
Cu-2 so as to be in the range of 0 -6 to 14 × 10 -6 / ° C.
It was prepared by changing the composition within the range of 0 to 55% by volume Cu 2 O, and subjected to machining and Ni plating.
【0074】図14でパッケージ構造を説明する。リー
ドフレーム31は、絶縁性ホリイミドテープ32を介し
て本発明の銅複合材料からなるNiめっきされた放熱板
33と接着されている。IC34は放熱板33と半田に
て接合されている。また、Auワイヤ35でIC上のA
l電極とリードフレームが接続されている。これらは、
リードフレームの一部を除き、エポキシ樹脂,シリカ製
フィラー、および硬化剤を主成分とするモールド樹脂3
6で封止されている。図15に示した放熱板露出型のパ
ッケージは、放熱板33がモールド樹脂の外部に露出し
ている点が図14と異なる。FIG. 14 illustrates the package structure. The lead frame 31 is bonded to a Ni-plated heat sink 33 made of the copper composite material of the present invention via an insulating polyimide tape 32. The IC 34 is joined to the heat sink 33 by soldering. In addition, the Au wire 35 connects the A on the IC.
The electrode and the lead frame are connected. They are,
Except for a part of the lead frame, a mold resin 3 mainly composed of an epoxy resin, a silica filler, and a curing agent.
6 is sealed. The heatsink-exposed type package shown in FIG. 15 differs from FIG. 14 in that the heatsink 33 is exposed outside the mold resin.
【0075】上記のようにして実装されたパッケージに
ついて、反りや放熱板とモールド樹脂との接合部分での
クラックの有無を観察した。その結果、モールド樹脂と
放熱板との熱膨張差が0.5×10-6/℃ 以下であれば
問題がなく、組成的にはCu−20〜35体積%Cu2
O が熱伝導率も200W/m・Kと高く、好適であっ
た。With respect to the package mounted as described above, the presence or absence of warpage and cracks at the joint between the heat sink and the mold resin was observed. As a result, if the difference in thermal expansion between the mold resin and the heat radiating plate is 0.5 × 10 −6 / ° C. or less, there is no problem, and the composition is Cu-20 to 35% by volume Cu 2.
O 2 was also suitable because of its high thermal conductivity of 200 W / m · K.
【0076】(実施例8)図16及び図17は、実施例
1〜5に記載の本発明の銅複合材料を放熱板42,48
として用い、ICを搭載したセラミックスパッケージの
断面図を示す。まず、図16について説明する。IC4
1はポリイミド系樹脂にてNiめっきされた放熱板42
に接合されている。さらに、放熱板42とAl2O3製の
パッケージ43は半田により接合されている。パッケー
ジにはCuによる配線がなされ、かつ配線基板との接続
用にピン44が設けられている。IC上のAl電極とパ
ッケージの配線とは、Alワイヤ45で接続されてい
る。これらを封止するために、コバール製のウエルドリ
ング46をパッケージにAgろうで接合し、さらにウエ
ルドリングとコバール製のリッド47をローラー電極を
用いて溶接した。図17は、図16のセラミックスパッ
ケージに放熱フィン48を接続したパッケージである。(Embodiment 8) FIGS. 16 and 17 show that the copper composite material of the present invention described in Embodiments 1 to 5 is used as heat sinks 42 and 48.
FIG. 1 shows a cross-sectional view of a ceramic package having an IC mounted thereon. First, FIG. 16 will be described. IC4
Reference numeral 1 denotes a heat sink 42 plated with Ni using a polyimide resin.
Is joined to. Further, the heat sink 42 and the package 43 made of Al 2 O 3 are joined by solder. The package is wired with Cu and provided with pins 44 for connection to a wiring board. The Al electrode on the IC and the wiring of the package are connected by an Al wire 45. To seal them, a weld ring 46 made of Kovar was joined to the package with Ag solder, and the weld ring and a lid 47 made of Kovar were welded using a roller electrode. FIG. 17 shows a package in which a radiation fin 48 is connected to the ceramic package of FIG.
【0077】(実施例9)図18及び図19は、TAB
(Tape Automated Bonding)技術を適用し、かつ実施例
1〜5に記載の本発明の銅複合材料を放熱板に使用した
パッケージについて説明する。(Embodiment 9) FIGS. 18 and 19 show TAB
A package to which the (Tape Automated Bonding) technology is applied and the copper composite material of the present invention described in Examples 1 to 5 is used for a heat sink will be described.
【0078】まず、図18のパッケージについて説明す
る。IC51は熱伝導性樹脂52を介してNiめっきさ
れた本発明に係る放熱板53を接合されている。ICの
端子にはAuバンプ54が形成され、TAB55と接続
されており、さらにTABは薄膜配線56を経由してリ
ードフレーム57と接続されている。ICはシリコンゴ
ム58を挿んで、Al2O3製のセラミックス基板59,
フレーム60、およびシーリングガラス61で密封され
ている。First, the package shown in FIG. 18 will be described. The IC 51 is joined to a heat-radiating plate 53 according to the present invention, which is plated with Ni, via a heat conductive resin 52. Au bumps 54 are formed on the terminals of the IC and are connected to the TAB 55. The TAB is connected to the lead frame 57 via the thin film wiring 56. The IC is formed by inserting a silicon rubber 58 into a ceramic substrate 59 made of Al 2 O 3 .
It is sealed with a frame 60 and a sealing glass 61.
【0079】図19は、樹脂で封止したパッケージであ
る。IC65は、Au−Si合金66により、Niめっ
きされた本発明に係る放熱板67と接合されており、さ
らに、熱伝導性樹脂68により銅接地板69及びNiめ
っきされた本発明に係る放熱板70と接続されている。
一方、ICの端子は、Auバンプ71でTAB72と接
続され、樹脂73にて封止されている。ここで、リード
フレーム57及び放熱板の一部は、封止樹脂の外部に露
出している。また、TABはエポキシ系Agペースト7
4で銅接地板に固定されている。FIG. 19 shows a package sealed with a resin. The IC 65 is joined with the Ni-plated heat radiating plate 67 of the present invention by the Au-Si alloy 66, and further, the copper ground plate 69 and the Ni-plated heat radiating plate of the present invention are plated with the heat conductive resin 68. 70.
On the other hand, the terminals of the IC are connected to the TAB 72 by the Au bumps 71 and are sealed by the resin 73. Here, the lead frame 57 and a part of the heat sink are exposed outside the sealing resin. TAB is an epoxy-based Ag paste 7
4 is fixed to the copper ground plate.
【0080】(実施例10)図20は、実施例1〜5に
記載の本発明の銅複合材料を放熱板に適用したMCMの実
施例を示す。放熱板83は焼結体又はそれを圧延した後
に所定の形状にプレス加工したものである。(Embodiment 10) FIG. 20 shows an embodiment of an MCM in which the copper composite material of the present invention described in Embodiments 1 to 5 is applied to a heat sink. The radiator plate 83 is a sintered body or one obtained by rolling the sintered body and pressing it into a predetermined shape.
【0081】IC81はAuワイヤ82を用いて、Ni
めっきされた本発明に係る放熱板83の上に形成された
薄膜配線84に接続され、さらに、AuワイヤでAlN
製のパッケージ85上に形成されている配線に接続さ
れ、外部端子86として取り出されている。IC部は、
42合金製のリッド87とパッケージのWメタライズ層
の間にAu−Sn製のプリフォーム88を挿んで接合
し、密封されている。The IC 81 uses an Au wire 82 to
The thin film wiring 84 formed on the plated heat sink 83 according to the present invention is connected to the thin film wiring 84, and further, the AlN is connected with an Au wire.
Are connected to the wiring formed on a package 85 made of the same and are taken out as external terminals 86. The IC section
A preform 88 made of Au-Sn is inserted between the lid 87 made of 42 alloy and the W metallized layer of the package to be joined and sealed.
【0082】(実施例11)実施例1〜5に記載の本発
明の銅複合材料を放熱板として、半導体素子が樹脂封止
される半導体装置に適用した実施例を述べる。(Embodiment 11) An embodiment in which the copper composite material of the present invention described in Embodiments 1 to 5 is used as a heat sink and applied to a semiconductor device in which a semiconductor element is resin-sealed.
【0083】一例として、IGBT(Insulated Gate B
ipolar Transistor)などのパワー半導体素子を複数個
搭載し、樹脂封止した半導体装置への適用例を示す。図
21は本発明による半導体装置の断面構成図を示す。パ
ワー半導体素子11,12がはんだ接着層14を介して
Cu製のリードフレームの電極板部13の一方の主面上
に固着され搭載される。電極板部13の他方の主面すな
わち上記部品が搭載された主面の裏面は、絶縁層2を介
して実施例1〜4に記載の本発明に係る全表面にNiめ
っきされたCu−Cu2O 複合材からなる放熱板6に接
着される。次いで、パワー半導体素子11,12は、ア
ルミニウムのワイヤボンデイング部15によりリード電
極部4,5と電気的に接続され、リード電極部4,5の
一部が端子として外部に導出され、主回路を構成する。
さらに主回路はエポキシ系樹脂からなる樹脂層1によっ
て被覆され構造体をなし、リード電極部4,5の端子
部、並びに放熱板6の裏面を露出する形で構造体全体が
エポキシ系樹脂からなる樹脂層3により一体モールド封
止される。As an example, an IGBT (Insulated Gate B)
An example of application to a resin-sealed semiconductor device equipped with a plurality of power semiconductor elements such as an ipolar transistor is shown. FIG. 21 is a sectional view showing the configuration of a semiconductor device according to the present invention. Power semiconductor elements 11 and 12 are fixed and mounted on one main surface of electrode plate 13 of a lead frame made of Cu via solder adhesive layer 14. The other main surface of the electrode plate portion 13, that is, the back surface of the main surface on which the above components are mounted, is Cu-Cu Ni-plated on the entire surface according to the present invention described in Examples 1 to 4 via the insulating layer 2. It is bonded to a heat radiating plate 6 made of a 2 O composite material. Next, the power semiconductor elements 11 and 12 are electrically connected to the lead electrode sections 4 and 5 by the aluminum wire bonding section 15, and a part of the lead electrode sections 4 and 5 is led out as terminals to form a main circuit. Constitute.
Further, the main circuit is covered with a resin layer 1 made of an epoxy resin to form a structure, and the entire structure is made of an epoxy resin so as to expose the terminal portions of the lead electrode portions 4 and 5 and the back surface of the heat sink 6. The resin layer 3 is integrally molded and sealed.
【0084】本実施例では、樹脂層3の材料としてエポ
キシ系樹脂材料を用いたが、例えばポリフェニレン系樹
脂など熱可塑性樹脂であってもよい。また、樹脂層2に
は良好な熱伝導性を得るために、アルミナ,マグネシ
ア,シリカなどの無機材料フィラーが含まれることが望
ましい。In this embodiment, an epoxy resin material is used as the material of the resin layer 3. However, a thermoplastic resin such as a polyphenylene resin may be used. It is desirable that the resin layer 2 contains an inorganic material filler such as alumina, magnesia, and silica in order to obtain good thermal conductivity.
【0085】放熱板は、モールド樹脂の熱膨張係数を考
慮して、室温から300℃における熱膨張係数が14×
10-6〜17×10-6/℃の範囲となるように、Cu−
5〜20体積%Cu2O の範囲内で組成を変えて作製
し、機械加工及びNiめっき処理を施して供した。The heat radiation plate has a thermal expansion coefficient of 14 × from room temperature to 300 ° C. in consideration of the thermal expansion coefficient of the mold resin.
Cu- is selected so as to be in the range of 10 −6 to 17 × 10 −6 / ° C.
It was prepared by changing the composition within the range of 5 to 20% by volume Cu 2 O, and subjected to machining and Ni plating.
【0086】上記のようにして実装された半導体装置に
ついて、反りやモールド樹脂あるいは素子のクラックの
有無を観察した。その結果、モールド樹脂と放熱板との
熱膨張差が0.5 ×10-6/℃以下となるように、放熱
板のCu2O 量を調節することで、問題がなく実装でき
ることがわかった。With respect to the semiconductor device mounted as described above, the presence or absence of warpage, mold resin or cracks of the element was observed. As a result, it was found that by adjusting the amount of Cu 2 O in the heat radiating plate so that the difference in thermal expansion between the mold resin and the heat radiating plate was 0.5 × 10 −6 / ° C. or less, mounting was possible without any problem. .
【0087】本実施例ではパワー半導体素子11とし
て、IGBT素子を用いた半導体装置の例について示し
たが、例えばMOS系トランジスタ,ダイオードなど他
の種類の半導体素子であってもよい。さらに、これら複
数素子の組み合わせによる特定の回路、例えばインバー
タ用パワーモジュールなどであっても良い。また回路中
に抵抗やコンデンサなどの受動素子が含まれていても良
い。これら、電気素子または電子素子はプリント基板の
ような回路基板上に搭載されていても良い。In this embodiment, an example of a semiconductor device using an IGBT element as the power semiconductor element 11 has been described. However, another type of semiconductor element such as a MOS transistor or a diode may be used. Further, a specific circuit formed by combining these plural elements, for example, a power module for an inverter may be used. Further, a passive element such as a resistor or a capacitor may be included in the circuit. These electric or electronic elements may be mounted on a circuit board such as a printed board.
【0088】本実施例では、放熱板がモールド樹脂の外
部に露出したタイプについて述べたが、放熱板内蔵型の
パッケージであっても良い。In this embodiment, the type in which the heat sink is exposed to the outside of the mold resin has been described, but a package with a built-in heat sink may be used.
【0089】(実施例12)図22は、本発明の複合材
料を電極板に使用した静電吸着装置の断面図である。(Embodiment 12) FIG. 22 is a sectional view of an electrostatic chuck using the composite material of the present invention for an electrode plate.
【0090】本静電吸着装置は、図21に示すように、
真空処理室95内部の減圧雰囲気中で導体または半導体
からなる加工物90に加工を施すスパッタリング装置の
チャックとして使用可能である。本静電吸着装置の電極
94に直流電源装置91からの電圧(500V程度)を
印加すると、誘電体板92と加工物90との間に静電吸
引力が発生するため、誘電体板92の表面に加工物90
を吸着させることができる。本実施例に用いた誘電体板
は実施例1〜5に記載の複合材料を用いた。The present electrostatic attraction device is, as shown in FIG.
It can be used as a chuck of a sputtering apparatus for processing a workpiece 90 made of a conductor or a semiconductor in a reduced-pressure atmosphere inside a vacuum processing chamber 95. When a voltage (approximately 500 V) from the DC power supply 91 is applied to the electrode 94 of the present electrostatic attraction device, an electrostatic attraction force is generated between the dielectric plate 92 and the workpiece 90, so that the dielectric plate 92 Workpiece 90 on the surface
Can be adsorbed. As the dielectric plate used in this example, the composite materials described in Examples 1 to 5 were used.
【0091】さて、実際のスパッタリングに際しては、
本静電吸着装置に加工物90を装着した後、ガス排気口
97に連結された排気ポンプを駆動することによって、
真空処理室95の内部圧力が1×10-3Pa程度になる
まで真空排気する。その後、ガス導入口96に取り付け
られたバルブを開放することによって、真空処理室95
の内部に反応ガス(アルゴンガス等)を10SCCM程
度導入する。このときの真空処理室95の内部圧力は2
×10-2Pa程度である。Now, in actual sputtering,
After attaching the workpiece 90 to the electrostatic chuck, the exhaust pump connected to the gas exhaust port 97 is driven,
Evacuation is performed until the internal pressure of the vacuum processing chamber 95 becomes about 1 × 10 −3 Pa. Thereafter, by opening a valve attached to the gas inlet 96, the vacuum processing chamber 95 is opened.
A reaction gas (argon gas or the like) is introduced at about 10 SCCM. At this time, the internal pressure of the vacuum processing chamber 95 is 2
It is about × 10 -2 Pa.
【0092】その後、本静電吸着装置の電極94の高周
波電源13から、約4kWの高周波電力(13.56MH
z)を供給することによって、本静電吸着装置の電極9
4と他の電極(不図示)との間にプラズマを生成させ
る。この場合の高周波印加電圧のVDC及びVPPは、
2kV及び4kVである。尚、本静電吸着装置の電極9
4と高周波電源93との間に挿入されているマッチング
ボックス98は、高周波電力がプラズマに効率的に供給
されるように真空処理室95側とのインピーダンス整合
をとるためのものである。Thereafter, a high-frequency power of about 4 kW (13.56 MH) is supplied from the high-frequency power supply 13 of the electrode 94 of the present electrostatic chuck.
z), the electrodes 9 of the electrostatic chuck
A plasma is generated between the electrode 4 and another electrode (not shown). The VDC and VPP of the high frequency applied voltage in this case are
2 kV and 4 kV. In addition, the electrode 9 of the present electrostatic suction device
A matching box 98 inserted between the power supply 4 and the high frequency power supply 93 is for impedance matching with the vacuum processing chamber 95 so that high frequency power is efficiently supplied to the plasma.
【0093】このスパッタリング装置を実際に使用した
結果、加工中に加工物90の温度は450℃程度にまで
達したが、本静電吸着装置の誘電体板92には、異物発
生の発生原因となる割れ等の発生は認められなかった。
このことは、本静電吸着装置の使用が、加工の信頼性の
向上に有用であることを意味する。As a result of actually using the sputtering apparatus, the temperature of the workpiece 90 reached about 450 ° C. during the processing. No cracks were found.
This means that the use of the present electrostatic suction device is useful for improving the reliability of processing.
【0094】尚、スパッタリング装置の他、減圧雰囲気
で導体または半導体(例えば、シリコン基板)からなる
加工物に加工を施す加工装置(いわゆる、減圧中加工装
置)、例えば、化学的気相蒸着装置,物理的蒸着装置,
ミリング装置,エッチング装置,イオン注入装置等のチ
ャックとして本静電吸着装置を使用しても、加工の信頼
性の向上という同様な効果が達成されることはいうまで
もない。In addition to the sputtering apparatus, a processing apparatus for processing a workpiece made of a conductor or a semiconductor (for example, a silicon substrate) in a reduced-pressure atmosphere (so-called processing apparatus under reduced pressure), for example, a chemical vapor deposition apparatus, Physical vapor deposition equipment,
It goes without saying that the same effect of improving the processing reliability can be achieved by using the present electrostatic chucking device as a chuck for a milling device, an etching device, an ion implantation device and the like.
【0095】本実施例によれば、誘電体板と電極の熱膨
張を調節することが可能であり、その耐熱性を向上させ
ることができる。従って、本発明に係る静電吸着装置を
減圧中加工装置のチャックとして利用すれば、誘電体板
の割れ等に起因する異物の発生率を低減させることでき
る。According to the present embodiment, it is possible to adjust the thermal expansion of the dielectric plate and the electrodes, and it is possible to improve the heat resistance. Therefore, if the electrostatic suction device according to the present invention is used as a chuck of a processing device under reduced pressure, it is possible to reduce the incidence of foreign matter due to cracks in the dielectric plate.
【0096】また、電極板あるいは電極板の下部に加熱
用のヒーターを組み込んだ場合でも、熱膨張率を調節す
ることで加工の信頼性向上という同様な効果が達成され
る。 (実施例13)実施例1〜5によって得られた焼結材を
用いて塑性加工を施した後、所望の厚さまで冷間圧延に
よってリードフレーム用のテープを製造した。更に、引
き続いてプレス加工によって複数の半導体素子搭載分の
リードフレームを得た。本実施例ではリードフレーム1
00はCuとCu2O の複合材から構成されている。Even when a heater for heating is incorporated in the electrode plate or a lower portion of the electrode plate, the same effect of improving the reliability of processing can be achieved by adjusting the coefficient of thermal expansion. (Example 13) After plastic working was performed using the sintered material obtained in Examples 1 to 5, a tape for a lead frame was manufactured by cold rolling to a desired thickness. Subsequently, a lead frame for mounting a plurality of semiconductor elements was obtained by press working. In this embodiment, the lead frame 1
Reference numeral 00 is composed of a composite material of Cu and Cu 2 O.
【0097】CuとCu2O の複合材は加工性が優れて
いるためこのような形状のリードフレームを薄板の打抜
き法により作成できる。この表面にNiめっきを施し
た。Since the composite material of Cu and Cu 2 O has excellent workability, a lead frame having such a shape can be produced by a thin plate punching method. This surface was plated with Ni.
【0098】本発明の他の実施例のリードフレーム形状
として、リードフレーム100のチップ搭載部はリード
フレーム100の他の部分よりCu2O の含有率が高く
なっている。このため半導体チップとの熱膨張係数差が
小さくなり熱疲労や熱応力がさらに低減できる。また、
他の部分のCu2O の含有率が低いかあるいはほぼCu
から構成されるため高い導電率であるためパワートラン
ジスタの低オン抵抗化やIC等の高容量化に有効であ
る。As the lead frame shape of another embodiment of the present invention, the chip mounting portion of the lead frame 100 has a higher Cu 2 O content than the other portions of the lead frame 100. For this reason, the difference in thermal expansion coefficient from the semiconductor chip is reduced, and thermal fatigue and thermal stress can be further reduced. Also,
The content of Cu 2 O in other parts is low or almost
, And has high conductivity, which is effective for reducing the on-resistance of the power transistor and increasing the capacity of an IC or the like.
【0099】(実施例14)図23は、実施例13で得
られたリードフレームにLSIシリコン素子300を搭
載し、エポキシ樹脂によって樹脂封止した面実装型樹脂
封止半導体装置の斜視図である。エポキシ樹脂309は
以下に説明する充填材を有する樹脂を用いたものであ
る。305はAu線、306はそのダイボンディング、
307はアウターリード、308はサポートバーであ
る。(Embodiment 14) FIG. 23 is a perspective view of a surface-mount type resin-sealed semiconductor device in which an LSI silicon element 300 is mounted on the lead frame obtained in Embodiment 13 and sealed with an epoxy resin. . The epoxy resin 309 uses a resin having a filler described below. 305 is an Au wire, 306 is its die bonding,
307 is an outer lead, and 308 is a support bar.
【0100】表4に示す各種充填剤及びエポキシ樹脂組
成物を80℃に加熱した二軸ロールで10分間混練し
た。The various fillers and epoxy resin compositions shown in Table 4 were kneaded with a biaxial roll heated to 80 ° C. for 10 minutes.
【0101】得られた球状充填材を用いた組成物は、角
状の充填材を用いた組成物とゲル化時間はほとんど同じ
でも、溶融粘度が極めて低く、また、流動性も大きい。
さらに、RRS粒度線図で表示した勾配nが小さな値の
充填材を配合した組成物ほど溶融粘度が低く流動性が大
きいものである。n値が0.6 以下では、溶融粘度(1
80℃)がやや上昇するので好ましくない。The composition using the obtained spherical filler has a very low melt viscosity and a large fluidity even though the gelation time is almost the same as that of the composition using the square filler.
Further, a composition containing a filler having a smaller gradient n represented by an RRS particle size diagram has a lower melt viscosity and a higher fluidity. When the n value is 0.6 or less, the melt viscosity (1
80 ° C.) is undesirably increased.
【0102】[0102]
【表4】 [Table 4]
【0103】また、充填材として球状充填材(球−1)
を用い、その添加量として70,75,80及び85重
量%の樹脂組成物をそれぞれ作成した。Further, a spherical filler (sphere-1) is used as the filler.
Was used to prepare 70, 75, 80 and 85% by weight of a resin composition, respectively.
【0104】これらの樹脂組成物を用いてトランスファ
成形し、180℃/6時間の後硬化を行って室温の線膨
張係数,曲げ弾性率,熱応力を測定した。Transfer molding was performed using these resin compositions, and post-curing was performed at 180 ° C. for 6 hours, and the linear expansion coefficient, flexural modulus, and thermal stress at room temperature were measured.
【0105】さらにまた、表面にアルミニウムのジグザ
グ配線を形成した半導体素子をトランスファプレス封止
し、−55℃/30分⇔+150℃/30分の2000
サイクルの冷熱サイクル試験を行い、封止樹脂層の耐ク
ラック性,リード・金ワイヤボンディング,アルミニウ
ム配線の接続信頼性(抵抗値が50%以上変化した場合
を不良と判定)を評価した。これらの結果を表5に示
す。Further, the semiconductor element having the aluminum zigzag wiring formed on the surface is transfer-press-sealed, and subjected to −55 ° C./30 minutes⇔ + 150 ° C./30/2000.
A cycle thermal cycle test was conducted to evaluate the crack resistance of the sealing resin layer, the lead / gold wire bonding, and the connection reliability of the aluminum wiring (if the resistance value changed by 50% or more was judged to be defective). Table 5 shows the results.
【0106】表5より、シリコン重合体を含み充填剤が
80重量%以上の組成物は、線膨張係数が1.3×10
-5/℃ 以下と小さく、弾性率の増加も少ない。従って
インサートに生じる熱応力も小さいことが分かる。According to Table 5, the composition containing a silicone polymer and containing 80% by weight or more of a filler has a linear expansion coefficient of 1.3 × 10
-5 / ° C or less and little increase in elastic modulus. Therefore, it can be seen that the thermal stress generated in the insert is also small.
【0107】本実施例のような樹脂組成物を用いた樹脂
封止型半導体装置は、冷熱サイクル試験のような熱衝撃
が加えられても耐クラック性や配線の接続信頼性が極め
て優れている。The resin-encapsulated semiconductor device using the resin composition as in this example is extremely excellent in crack resistance and wiring reliability even when subjected to a thermal shock such as a thermal cycle test. .
【0108】本実施例においては、シロキサンを含まな
い樹脂組成物に対して粒径100μm以下の球形石英粉
を充填剤の95%とし、残りを粒径10μm以下の角形
石英粉を用い、全体で85重量%とした。また、シロキ
サンを含む樹脂組成物に対して粒径100μm以下の球
形石英粉を充填剤の70%とし、残りを粒径5μm以下
の角形石英粉を用い、全体で80.5重量%とした。In this example, a spherical quartz powder having a particle size of 100 μm or less was used as 95% of the filler with respect to the resin composition containing no siloxane, and the remainder was a square quartz powder having a particle size of 10 μm or less. It was 85% by weight. In addition, spherical quartz powder having a particle size of 100 μm or less was used as 70% of the filler in the resin composition containing siloxane, and the remainder was made up of square quartz powder having a particle size of 5 μm or less, and the total was 80.5% by weight.
【0109】[0109]
【表5】 [Table 5]
【0110】RRS粒度線図とは、Rosin−Rammlerの
式に従う粒度分布を表わす粒度線図(日本粉体工業協会
頒布:粉体工学ハンドブック51〜53頁)のことであ
る。 R(Dp)=100exp(−b・Dpn) …(1) 〔但し、R(Dp):最大粒径から粒径Dpまでの累積重
量%,Dp:粒径,bおよびn:定数〕 RRS粒度線図における勾配とは、RRS粒度線図の最
大粒径からの累積重量%が、25%と75%の二点を結
んだ直線で代表されるRosin−Rammlerの式のnの値の
ことを言う。The RRS particle size diagram is a particle size diagram representing a particle size distribution according to the Rosin-Rammler equation (distributed by the Japan Powder Industry Association: Powder Engineering Handbook, pp. 51-53). R (Dp) = 100exp (-b · Dp n) ... (1) [where, R (Dp): cumulative weight percent of the maximum particle size to the particle size Dp, Dp: particle size, b and n: constants] RRS The gradient in the particle size diagram is the value of n in the Rosin-Rammler equation where the cumulative weight% from the maximum particle size in the RRS particle size diagram is represented by a straight line connecting two points of 25% and 75%. Say
【0111】充填材の原石を微粉砕した場合の粒度分布
は、Rosin−Rammlerの式と一致し、この式に基づく粒
度分布を表わすRRS粒度線図では、ほぼ直線を示すと
されている。The particle size distribution when the filler ore is finely pulverized matches the Rosin-Rammler equation, and the RRS particle size diagram showing the particle size distribution based on this equation shows an almost straight line.
【0112】本発明者らは、各種充填材の粒度分布を測
定したところ、特別のふるい分けをしない限り、いずれ
の充填材もその90重量%以上がRRS粒度線図で、ほ
ぼ、直線性を示し、上式によく適合することを確認して
いる。The present inventors measured the particle size distribution of various fillers. As a result, 90% by weight or more of all the fillers showed an RRS particle size diagram and showed almost linearity unless special sieving was performed. It has been confirmed that the above formula is well matched.
【0113】本発明で用いる球状の溶融石英粉は、予め
所定の粒度分布に粉砕した溶融石英粉を、プロパン,ブ
タン,アセチレン,水素などの可燃性ガスを燃料とする
溶射装置から発生させた高温火炎中に一定量ずつ供給し
て溶融後冷却した球形のものが最も好ましい。上記の溶
融石英はそれ自身の線膨張係数が比較的小さく、イオン
性不純物も極めて少ないので、半導体素子封止用樹脂組
成物材料として適している。The spherical fused quartz powder used in the present invention is a high-temperature fused quartz powder that has been previously ground to a predetermined particle size distribution and is generated from a thermal spraying apparatus using a combustible gas such as propane, butane, acetylene, or hydrogen as a fuel. Spherical ones that are fed into a flame in a fixed amount and melted and then cooled are most preferred. The above-mentioned fused quartz has a relatively small coefficient of linear expansion by itself and an extremely small amount of ionic impurities, and thus is suitable as a resin composition material for semiconductor element sealing.
【0114】充填材の90重量%以上が粒径0.5〜1
00μm の範囲とするのが好ましい。0.5μm 未満
の微粒子が多くなると、樹脂組成物のチクサトロピック
性が大きくなり、粘度上昇や流動性が低下する。また、
100μmを超える粒子が多くなると封止する際に、半
導体素子のAu線を変形,切断したり、粗い粒子が金型
中で目詰りを起こして、樹脂の充填不良等が発生し易く
なるためである。90% by weight or more of the filler has a particle size of 0.5 to 1
It is preferably in the range of 00 μm. When the number of fine particles having a particle size of less than 0.5 μm increases, the ixotropic properties of the resin composition increase, and the viscosity increases and the fluidity decreases. Also,
If the number of particles exceeding 100 μm increases, the Au wire of the semiconductor element may be deformed or cut during sealing, or coarse particles may cause clogging in the mold, and resin filling failure may easily occur. is there.
【0115】次に、RRS粒度線図で示す勾配nを0.
6〜0.95とするのが最も好ましく、nが0.95 よ
り大きくなると充填材の嵩張り、樹脂組成物の粒度上昇
や流動性の低下が起こる。そこで、nはできるだけ小さ
い値が望ましいが、本発明において充填材の90%以上
が0.5〜100μm の粒径範囲にあることが望まし
く、n値0.6 と言うのは、この条件内でとり得る最小
の値である。Next, the gradient n shown in the RRS particle size diagram is set to 0.
It is most preferred to be 6 to 0.95, and when n is larger than 0.95, the filler becomes bulky, the particle size of the resin composition increases and the fluidity decreases. Therefore, it is desirable that n is as small as possible, but in the present invention, it is desirable that 90% or more of the filler is in the particle size range of 0.5 to 100 μm. This is the smallest possible value.
【0116】本発明で用いるシリコン重合体は、アミノ
基,カルボキシル基,エポキシ基,水酸基,ピリミジン
基等の官能基を末端あるいは側鎖に持つポリジメチルシ
ロキサンである。The silicone polymer used in the present invention is a polydimethylsiloxane having a functional group such as an amino group, a carboxyl group, an epoxy group, a hydroxyl group or a pyrimidine group at a terminal or a side chain.
【0117】常温で固体のエポキシ樹脂は、半導体封止
材料としてクレゾールノボラック型エポキシ樹脂,フェ
ノールノボラック型エポキシ樹脂,ビスフェノールA型
エポキシ樹脂等を指し、硬化剤としてフェノールノボラ
ックやクレゾールノボラック等のノボラック樹脂,無水
ピロメリット酸や無水ベンゾフェノン等の酸無水物等を
用い、さらに硬化促進剤,可撓化剤,カップリング剤,
着色剤,難燃化剤,離型剤等を必要に応じて配合するこ
とができる。The epoxy resin which is solid at room temperature refers to a cresol novolak type epoxy resin, a phenol novolak type epoxy resin, a bisphenol A type epoxy resin or the like as a semiconductor encapsulating material. An acid anhydride such as pyromellitic anhydride or benzophenone anhydride is used, and a curing accelerator, a flexible agent, a coupling agent,
A coloring agent, a flame retardant, a release agent, and the like can be added as needed.
【0118】このエポキシ樹脂組成物は、各素材を70
〜100℃に加熱した二軸ロールや押出機で混練し、ト
ランスファプレスで金型温度160〜190℃,成形圧
力30〜100kg/cm2 ,硬化時間1〜3分で成形する
ことができる。This epoxy resin composition was prepared by adding 70% to each material.
The mixture can be kneaded with a biaxial roll or an extruder heated to 100100 ° C. and molded by a transfer press at a mold temperature of 160 to 190 ° C., a molding pressure of 30 to 100 kg / cm 2 , and a curing time of 1 to 3 minutes.
【0119】硬化物の線膨張係数は前述の如く1.3×
10-5/℃ 以下と小さくすることにより、弾性率も小
さくできる。従って、封止時の半導体素子のAuボンデ
ィングワイヤの変形,断線が少なく、線膨張係数の差に
基づく熱応力が小さいために、耐温度サイクル性,耐熱
性,耐湿性等が良好である。The linear expansion coefficient of the cured product is 1.3 × as described above.
By making it as low as 10 -5 / ° C or less, the elastic modulus can be made small. Therefore, the deformation and disconnection of the Au bonding wire of the semiconductor element at the time of sealing are small, and the thermal stress based on the difference in linear expansion coefficient is small, so that the temperature cycle resistance, heat resistance, moisture resistance and the like are good.
【0120】充填材として石英粉を溶融し球形化するこ
とにより、かさばりが小さくなり高充填化し易い。さら
に、半導体素子の封止の際、充填材の角部が素子を損傷
して素子特性に悪影響を及ぼすのを防ぐことができる。
さらに、シリコン重合体を配合したことにより弾性率を
小さくすることができ、線膨張係数の違いによって生じ
る熱応力をより小さくすることができる。By melting and spheroidizing quartz powder as a filler, the bulk is reduced and the filler is easily filled. Further, at the time of sealing the semiconductor element, it is possible to prevent the corners of the filler from damaging the element and adversely affecting the element characteristics.
Furthermore, the elastic modulus can be reduced by blending the silicon polymer, and the thermal stress caused by the difference in linear expansion coefficient can be further reduced.
【0121】[0121]
【発明の効果】本発明の複合材料は、低熱膨張で高熱伝
導性を有するとともに高い塑性加工性を有することから
製造工程が短縮され多量生産が可能となる顕著な効果を
有する。The composite material of the present invention has a remarkable effect that it has a low thermal expansion, high thermal conductivity and high plastic workability, so that the production process can be shortened and mass production becomes possible.
【0122】また、本発明の複合材料は、特に高熱伝導
性を有するCu相と低熱膨張性のCu2O 相からなる混
合組織を有するために、両方の特性を兼ね備えている。
また、本発明の複合材料は、Cu及びCu2O 両者の含
有量を調整することにより、低熱膨張係数で高熱伝導率
を得ることができる。本発明の用途として、半導体装置
に搭載される放熱板や静電吸着装置の電極板に適用でき
る。The composite material of the present invention has both properties because it has a mixed structure composed of a Cu phase having high thermal conductivity and a Cu 2 O phase having low thermal expansion.
Further, the composite material of the present invention can obtain a high thermal conductivity with a low coefficient of thermal expansion by adjusting the content of both Cu and Cu 2 O. As an application of the present invention, it can be applied to a heat sink mounted on a semiconductor device or an electrode plate of an electrostatic attraction device.
【図1】本発明の実施例1に係る試料No.5(Cu−4
0体積%Cu2O )焼結体のミクロ組織を示す光学顕微
鏡写真。FIG. 1 shows a sample No. 5 (Cu-4) according to Example 1 of the present invention.
Optical micrograph showing the microstructure of a 0 volume% Cu 2 O) sintered body.
【図2】本発明の実施例3に係るCu−22.4 体積%
CuO焼結体のミクロ組織を示す光学顕微鏡写真。FIG. 2 shows Cu-22.4% by volume according to Example 3 of the present invention.
An optical microscope photograph showing a microstructure of a CuO sintered body.
【図3】本発明の実施例4に係るCu−30体積%Cu
2O 焼結体のミクロ組織を示す光学顕微鏡写真。FIG. 3 shows Cu-30% by volume Cu according to Example 4 of the present invention.
An optical microscope photograph showing the microstructure of a 2 O sintered body.
【図4】本発明の実施例4に係るCu−30体積%Cu
2O の圧延材の鍛伸方向に平行な面のミクロ組織を示す
光学顕微鏡写真。FIG. 4 shows Cu-30% by volume Cu according to Example 4 of the present invention.
The optical microscope photograph which shows the microstructure of the surface parallel to the forging direction of the rolled material of 2 O.
【図5】本発明の実施例5に係るCu−15体積%Cu
2O 焼結体のミクロ組織を示す光学顕微鏡写真。FIG. 5 shows Cu-15% by volume Cu according to Example 5 of the present invention.
An optical microscope photograph showing the microstructure of a 2 O sintered body.
【図6】本発明の実施例5に係るCu−15体積%Cu
2O の圧延材の鍛伸方向に平行な面のミクロ組織を示す
光学顕微鏡写真。FIG. 6 shows Cu-15% by volume Cu according to Example 5 of the present invention.
The optical microscope photograph which shows the microstructure of the surface parallel to the forging direction of the rolled material of 2 O.
【図7】本発明の実施例6に係るIGBTモジュールの
平面図。FIG. 7 is a plan view of an IGBT module according to Embodiment 6 of the present invention.
【図8】本発明の実施例6に係るIGBTモジュールの
断面図。FIG. 8 is a sectional view of an IGBT module according to a sixth embodiment of the present invention.
【図9】本発明の実施例6に係るIGBTモジュールの
製造工程の模式図。FIG. 9 is a schematic view of a manufacturing process of an IGBT module according to Embodiment 6 of the present invention.
【図10】本発明の実施例6に係るIGBTモジュール
の各工程でのベース反り量を示す線図。FIG. 10 is a diagram showing the amount of base warpage in each step of the IGBT module according to Embodiment 6 of the present invention.
【図11】本発明の実施例6に係るIGBTモジュール
を実装した電力変換装置の平面図及びその断面図。FIGS. 11A and 11B are a plan view and a cross-sectional view of a power converter in which an IGBT module according to a sixth embodiment of the present invention is mounted.
【図12】本発明の実施例6に係るIGBTモジュール
を実装した電力変換装置のモジュールの実装前の反り
量。FIG. 12 shows the amount of warpage of a power converter in which an IGBT module according to a sixth embodiment of the present invention is mounted before mounting the module.
【図13】実装後における反り量を示す線図。FIG. 13 is a diagram showing the amount of warpage after mounting.
【図14】本発明の実施例7に係る放熱板内蔵型プラス
チックパッケージの断面図。FIG. 14 is a sectional view of a plastic package with a built-in heat sink according to a seventh embodiment of the present invention.
【図15】本発明の実施例7に係る放熱板露出型プラス
チックパッケージの断面図。FIG. 15 is a cross-sectional view of a heatsink-exposed plastic package according to a seventh embodiment of the present invention.
【図16】本発明の実施例8に係るセラミックスパッケ
ージの断面図。FIG. 16 is a sectional view of a ceramic package according to an eighth embodiment of the present invention.
【図17】本発明の実施例8に係る放熱フィン付きセラ
ミックスパッケージの断面図。FIG. 17 is a cross-sectional view of a ceramic package with heat radiation fins according to Embodiment 8 of the present invention.
【図18】本発明の実施例9に係る半導体装置の断面
図。FIG. 18 is a sectional view of a semiconductor device according to a ninth embodiment of the present invention.
【図19】本発明の実施例9に係る半導体装置の断面
図。FIG. 19 is a sectional view of a semiconductor device according to a ninth embodiment of the present invention.
【図20】本発明の実施例10に係るMCMの断面図。FIG. 20 is a sectional view of an MCM according to Embodiment 10 of the present invention.
【図21】本発明の実施例11に係る放熱板露出型プラ
スチックパッケージの断面図。FIG. 21 is a cross-sectional view of a heat sink exposed plastic package according to Embodiment 11 of the present invention.
【図22】本発明の実施例12に係る静電吸着装置の断
面図。FIG. 22 is a sectional view of an electrostatic chuck according to a twelfth embodiment of the present invention.
【図23】樹脂封止型半導体装置の斜視図。FIG. 23 is a perspective view of a resin-sealed semiconductor device.
31,100…リードフレーム、33,42,59,1
09…放熱板、48…放熱フィン、300…LSIシリ
コン素子。31, 100 ... lead frame, 33, 42, 59, 1
09: heat sink, 48: heat sink, 300: LSI silicon element.
フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 23/373 B22F 3/14 H // C22C 1/04 H01L 23/36 M (72)発明者 阿部 輝宜 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 金田 潤也 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 青野 泰久 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 斉藤 隆一 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 (72)発明者 小池 義彦 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内 Fターム(参考) 4K018 AA04 AB01 AC01 AD09 EA11 FA05 FA08 JA01 KA33 KA37 4K020 AA22 AB01 AC04 BB09 BC02 5F031 CA02 FA01 FA07 HA02 HA03 HA16 HA37 MA28 MA29 MA31 MA32 NA04 NA05 PA11 5F036 AA01 BB01 BD01 BD11 Continued on the front page (51) Int.Cl. 7 Identification FI FI Theme Court II (Reference) H01L 23/373 B22F 3/14 H // C22C 1/04 H01L 23/36 M (72) Inventor Teruyoshi Abe Ibaraki 7-1-1, Omikacho, Hitachi City Hitachi Research Laboratory, Hitachi, Ltd. (72) Inventor Junya Kanada 7-1-1, Omikamachi, Hitachi City, Ibaraki Pref. Hitachi Research Laboratory, Hitachi, Ltd. (72) Inventor Yasuhisa Aono 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Inside Hitachi, Ltd.Hitachi Research Laboratories Co., Ltd. 72) Inventor Yoshihiko Koike 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture F-term in Hitachi Research Laboratory, Hitachi, Ltd.F-term (reference) FA01 FA07 HA02 HA03 HA16 HA37 MA28 MA29 MA31 MA32 NA04 NA05 PA 11 5F036 AA01 BB01 BD01 BD11
Claims (22)
機化合物粒子とを有し、前記化合物粒子は該粒子全体の
95%以上又は50%以下が互いに連なった複雑形状の
塊となって分散した等方加圧焼結体からなることを特徴
とする複合材料。An inorganic compound particle having a coefficient of thermal expansion smaller than that of a metal, wherein the compound particle is a complex-shaped mass in which 95% or more or 50% or less of the whole particle is connected to each other. A composite material comprising a dispersed isotropically pressed sintered body.
機化合物粒子とを有し、前記化合物粒子は単独で存在す
る粒子の数が断面で100μm平方内に100個以下で
あり、残りの前記化合物粒子は複数個が互いに連なった
複雑形状の塊となって分散又は前記化合物粒子は複数個
が互いに連なった塊が100μm平方当り10個以下分
散した等方加圧焼結体よりなることを特徴とする複合材
料。2. The method according to claim 1, wherein the metal particles and inorganic compound particles having a smaller coefficient of thermal expansion than the metal have 100 or less particles in a 100 μm square cross section. The compound particles are dispersed in the form of a complex shape in which a plurality of the particles are connected to each other, or the compound particles are formed of an isotropically pressed sintered body in which a plurality of the connected particles are dispersed in an amount of 10 or less per 100 μm square. Characteristic composite material.
機化合物粒子を有し、前記化合物粒子はヴィッカース硬
さが300以下であり、等方加圧焼結体よりなることを
特徴とする複合材料。3. A method according to claim 1, wherein said compound particles have a Vickers hardness of 300 or less and are made of an isotropically pressed sintered body. Composite materials.
機化合物粒子とを有し、20℃での熱伝導率1w/m・
K当りの20〜150℃の平均熱膨張係数の増加率が0.
025〜0.035ppm/℃であり、等方加圧焼結体よりな
ることを特徴とする複合材料。4. It has a metal and inorganic compound particles having a smaller coefficient of thermal expansion than the metal, and has a thermal conductivity at 20 ° C. of 1 w / m · m.
The rate of increase in the average coefficient of thermal expansion from 20 to 150 ° C. per K is 0.
A composite material having a concentration of 025 to 0.035 ppm / ° C. and comprising an isotropically pressed sintered body.
機化合物粒子とを有し、前記化合物粒子は互いに連なっ
た塊が塑性加工によって伸ばされた方向に延びて分散し
た等方加圧焼結体よりなることを特徴とする複合材料。5. An isotropic pressure sintering method comprising a metal and inorganic compound particles having a smaller coefficient of thermal expansion than the metal, wherein the compound particles are formed by dispersing a continuous mass in the direction of extension by plastic working. A composite material characterized by being formed of a compact.
は断面の面積率で前記粒子の全体の95%以上又は50
%以下が互いに連なった複雑形状の塊となって分散した
等方加圧焼結体よりなることを特徴とする複合材料。6. Copper particles having copper and copper oxide particles, wherein the copper oxide particles have a cross-sectional area ratio of 95% or more or 50% or more of the whole of the particles.
A composite material comprising an isotropically pressurized sintered body in which a mass of less than or equal to% is dispersed in a complicated shape mass connected to each other.
よりなることを特徴とする半導体装置用放熱板。7. A heat sink for a semiconductor device, comprising a composite material according to any one of claims 1 to 6.
有することを特徴とする半導体装置用放熱板。8. A heat sink for a semiconductor device according to claim 7, further comprising a Ni plating layer on the surface.
基板上に搭載された半導体素子を有する半導体装置にお
いて、前記放熱板は請求項7又は8に記載の放熱板より
なることを特徴とする半導体装置。9. A semiconductor device having an insulating substrate mounted on a radiator plate and a semiconductor element mounted on the insulating substrate, wherein the radiator plate comprises the radiator plate according to claim 7 or 8. Semiconductor device.
記放熱板に接続されたリードフレームと、該リードフレ
ームと半導体素子とを電気的に接続する金属ワイヤとを
備え、前記半導体素子を樹脂封止した半導体装置におい
て、前記放熱板は請求項7又は8に記載の放熱板よりな
ることを特徴とする半導体装置。10. A semiconductor device comprising: a semiconductor element mounted on a heat sink; a lead frame connected to the heat sink; and a metal wire for electrically connecting the lead frame and the semiconductor element. A semiconductor device in which the heat sink is made of the heat sink according to claim 7.
記放熱板に接続されたリードフレームと、該リードフレ
ームと半導体素子とを電気的に接続する金属ワイヤとを
備え、前記半導体素子を樹脂封止するとともに、前記放
熱板の少なくとも前記素子の接合面に対して反対の面側
が開放されている半導体装置において、前記放熱板は請
求項7又は8に記載の放熱板よりなることを特徴とする
半導体装置。11. A semiconductor device comprising: a semiconductor element mounted on a heat sink; a lead frame connected to the heat sink; and a metal wire for electrically connecting the lead frame and the semiconductor element. In a semiconductor device which is resin-sealed and has at least a surface of the heat radiating plate opposite to the bonding surface of the element being open, the heat radiating plate comprises the heat radiating plate according to claim 7 or 8. Semiconductor device.
部配線接続用ピンを有し、中央部に前記素子を収納する
開放空間を有するセラミックス多層配線基板と、前記素
子と基板の端子とを電気的に接続する金属ワイヤとを備
え、前記素子を前記空間に設置するように前記放熱板と
前記基板とを接合するとともに前記基板をリッドによっ
て接合し前記素子を大気より遮断する半導体装置におい
て、前記放熱板は請求項7又は8に記載の放熱板よりな
ることを特徴とする半導体装置。12. A ceramic multilayer wiring board having a semiconductor element mounted on a heat sink, an external wiring connection pin, and an open space for accommodating the element in the center, and a terminal of the element and the substrate. A metal wire that electrically connects the heat sink and the substrate so as to place the element in the space, and joins the substrate with a lid to shield the element from the atmosphere. 9. A semiconductor device comprising the heat radiating plate according to claim 7 or 8.
部配線接続用端子を有し、中央部に前記素子を収納する
凹部を有するセラミックス多層配線基板と、前記素子と
基板の端子とを電気的に接続する金属ワイヤとを備え、
前記素子を前記凹部に設置するように前記放熱板と前記
基板の凹部とを接合するとともに前記基板をリッドによ
って接合し前記素子を大気より遮断する半導体装置にお
いて、前記放熱板は請求項7又は8に記載の放熱板より
なることを特徴とする半導体装置。13. A ceramic multilayer wiring board having a semiconductor element mounted on a heat sink, an external wiring connection terminal, and a concave portion for accommodating the element in the center, and the element and the terminal of the substrate. And a metal wire for electrical connection,
9. The semiconductor device according to claim 7, wherein the radiator plate and the concave portion of the substrate are joined so that the element is disposed in the concave portion, and the substrate is joined by a lid to block the element from the atmosphere. 9. A semiconductor device comprising the heat sink according to any one of the preceding claims.
れた半導体素子と、セラミックス絶縁基板に接合された
リードフレームと、前記素子とリードフレームとを電気
的に接続するTABとを備え、前記放熱板と絶縁基板と
を接合し前記素子を大気より遮断するとともに前記素子
と絶縁基板との間に熱伝導性樹脂弾性体を介在させた半
導体装置において、前記放熱板は請求項7又は8に記載
の放熱板よりなることを特徴とする半導体装置。14. A semiconductor device comprising: a semiconductor element joined on a heat sink by a thermally conductive resin; a lead frame joined to a ceramic insulating substrate; and a TAB for electrically connecting the element and the lead frame. In a semiconductor device in which a heat radiating plate and an insulating substrate are joined to shield the element from the atmosphere and a thermally conductive resin elastic body is interposed between the element and the insulating substrate, the heat radiating plate may be formed as described in claim 7 or 8. A semiconductor device comprising the heat sink according to any one of the preceding claims.
た半導体素子と、接地板が接合された第2の放熱板の前
記接地板上に前記第1の放熱板を搭載し、前記素子の端
子に電気的に接続したTABとを備え、前記素子を樹脂
封止した半導体装置において、前記放熱板は請求項7又
は8に記載の放熱板よりなることを特徴とする半導体装
置。15. A semiconductor device joined by metal on a first radiator plate and the first radiator plate mounted on the ground plate of a second radiator plate joined to a ground plate, 9. A semiconductor device comprising: a TAB electrically connected to said terminal; and said element being resin-sealed, wherein said heat radiating plate comprises the heat radiating plate according to claim 7 or 8.
料よりなることを特徴とする静電吸着装置用電極板。16. An electrode plate for an electrostatic attraction device, comprising the composite material according to claim 1. Description:
電極層上に接合された誘電体板と物体との間に静電吸引
力を生じさせて前記誘電体板の表面に前記物体を固定す
る静電吸着装置において、前記誘電体板は請求項16に
記載の電極板よりなることを特徴とする静電吸着装置。17. An object is fixed to a surface of the dielectric plate by applying a voltage to the electrode layer to generate an electrostatic attraction force between the dielectric plate and the object bonded on the electrode layer. 17. An electrostatic chuck according to claim 16, wherein said dielectric plate comprises the electrode plate according to claim 16.
にNiめっき層を有することを特徴とするリードフレー
ム。18. A lead frame according to claim 1, having a Ni plating layer on the surface.
リードフレームと、該リードフレームと半導体素子とを
電気的に接続する金属ワイヤとを備え、前記半導体素子
が樹脂組成物によって封止されている半導体装置におい
て、前記リードフレームは請求項1〜6のいずれか又は
18に記載のリードフレームよりなることを特徴とする
半導体装置。19. A semiconductor device comprising: a semiconductor element; a lead frame on which the semiconductor element is mounted; and a metal wire for electrically connecting the lead frame and the semiconductor element, wherein the semiconductor element is sealed with a resin composition. 19. A semiconductor device, comprising: the lead frame according to claim 1 or 18;
充填剤又はエポキシ樹脂,無機充填剤及びシリコン重合
体を含む組成物からなる請求項19に記載の半導体装
置。20. The semiconductor device according to claim 19, wherein said resin composition comprises an epoxy resin and an inorganic filler or a composition containing an epoxy resin, an inorganic filler and a silicon polymer.
その90重量%以上が0.5 〜100μmの粒径を有す
ることを特徴とする請求項20に記載の半導体装置。21. The inorganic filler comprises spherical quartz powder,
21. The semiconductor device according to claim 20, wherein 90% by weight or more thereof has a particle size of 0.5 to 100 [mu] m.
化した溶融球形石英粉であることを特徴とする請求項2
0又は21に記載の半導体装置。22. The fused spherical quartz powder according to claim 2, wherein the spherical quartz powder is a fused spherical quartz powder obtained by melting quartz powder to form a sphere.
22. The semiconductor device according to 0 or 21.
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Application Number | Priority Date | Filing Date | Title |
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JP12128599A JP2000313905A (en) | 1999-04-28 | 1999-04-28 | Composite materials and various applications |
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Publication Number | Publication Date |
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ID=14807482
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002343935A (en) * | 2001-05-11 | 2002-11-29 | Sansha Electric Mfg Co Ltd | Power semiconductor module |
WO2003049180A1 (en) * | 2001-12-04 | 2003-06-12 | Toto Ltd. | Electrostatic clampless holder module and cooling system |
JP2016086081A (en) * | 2014-10-27 | 2016-05-19 | 住友大阪セメント株式会社 | Electrostatic chuck device and method of manufacturing the same |
-
1999
- 1999-04-28 JP JP12128599A patent/JP2000313905A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002343935A (en) * | 2001-05-11 | 2002-11-29 | Sansha Electric Mfg Co Ltd | Power semiconductor module |
WO2003049180A1 (en) * | 2001-12-04 | 2003-06-12 | Toto Ltd. | Electrostatic clampless holder module and cooling system |
CN1299345C (en) * | 2001-12-04 | 2007-02-07 | 东陶机器株式会社 | Electrostatic clampless holder module and cooling system |
US7615133B2 (en) | 2001-12-04 | 2009-11-10 | Toto Ltd. | Electrostatic chuck module and cooling system |
JP2016086081A (en) * | 2014-10-27 | 2016-05-19 | 住友大阪セメント株式会社 | Electrostatic chuck device and method of manufacturing the same |
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