JP2002208969A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device in which simulation time is shortened and the output level of an output driver can be regulated even after a printed board is manufactured and components are mounted. SOLUTION: An output driver is selected after a chip is manufactured. The output driver is selected by selecting desired buffers and their combination from a plurality of buffers (M1) 11-1,..., (MN) 11-N.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to an ASIC (Application Specific I / O).
The present invention relates to a semiconductor device forming a circuit including an integrated circuit called an "integrated circuit" and an output driver for outputting a signal from the integrated circuit to the outside.

[0002]

2. Description of the Related Art The signal processing speed of an integrated circuit such as a processor or a memory built in a computer or the like has been increasing year by year, and the speed of a board on which these are mounted has also been increasing. I have.

An integrated circuit generally needs to transmit information processed in the integrated circuit to the outside, and in many cases, an output driver necessary for the transmission is provided.

In recent years, signal processing is expected to be faster than 100 MHz even at the TTL level or the like. However, electromagnetic noise, radiation noise, and the like due to an increase in the distance transmitted from an output driver via a transmission line are expected. The effect on the environment cannot be ignored.

[0005] Therefore, in order to drive a load including a variation in accuracy due to these causes by a signal, very high-precision estimation is required, but it is very difficult to estimate these values actually. It costs. If these values are roughly estimated, when driving the load, the signal may be affected by ringing or the like, which may cause a malfunction.

[0006] For this reason, various attempts have been made to overcome these problems. For example, JP-A-6-334
In the semiconductor integrated circuit device described in Japanese Patent Publication No. 131, as shown in FIG. 10, a gate and a drain are connected between an enhancement type output MOSFET (Q2) for forming an output signal on the ground potential side of the circuit and an output terminal. By providing the depletion type MOSFET (Q3), high-speed operation is realized while undershoot is reduced.

In the electronic device described in Japanese Patent Application Laid-Open No. 11-284126, as shown in FIG. 11, a power supply wiring 101, a ground wiring 102, and a signal wiring 103 are used to transmit signals between chips on a substrate 101 at a high speed. And signal wiring 104
Are formed as equal-length wirings having a large coupling coefficient so as to form a transmission line whose electromagnetic field is substantially closed.

On the other hand, the IO (Input-Output) data of the device connected to the transmission line is converted to IBIS using XTK, a transmission line simulation tool from Viewlogic, or ApsimSPICE, a transmission line modeling tool from Apsim. (Inpu
(t-Output Buffer InfomationSpecification) Read the data, simulate the transmission line in a simulated manner, and observe the waveform driven at high speed, so that the delay, overshoot, undershoot, etc. fall within the specification range. Fixed processing such as insertion of a damping resistor and a terminating resistor is performed.

[0009]

However, the signal processed inside the integrated circuit described above is, for example, TT
In a conventional example relating to a circuit for transmitting a signal from an output driver via a transmission line at a high speed of 100 MHz or more at L, the following problem arises.

That is, the ability to drive the transmission line,
Overshoot and undershoot superimposed on the signal on the line change due to the circuit configuration of the output driver, the number of receivers connected via the transmission line, the state of the input circuit, fluctuations in the substrate process, and the like. Even if a simulation using an IBIS model is performed to make this adjustment, variations appear on the actually manufactured substrate, and adjustments to suppress this variation cannot be made, resulting in a desired operation. May not be obtained.

Further, it takes a long time for the simulation itself to determine the parameters on the circuit, such as determining the value of the damping resistance and the like.

It is an object of the present invention to provide a semiconductor device capable of shortening a simulation time and adjusting an output value of an output driver even after a printed circuit board is manufactured and components are mounted. Aim.

[0013]

According to one aspect of the present invention, there is provided an integrated logic circuit for processing an input signal and outputting the processed signal to provide a desired function. And a plurality of output drivers formed at an output section of the integrated logic circuit, comprising: a selection unit for selecting one or more output drivers to be used from the plurality of output drivers; The output current values of the output drivers are made different from each other, and a desired output current value is selected by the selection means.

According to a second aspect of the present invention, in the first aspect, each output current value of the plurality of output drivers is:
The output current value of the output driver that outputs the minimum current among the plurality of output drivers is sequentially doubled.

For example, when the minimum output current value is k (k is a natural number), the output current value of each output driver is k,
2k, 4k, 8k...

According to a third aspect of the present invention, in the first aspect of the present invention, the integrated logic circuit includes a sum of output current values of all output drivers selected by the selection means among the plurality of output drivers. And outputs a signal.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings.

FIG. 1 is a diagram showing a configuration example of an integrated circuit to which the present invention is applied. In the circuit shown in the figure, N (N is a positive integer) buffers (M1) 1 as output drivers
1-1, buffer (M2) 11-2, buffer (M3)
11-3,. . . . . , Buffer (MN) 11-N.

Buffer (Mn) 11-n (n is 1 or more and N
(An integer less than) is equal to the buffer (M1) 11−
1 is set to the minimum output value, and assuming that the output current value of the n-th buffer is In, In = (I
1 × 2 ⁿ⁻¹ ).

Then, the buffer to be driven is selected from among the buffers (M1) 11-1 to (MN) 11-N by the buffer controller 12 which controls the output driver. Here, a plurality of buffers 11 to be selected can be selected.

The output drive current value is determined according to the selected buffers 11-1 to 11-N. The signal input to the output driver from (A) is driven based on this current value, and the chip boundary is determined. 13 and is transmitted to the connection destination via an external transmission line 14.

At this time, the drive is controlled by the buffer control unit 12, and depending on the combination of the selected buffer (M1) 11-1 to buffer (MN) 11-N, ^2N ways (output driver) as shown in FIG. (Including the case where is not selected) can be obtained.

Therefore, when a signal as shown in FIG. 3 is input to the output driver, the signal is output to the transmission line through the selected buffer 11 in accordance with the setting of the buffer control unit 12. As shown in FIG. 4, the output signal has a difference in waveform depending on the driving capability of the buffer used. Therefore, the type of the buffer 11 re-driven by the buffer control unit 12 so that the waveform satisfies the desired specification Or change the number.

[0024]

FIG. 5 shows a specific embodiment of the present invention. The buffer (M1) 21-1, the buffer (M2) 21-2, and the buffer (M3) 21-3 respectively drive signals input from the inside (A) of the integrated circuit. The buffer control unit 22 determines which of the three buffers 21 is selected. The control of the buffer control unit 22 is performed from outside (not shown). In the following description, the buffer (M1) 21-1 and the buffer (M2) 2
1-2, the buffer (M3) 21-3 is appropriately set to M1, M
2, denoted by M3.

The buffer (M1) 21-1, the buffer (M
2) The output current values of 21-2 and buffer (M3) 21-3 are 1 mA, 2 mA, and 4 mA, respectively, and the current value for driving the signal is the output current that each selected buffer 21 holds as the drive capability. Determined by the sum of the values.

Therefore, in the configuration shown in FIG. 5, the output current values are 1 mA, 2 mA, 3 mA, 4 mA, 5 mA, 6 mA.
It takes eight values of mA, 7 mA and 0. FIG. 6 is a diagram showing a relationship between a selection driver (buffer) and an output current value. By the way, when the structure for selecting a plurality of output drivers by the buffer control of the present invention is not used, the output current value of the output driver becomes 1 as shown in FIG.
It will take any value of mA, 2 mA, 4 mA or 0.

FIG. 7A shows the input from the driver to the driver.
FIG. 4 is a diagram illustrating an example of a signal. The signal shown in FIG.
And rises in the low state (V_L) To the threshold voltage V _th
Over the High state (V_H) And stand at 2t
Falling, High state (V_H) To the threshold voltage V_thCome
Tte low state (V_L).

The signal shown in FIG. 7 is output to the transmission line 24 via an output buffer. At this time, the waveform of the output signal changes as shown in FIG. 8 depending on the driving capability of the buffer 21, that is, the output current value. In the figure, when all the buffers 21 of M1, M2, and M3 are selected, the state in which the value in the High state is larger than _VH continues, and the drive capacity is excessive.

On the other hand, if the selected driver is M1, M2,
M3, M1 + M2, in the case of M1 + M3 is due to insufficient driving capability, the signal voltage value at High state _{V H}
, The accurate signal may not be transmitted. Therefore, here, by selecting the buffer (M2) 21-2 and the buffer (M3) 21-3,
The signal shown in FIG. 7 that is input from (A) to the output buffer can be transmitted most accurately. Although only a rough adjustment method is used, an accurate signal can be transmitted to the outside of the chip. When the signal is driven by the output current value shown in FIG. 4, the output transmission waveform becomes 3 shown in FIG.
As a result, different types of liquid forms are obtained, and there is a possibility that accurate signal transmission is not performed.

In this embodiment, the output waveform of the output driver is described as shown in FIG. 8, but this is based on the type of waveform input to the output driver, the internal structure of the chip, and the input of the receiver for receiving the transmission liquid type. It goes without saying that it differs depending on the circuit structure and the like. In this embodiment, 3
Each of the two output drivers is set at a value of 1 mA, 2 mA, and 4 mA, but it is needless to say that this can be set in consideration of a driving signal, a circuit structure, and the like. In this embodiment, the case where the buffer (M2) 21-2 and the buffer (M3) 21-3 are selected as accurate signal transmission waveforms is described. It is needless to say that this is reflected.

[0031]

As described above, according to the present invention, by selecting an output driver after a chip is manufactured, accurate correction of a transmission waveform becomes possible, and accurate signal information can be transmitted. Becomes

Further, the conventional transmission line simulation is simplified, and in some cases, is not performed.
It becomes possible to design a high-speed transmission line.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration example of an integrated circuit to which the present invention is applied.

FIG. 2 is a diagram showing output current values according to combinations of selected buffers (M1) 11-1 to (MN) 11-N.

FIG. 3 is a diagram illustrating an example of an input signal to an output driver.

FIG. 4 is a diagram illustrating an output signal corresponding to the input signal illustrated in FIG. 3;

FIG. 5 shows a specific embodiment of the present invention.

FIG. 6 is a diagram showing a relationship between a selection driver (buffer) and an output current value.

FIG. 7 is a diagram illustrating an example of a signal input from (A) to a driver.

FIG. 8 is a diagram showing an example of a waveform that changes according to an output current value.

9 is a diagram illustrating an output transmission waveform when a signal is driven with the output current value illustrated in FIG. 4;

FIG. 10 is a diagram (1) showing a configuration of a conventional example.

FIG. 11 is a diagram (2) showing a configuration of a conventional example.

[Explanation of symbols]

 11-1 Buffer (M1) 11-2 Buffer (M2) 11-3 Buffer (M3) 11-N Buffer (MN) 12 Buffer Controller 13 Chip Boundary 14 Transmission Line 21-1 Buffer (M1) 21-2 Buffer ( M2) 21-3 Buffer (M3) 22 Buffer Controller 23 Chip Boundary 24 Transmission Line

Claims (3)

[Claims] An integrated logic circuit that processes an input signal and provides a desired function by outputting the processed signal, and a plurality of output drivers formed at an output unit of the integrated logic circuit. A semiconductor device comprising: a selection unit that selects one or more output drivers to be used from the plurality of output drivers; and wherein output current values of the plurality of output drivers are different from each other;
A semiconductor device, wherein a desired output current value is selected by the selection unit. 2. The output current value of each of the plurality of output drivers is a value obtained by sequentially doubling an output current value of an output driver that outputs a minimum current among the plurality of output drivers. Item 2. The semiconductor device according to item 1. 3. The integrated logic circuit according to claim 1, wherein the integrated logic circuit outputs a signal based on a sum of output current values of all output drivers selected by the selection unit among the plurality of output drivers. Semiconductor device.