JP2002043752A - Wiring board, multilayer wiring board, and their manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inexpensive, thin wiring board, a multilayer wiring board, and their manufacturing method without using a coppered board for a wiring layer in which the copper film, etc., bonded by an adhesive is not used, but with using through holes filled with conductive layers, in the wiring board in which the double-sided faces of an insulation layer have circuit layers and an inner wall of each through hole of an insulation layer has conductive layers. SOLUTION: The wiring board, multilayer wiring board, and their manufacturing method are in the process that tapered through hole 2 is formed in insulation layer 1, and after double-sided faces 1a, 1b and inner wall 2a of through hole 2 on insulation layer 1 are converted rough and palladium catalyst is added there, wiring layers 3, 4, and conductive layer 5 are made simultaneously by forming an electroless plating layer or laminating an electro plating layer on an electroless plating layer to fill in through hole 2 with conductive layer 5, and double-sided faces of conductive layer 5 are converted flat as well.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board, a multi-layer wiring board, and a method for manufacturing the same, which are used for electronic equipment and the like. The present invention relates to a multilayer wiring board formed by laminating the above films in multiple layers, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, as a wiring board used for assembling various electronic devices, a hard base material such as glass epoxy,
After bonding a conductor layer such as a copper foil with an adhesive, the conductor layer is processed into a desired circuit wiring pattern shape, but recently, a wiring board using a resin film has been awarded. I have. Two typical examples of such a flexible wiring board will be described below.

FIG. 10 is a longitudinal sectional view of a first conventional wiring board D. Such a wiring board is disclosed in, for example,
No. 2,240,014. In FIG. 10, reference numeral 51 denotes an insulating layer made of a polyimide resin or the like, and has wiring layers 54 and 55 formed by forming a copper foil or the like adhered by adhesives 52 and 53 in a desired pattern on both surfaces.
Reference numeral 56 designates the insulating layer 51 as the wiring layers 54, 5 on the front and back surfaces thereof.
5 is a through hole penetrating therewith. 57 is the through hole 5
6 is a conductive layer formed from the inner wall surface to the wiring layers 54 and 55 formed on the front and back surfaces of the insulating layer 51 to electrically connect the wiring layers 54 and 55 on the front and back surfaces.
Reference numeral 58 denotes a conductive material or a non-conductive material filled in the through hole 59 of the conductive layer 57. 60 is a wiring layer 54 on the front side
And a resist film that covers the conductive layer 57 except for a part thereof. 61 and 62 are metal layers formed on the wiring layers 54 and 55.

FIG. 11 is a longitudinal sectional view of a second conventional wiring board E. Such a wiring board is disclosed in, for example,
No. 64231. In FIG.
Reference numeral 71 denotes an insulating layer made of a polyimide resin or the like, and has wiring layers 74 and 75 on the front and back surfaces of which are formed copper foil and the like bonded by adhesives 72 and 73 in a desired pattern. 76
Are through holes called via holes or via holes that penetrate the insulating layer 71 together with the wiring layer 74 on one surface thereof and reach the wiring layer 75 on the other surface. 77 is formed from the wiring layer 74 on the front surface side to the inner surface (the upper surface in the drawing) of the wiring layer 75 on the back surface exposed to the through hole 76 through the inner wall surface of the through hole 76.
75 is a conductive layer that electrically connects the first and second electrodes 75 to each other. Reference numeral 78 denotes a conductive material or a non-conductive material that fills the recess 79 of the conductive layer 77. 80 denotes a wiring layer 74 and a conductive layer 77 on the front side.
Is a resist film that is coated while leaving a part of the resist film. 81, 82
Is a metal layer formed on the wiring layers 74 and 75.

[0005]

As described above,
Conventional wiring boards D and E are both bonded to insulating layers 51 and 71 with adhesives 52 and 53 or 72 and 73, and wiring layers 54 and 55 or 74 and 75 formed in a desired pattern.
Since a copper-clad board to which a copper foil or the like has been previously bonded must be used as the insulating layers 51 and 71, not only is the wiring board expensive, but also the wiring layers 54 and 5 are used.
Since the conductive layer 57 or 77 is formed on the conductive layer 5 or 74, there is a problem that a step is generated between the wiring layer and the conductive layer, and it is difficult to reduce the thickness. In addition, although the through holes 56 and 76 tend to be reduced with the fine pitch, it is extremely difficult to fill the small through holes 56 and 76 with the conductive material or the nonconductive material 58 and 78 in the conventional structure. . Further, in these conventional structures, the through holes 56,
Conductive or non-conductive material 58, 7 filled in 76
The surface of No. 8 was a concave portion, on which a semiconductor chip could not be mounted or wire-bonded. Therefore, land portions for mounting the semiconductor chip and wire bonding must be formed at positions avoiding the through holes 56 and 76 (conductive or nonconductive materials 58 and 78). It has been difficult to achieve high density (high integration) or miniaturization.

Accordingly, the present invention provides a method of forming a film on both the front and back surfaces of an insulating layer and the inner wall surface of a through hole without bonding a copper foil or the like with an adhesive.
It is an object of the present invention to provide a wiring board in which a wiring layer and a conductive layer made of the same material are integrated, a conductive layer inside the through hole fills the through hole, and the conductive layer has a flat surface. Another object of the present invention is to provide a multilayer wiring board formed by laminating a plurality of wiring boards having the above configuration. Another object of the present invention is to provide a method for manufacturing the above-mentioned wiring board and multilayer wiring board.

[0007]

According to the present invention, there is provided a wiring board having an insulating layer having one or more through holes, wiring layers on both surfaces, and a conductive layer connected to the wiring layer in the through holes. The wiring board is characterized in that the through hole is tapered, the conductive layer fills the through hole, and has a flat surface on both sides of the through hole. The multilayer wiring board according to the present invention is characterized in that a plurality of the wiring boards are laminated and integrated via an interlayer insulating layer, and the wiring layers or conductive layers of each of the wiring boards are connected to each other via an interlayer conductor. This is a multilayer wiring board characterized by the following. The method of manufacturing a wiring board according to the present invention includes the steps of forming a tapered through hole in the insulating layer, and roughening both surfaces of the insulating layer and inner wall surfaces of the through hole by a wet method or a dry method, A step of applying a plating catalyst to both surfaces of the roughened insulating layer and the inner wall surface of the through hole, and simultaneously forming a wiring layer and a conductive layer on both surfaces of the insulating layer provided with the plating catalyst and the inner wall surface of the through hole. And forming a through hole and filling the inside of the through hole with a conductive layer. The method for manufacturing a multilayer wiring board according to the present invention includes the steps of: connecting the wiring board to each other between wiring layers or metal layers via an interlayer conductor and laminating the wiring board via an interlayer insulating layer; And a process of heating and pressurizing in a vacuum to integrate them.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION
In a wiring board having an insulating layer having one or more through holes, a wiring layer on both surfaces, and a conductive layer connected to the wiring layer in the through hole, the through hole is tapered, and the wiring layer and A wiring substrate, wherein a conductive layer is integrally formed of the same material, the conductive layer is filled in the through hole, and has a flat surface on both sides of the through hole.

According to a second aspect of the present invention, there is provided a wiring board wherein the insulating layer has at least one through hole, a wiring layer on one side, and a conductive layer connected to the wiring layer in the through hole. Wherein the through hole is tapered and the side in contact with the wiring layer is a small-diameter portion, and the conductive layer is filled in the through hole and has flat surfaces on both sides of the through hole. It is a wiring board.

According to a third aspect of the present invention, the tapered through hole has an inclination angle of 5 to 65 ° with respect to a central axis,
The wiring according to claim 1, wherein the diameter Φ on the smaller diameter side is 10 to 40 μm, the thickness t of the wiring layer and the conductive layer is 5 to 30 μm, and Φ ≦ 2t. It is a substrate.

According to a fourth aspect of the present invention, the wiring layer and the conductive layer are made of copper or a copper alloy, are formed on the insulating layer without an adhesive, and the wiring layer and the conductive layer 4. The wiring board according to claim 1, wherein the wiring board is integrally formed.

The invention according to claim 5 of the present invention is characterized in that the wiring layer and the conductive layer are formed by an electroless plating layer or by laminating an electrolytic plating layer on the electroless plating layer. The wiring board according to any one of claims 1 to 4, wherein

According to a sixth aspect of the present invention, the surface of the insulating layer and the inner wall surface of the through hole are formed to have a rough surface of 0.1 to 10 μm. 5
A wiring board according to any one of the above.

The invention according to claim 7 of the present invention is characterized in that a metal layer for electrical connection is provided on a part or all of the wiring layer. It is a wiring board.

The invention according to claim 8 of the present invention is characterized in that the metal layer is any one of a gold layer, a palladium layer, a tin layer and an alloy layer thereof, or a gold layer or a palladium layer on a nickel layer or a nickel alloy layer. 8. The wiring board according to claim 1, wherein the wiring board is formed by laminating layers or alloy layers thereof.

According to a ninth aspect of the present invention, a plurality of wiring boards according to the first to eighth aspects are laminated and integrated via an interlayer insulating layer, and the wiring board or the conductive layer of each of the wiring boards is integrated. A multilayer wiring board characterized by being connected to each other via an interlayer conductor.

The invention according to claim 10 of the present invention is characterized in that the interlayer insulating layer is an adhesive resin or a thermoplastic resin having a glass transition temperature Tg of 150 ° C or higher. It is a wiring board.

According to an eleventh aspect of the present invention, the interlayer conductor is preferably composed of a single metal made of tin, lead, silver, copper, gold, bismuth, zinc, or aluminum, or an alloy containing two or more of these. 11. The multilayer wiring board according to claim 9, wherein the multilayer wiring board is made of an alloy containing another metal as a component or a conductive paste containing the alloy.

According to a twelfth aspect of the present invention, a step of forming a tapered through hole in the insulating layer, and roughening both surfaces of the insulating layer and inner wall surfaces of the through hole by a wet method or a dry method. And applying a plating catalyst to both surfaces of the roughened insulating layer and the inner wall surface of the through hole,
A wiring layer and a conductive layer are simultaneously and integrally formed on both surfaces of the insulating layer provided with the plating catalyst and the inner wall surfaces of the through holes,
And a step of filling the inside of the through hole with a conductive layer.

According to a thirteenth aspect of the present invention, the wiring layer and the conductive layer are formed by laminating by electroless plating or by electroplating following electroless plating. A method of manufacturing a wiring board according to claim 12.

According to a fourteenth aspect of the present invention, the wiring layer and the conductive layer are formed by forming a thin film plating layer on both surfaces of an insulating layer provided with a plating catalyst and inner wall surfaces of through holes by electroless plating. Forming a resist film except for the portion of the thin film plating layer that will be a wiring layer and a conductive layer, and by electroless plating or electrolytic plating on the thin film plating layer not covered with the resist film, or Forming a wiring layer and a conductive layer by an electrolytic plating method following an electroless plating method, a step of removing the resist film, and a step of removing an exposed thin film plating layer by etching. Claim 12
Or a method for manufacturing a wiring board according to item 13.

According to a fifteenth aspect of the present invention, the wiring layer and the conductive layer are formed on both surfaces of the insulating layer to which the plating catalyst is applied and on the inner wall surface of the through-hole except for the portions to be the wiring layer and the conductive layer. A step of forming a film, and a step of forming a wiring layer and a conductive layer by electroless plating following electroless plating or electroless plating on an insulating layer not covered with the resist film, ,
14. The method of manufacturing a wiring board according to claim 12, wherein the wiring board is formed by removing the resist film.

[0023] The invention according to claim 16 of the present invention is characterized in that the wiring layer and the conductive layer include a step of forming a thin-film plating layer on both surfaces of an insulating layer provided with a plating catalyst and inner wall surfaces of through holes by electroless plating. Forming a thick film plating layer on the thin film plating layer by electroless plating, or by electroplating, or by electroplating following the electroless plating, and a wiring layer of the thick film plating layer. Forming a resist film in a portion to be a conductive layer, removing a thick plating layer and a thin plating layer that are not covered with the resist film by etching, and removing the resist film. The method of manufacturing a wiring board according to claim 12, wherein the method is performed.

According to a seventeenth aspect of the present invention, there is provided a method of forming a conductive thin film by a dry process on at least a portion to be the wiring layer and the conductive layer, and an electroless plating method or an electroplating method on the conductive thin film. Forming a wiring layer and a conductive layer by electroless plating or by electroplating subsequent to electroless plating.
20. A method of manufacturing a wiring board according to any one of the above items.

The invention according to claim 18 of the present invention is the method for manufacturing a wiring board according to any one of claims 12 to 16, wherein the through hole is formed by a laser.

The invention according to claim 19 of the present invention is the method of manufacturing a wiring board according to any one of claims 12 to 16, wherein the through hole is formed by etching with a strong alkaline solution. It is.

According to a twentieth aspect of the present invention, there is provided the wiring board according to the first aspect, wherein the wiring layer or the metal layer is connected to each other via an interlayer conductor and the interlayer insulating layer is formed. 12. The method for manufacturing a multilayer wiring board according to claim 9, further comprising a step of interposing and laminating, and a step of heating and pressurizing the laminate in vacuum to integrate it.

According to a twenty-first aspect of the present invention, the interlayer insulating layer is formed by applying, printing, or transferring a liquid adhesive resin or a thermoplastic resin. It is a manufacturing method of the multilayer wiring board described.

The invention according to claim 22 of the present invention is characterized in that the interlayer insulating layer is formed by heat lamination, vacuum lamination or vacuum heat lamination of a film-like adhesive resin or thermoplastic resin. Claim 20
3. The method for manufacturing a multilayer wiring board according to item 1.

[0030]

[First Embodiment of Wiring Board] A wiring board according to a first embodiment of the present invention will be described below with reference to the drawings. Figure 1
1 is a longitudinal sectional view of a main part of a wiring board A according to one embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an insulating layer, which can be the same as the conventional one, but preferably, for example, a wholly aromatic polyester liquid crystal polymer film is used. The wholly aromatic polyester liquid crystal polymer film is, for example, a CT material manufactured by K Company and has a coefficient of thermal expansion of 15 to 20 × 10 ⁻⁶ / ° C. and a water vapor transmission rate of 0.13 g · 20 μ / m ² · day (40
° C, 90% RH), water absorption 0.04% (23 ° C, 24%
H), having various properties of a glass transition temperature of 315 ° C.
In addition, when the above-mentioned wholly aromatic polyester liquid crystal polymer film is used as the insulating layer 1, various excellent features as described later can be obtained. And a high heat-resistant resin film having the following.

Reference numeral 2 denotes a through-hole having a tapered inner surface penetrating the insulating layer 1. The inclination angle θ of the tapered inner surface of the through hole 2 with respect to the central axis is set to 5 to 65 °. As shown in FIG. 1, the front and back surfaces 1a and 1b of the insulating layer 1 and the inner wall surface 2a of the through hole 2 have a surface roughness of 0.1 to 10 μm, preferably about 0.5 to 5 μm. Is formed. The wiring layers 3 and 4 made of, for example, copper or the like are formed on the roughened front and back surfaces 1a and 1b of the insulating layer 1 without using an adhesive. Also,
A conductive layer 5 made of, for example, copper or the like is formed on the inner wall surface 2a of the roughened through hole 2 without using an adhesive. Further, the wiring layers 3, 4 and the conductive layer 5 are integrally formed of the same material, and the conductive layer 5 is filled in the through hole 2,
Moreover, both surfaces are formed as flat surfaces.

Here, the diameter Φ of the small diameter side of the through hole 2
And the thickness t of the wiring layers 3, 4 and the conductive layer 5, Φ ≦ 2
The relationship is set to t. For example, the diameter Φ on the small diameter side of the through hole 2 is set to 10 to 40 μm,
4 and the thickness t of the conductive layer 5 are set to 5 to 30 μm. The wiring layer 3 and / or the conductive layer 5 on the surface side (upper side in FIG. 1) of the insulating layer 1 are covered with a resist film 6 except for a part, and the portions not covered with the resist film 6 Metal layer 7 made of, for example, gold
A metal layer 8 made of, for example, gold is also formed on a part of the wiring layer 4 on the rear surface side (the lower side in FIG. 1). The metal layers 7 and 8 may be formed of palladium or tin instead of gold, or may be formed of a gold alloy, a palladium alloy, or a tin alloy. Alternatively, a gold layer, a palladium layer, a tin layer, or an alloy layer thereof may be stacked over a nickel layer or a nickel alloy layer.

That is, the first feature of the wiring board A of the present invention is that the wiring layers 3, 4 and the conductive layer 5 are formed on both the front and back surfaces of the insulating layer 1 and on the inner wall surfaces of the through holes without interposing an adhesive. Second, the through-hole 2 is tapered and has a diameter Φ on the smaller diameter side and the wiring layers 3 and 4.
By setting the dimensions of the conductive layer 5 and the thickness t in the above-described specific relationship, the conductive layer 5 and the wiring layer 4 are formed.
That is, the through hole 2 is closed by itself.
Third, the conductive layer 5 is filled in the through hole 2 and both the front and back surfaces of the conductive layer 5 are flat. Correspondingly, the metal layers 7 and 8 formed on the conductive layer 5 are also flat surfaces.

[0034]

According to the above configuration, not only is it unnecessary to use a copper-clad insulating layer in which a copper foil or the like is bonded to the front and back surfaces of the insulating layer 1 with an adhesive in advance, but also to fill the through hole 2 with, for example, There is no need to fill with conductive paste or the like, which is advantageous in that it is easy to manufacture and cost can be reduced. In addition, since the front and back surfaces of the conductive layer 5 are flat, the mounting of the semiconductor chip and the wires directly on the both surfaces of the conductive layer 5 or on the metal layers 7 and 8 formed on the conductive layer 5 are performed. It has the features that bonding is possible, high honey can be achieved, and miniaturization is possible.

The wiring board A shown in FIG.
The front and back surfaces 1a, 1b and the inner wall surface 2a of the through hole 2 are roughened, and the wiring layers 3, 4 and the conductive layer 5 are formed on the same surface. As described above, there is no step between the wiring layers 54 and 55 and the conductive layer 57 and between the wiring layers 74 and 75 and the conductive layer 77, and various inconveniences caused by the steps between them are eliminated. Also, the insulating layer 1
The front and back surfaces 1a, 1b and the inner wall surface 2a of the through hole 2 are roughened, and the wiring layers 3, 4 and the conductive layer 5 are formed thereon. The adhesion strength with the conductive layer 5 is extremely large, and therefore, there is a feature that peeling does not occur between the insulating layer 1 and the wiring layers 3 and 4 and between the insulating layer 1 and the conductive layer 5.

[0036]

[First Embodiment of Manufacturing Method] Next, a first embodiment of the method of manufacturing the wiring board A according to the present invention will be described. FIG. 2 is a process block diagram of a manufacturing method of the wiring board A according to the first embodiment of the present invention, and FIGS. 3 (a) to 3 (e) and 4 (a) to 4 (d) show the wiring board A of the present invention. FIG. 4 is a longitudinal sectional view of an insulating layer and the like in each step of the manufacturing process. Hereinafter, a method for manufacturing a wiring board according to the present invention will be described with reference to FIGS. (A) First, an insulating layer 1 made of, for example, a liquid crystal polymer film is prepared [FIGS. 2 (a) and 3 (a)]. (B) Next, a tapered through hole 2 is formed at a predetermined position of the insulating layer 1.
Is formed [(FIG. 2 (b), FIG. 3 (b)). The formation of the through holes 2 is advantageous because a laser processing method can perform processing with high precision, but mechanical processing or chemical processing using a strong alkaline liquid or the like may be used. The diameter Φ on the small diameter side of the tapered through hole 2 is formed to be 10 to 40 μm, and the inclination angle θ to the center axis of the tapered surface is formed to be 5 to 65 °. Here, if the diameter Φ on the small diameter side of the through-hole 2 is less than 10 μm, the flow of the plating solution into the through-hole 2 becomes poor, and the formation speed of the conductive layer 5 becomes too low. It becomes difficult to fill the inside with the conductive layer 5. Therefore, the diameter Φ on the small diameter side of the through hole 2 is limited to 10 to 40 μm. Also, the inclination angle θ with respect to the center axis of the through hole 2
Is less than 5 °, the hole diameter is too small to form the conductive layer 5 in the through hole 2, and the connection between the wiring layer 3 and the conductive layer 5 becomes unstable at the shoulder of the through hole 2. I see, 65 °
If the diameter exceeds, the diameter on the large diameter side becomes too large, and the conductive layer 5
Not only becomes difficult, but also the integration density decreases.
Therefore, the inclination angle θ of the tapered surface of the through hole 2 is 5-6.
Limited to 5 °. Front and back surfaces 1a, 1b of this insulating layer 1
Also, since the inner wall surface 2a of the through hole 2 is smooth, the wiring layers 3, 4 and the conductive layer 5 cannot be formed directly on the front and back surfaces 1a, 1b and the inner surface 2a by an electroless copper plating method or the like. (C) Next, the front and back surfaces 1a and 1b of the insulating layer 1 and the inner wall surface 2a of the through-hole 2 are subjected to a wet blasting treatment or a surface roughening treatment called liquid honing so that the surface roughness is 0.1. The surface is roughened to about 10 to 10 μm, preferably about 0.5 to 5 μm (FIGS. 2C and 3C). The surface roughening treatment is performed, for example, by using polygonal abrasive grains having a particle size of about 5 to 300 μm and a hardness of 1300 to 2500 in Knoop hardness (or a range of 7 to 15 in Mohs hardness), and using an air pressure of 1 ５5 kg / cm ² , ratio of abrasive to liquid is 5５〜
It is carried out under the condition of about 40 vol%. The surface roughening treatment may be performed by a dry process method using air and abrasive grains, or may be performed by a wet etching method using a strong alkaline solution. (D) Next, the roughened front and back surfaces 1a,
After applying a plating catalyst to the entire surface of the inner wall 1a of the through hole 2 and the through hole 2 by, for example, electroless copper plating, a conductor layer 345 having a thickness t of 5 to 30 μm is formed. Instead of the electroless copper plating, an electroless copper plating layer is formed, and then an electrolytic copper plating layer is formed on the electroless copper plating layer to form a conductor layer 345 having a thickness t of about 5 to 30 μm. You may make it. At this time, since the diameter Φ on the smaller diameter side of the through hole 2 and the thickness t of the conductor layer 345 are set to satisfy the relationship of Φ ≦ 2t, the conductor layer 345 on the back surface and the conductor layer 345 in the through hole 2 are set. As a result, the end on the small diameter side of the through hole 2 is first closed, and further plating is continued to fill the inside of the through hole 2 with the conductor layer 345 and the conductor layer 3 filled in the through hole 2.
45 are flat surfaces [(FIG. 2D, FIG. 3
(D)]. (E) Next, resist films 9 and 10 having a desired pattern are formed on the conductor layers 345 on both front and back surfaces [FIG.
FIG. 3 (e)]. (F) Next, the conductor layer 345 not covered with the resist films 9 and 10 is removed by etching to form the wiring layers 3 and 4 and the conductive layer 5 having desired patterns [FIG.
(F), FIG. 4 (a)]. (G) Next, when the resist films 9 and 10 are removed, the wiring layers 3 and 4 and the conductive layer 5 having desired patterns appear [FIG.
(G), FIG. 4 (b)]. (H) Next, on the wiring layers 3 and 4 and the conductive layer 5 on both the front and back surfaces, the resist films 11 and 1 having a desired pattern are left partially.
2 [FIG. 2 (h) and FIG. 4 (c)]. (I) Next, the wiring layers 3 and 4 exposed from the resist films 11 and 12 are formed of a metal such as gold by electroless plating, or by electroplating, or by electroplating after electroless plating. Forming layers 7 and 8 [2 (i),
4 (d)]. Thereafter, the unnecessary resist film 12 on the back surface is removed as necessary. Or resist film 1 on both sides
After once removing 1 and 12, a resist film 6 is newly formed only on a required portion on the front side. Through the above steps, the wiring board A of the present invention shown in FIG. 1 is manufactured.

[0037]

According to the above-mentioned manufacturing method, the front and back surfaces 1a and 1b of the insulating layer 1 and the inner wall surface 2a of the through hole 2 are roughened and a plating catalyst is applied, so that no direct adhesive is required. Since electroplating is possible, it is not necessary to use a copper-clad substrate in which copper foil or the like is adhered to both front and back surfaces with an adhesive, and a normal polyimide or polymer film can be used. Is low. Further, since the wiring layers 3, 4 and the conductive layer 5 can be simultaneously formed on the front and back surfaces 1a, 1b of the insulating layer 1 and the inner wall surface 2a of the through hole 2, it is easier and shorter than the method of sequentially forming them. It has the advantage that it can be formed in a short time and the manufacturing process and manufacturing time can be reduced. Further, according to the above-described manufacturing method, since the wiring layer 3 and the conductive layer 5 on the surface are formed integrally, the conductive layers 57 and 77 are formed on the wiring layers 54, 55 and 74 obtained by etching the conventional copper foil. Is characterized in that the thickness can be reduced as compared with the case of forming a laminate. Furthermore, since it is not necessary to fill the through holes 56 and 76 with a conductive paste or the like, there is a feature that the cost can be reduced. In addition, since the front and back surfaces of the conductive layer 5 filled in the through hole 2 are flat surfaces, a semiconductor chip can be mounted directly on the conductive layer 5 or on the metal layers 7 and 8 formed on the conductive layer 5. Therefore, wire bonding can be performed, the density can be increased, and the size of the wiring board can be reduced.

According to the wiring board A using a wholly aromatic polyester liquid crystal polymer film as the insulating layer 1 as described in the above embodiment, the water absorption of the insulating layer 1 is 0.0
4% (23 ° C., 24H), which is about 1/70 of the water absorption of the conventional polyimide resin film of 2.9% (23 ° C., 24H). And a moisture absorption dimension in a wet blasting process or a liquid honing process for roughening the front and back surfaces of the insulating layer 1 and the inner wall surface of the through hole 2 before the formation of the conductive layer 5 and a subsequent wet process such as an etching process. Change rate is 4 ×
10 ⁻⁶ / ° C. (RH), which is about one-fifth that of the conventional polyimide resin film having a moisture absorption dimensional change rate of 22 × 10 ⁻⁶ / ° C. (RH). There is a feature that a wiring board A that does not cause such a problem can be provided. However, the material of the insulating layer 1 of the present invention is not limited to the wholly aromatic polyester liquid crystal polymer film, and other polymer films such as a polyimide film can also be used.

[0039]

Second Embodiment of the Manufacturing Method In the method of manufacturing the wiring board A of the above embodiment, the front and back surfaces 1a and 1b of the insulating layer 1 and the inner wall surface 2a of the through hole 2 are roughened and a plating catalyst is applied with palladium or the like. After that, a conductor layer 345 is formed on the entire surface,
The method of forming the wiring layers 3 and 4 and the conductive layer 5 in a desired pattern by etching the conductive layer 345 using the resist films 9 and 10 has been described. The second embodiment of the present invention shown in the process block diagram of FIG. May be adopted. In other words, as in the respective steps (a) to (c) of FIG. 2, an insulating layer 1 is prepared, a through hole 2 is formed, and the front and back surfaces 1a and 1b and the inner surface 2a of the through hole 2 are formed.
After roughening and further applying a plating catalyst with palladium or the like [FIGS. 5 (a) to 5 (c)], the shapes of the wiring layers 3, 4 and the conductive layer 5 on the front and back surfaces of the insulating layer 1 match the desired shapes. The resist films 13 and 14 having the openings of the shape are formed [FIG. 5D], and the insulating layers 1 exposed from the openings of the resist films 13 and 14 are formed by electroless plating or After the electroless plating method, the wiring layers 3, 4 and the conductive layer 5 are formed by the electrolytic plating method [FIG.
(E)], the resist films 13 and 14 are removed [FIG.
(F)], a method of forming resist films 15 and 16 of a desired pattern again [FIG. 5 (g)] and forming metal layers 7 and 8 [FIG. 5 (h)] may be adopted.

[0040]

[Third Embodiment of Manufacturing Method] Next, a method of manufacturing the third embodiment of the wiring board A according to the present invention will be described. As shown in the process block diagram of FIG. 6, an insulating layer 1 is prepared, a through hole 2 is formed, and the front and back surfaces 1a and 1b are formed in the same manner as in each of the steps from (a) to (c) of FIG. After roughening the inner surface 2a of the through hole 2 and further adding a plating catalyst with palladium or the like [FIGS. 6 (a) to 6 (c)],
A thin copper plating layer is formed by an electroless copper plating method [FIG.
(D)], resist films 17 and 18 having openings corresponding to the shapes of desired wiring layers 3 and 4 and conductive layer 5 are formed in the thin-film copper plating layers on the front and back surfaces of insulating layer 1 [FIG.
(E)] An electroless plating method, an electrolytic plating method, or an electrolytic plating method after the electroless plating method, on the thin copper plating layer exposed from the openings of the resist films 17 and 18. Wiring layers 3 and 4 and conductive layer 5
Is formed [FIG. 6 (f)], the resist films 17 and 18 are removed [FIG. 6 (g)], and the thin copper plating layer hidden by the resist films 17 and 18 is removed by an etching method [FIG.
(H)], a method of forming resist films 19 and 20 of a desired pattern again [FIG. 6 (i)] and forming metal layers 7 and 8 [FIG. 6 (j)] may be employed.

[0041]

[Embodiment of Multilayer Wiring Board] Although the wiring board A of the above embodiment is used in a single layer, a plurality of wiring boards A are laminated and integrated via an interlayer insulating layer to form a multilayer wiring board as shown in FIG. It can also be used as the substrate B. In the multilayer wiring board B shown in FIG. 7, A1, A2, and A3 are single-layer wiring boards A as shown in FIG.
2 and A3 are laminated and integrated with interlayer insulating layers 21 and 22 interposed therebetween. Here, the “single-layer wiring board as shown in FIG. 1” does not mean that the wiring board has a strictly identical configuration. It is needless to say that an appropriate configuration can be used. The interlayer insulating layers 21 and 22
, An adhesive resin or a thermoplastic resin is used. For example, a liquid adhesive resin or a thermoplastic resin can be formed by a method such as spin coating, curtain coating, screen printing, transfer, or the like, and laminated and integrated. Alternatively, a film-shaped adhesive resin or a thermoplastic resin can be used. With intervening, lamination and integration may be performed by a method such as heat lamination, vacuum lamination, or vacuum heat lamination, or lamination and integration may be performed at once by a hot press or a vacuum hot press. The interlayer insulating layers 21 and 22 have a vitrification temperature Tg of 150 ° C. or more, more preferably 200 ° C. or more, for mounting a semiconductor chip or the like on the multilayer wiring board B. In FIG. 7, reference numerals 23 and 24 denote interlayer conductors.
In order to secure the electrical connection between A2 and A3, a soft metal, for example, a simple metal such as tin, lead, silver, copper, gold, or aluminum, or a soft alloy composed of two or more thereof, or a main component thereof And a soft alloy containing other metal components. Further, the above-mentioned interlayer conductor 2
The conductive pastes 3 and 24 may be formed using a conductive paste containing the above soft metal or soft alloy as a conductive material. Further, as shown in FIG. 7, the interlayer conductors 23 and 24 not only connect the wiring layers 3 and 4 to each other, but also
The wiring layer 4 and the conductive layer 5 may be connected to each other.

[0042]

Next, an embodiment of a wiring board will be described.
explain. FIG. 8 shows a CSP (Chip S) according to the present invention.
size Package or Ch-ip Scale P
FIG. 8A shows an example of a twin diode C of the “acquire” type.
8 is a plan view of the twin diode chip before mounting, and FIG.
FIG. 8B is a sectional view and a view taken along line AA in FIG.
FIG. 8C is a bottom view. 8 (a) to 8 (c).
31 is a wholly aromatic polyester liquid crystal polymer fill
Insulation layer consisting of 1mm x 0.8mm x 6
It has a rectangular shape of 0 to 100 μm. This insulating layer 31
Each of the four corners is tapered by laser processing, etc.
Through hole 32₁, 32₂, 32₃, 32₄(Hereafter, each
Through holes 32). Each through hole 3
2 is 5 to 65 ° with respect to the central axis,
The diameter of the diameter portion is 10 to 40 μm. And the illustration is
Although not shown, both the front and back surfaces of the insulating layer 31 and each through hole 3
2. The inner wall surface is roughened and a plating catalyst is applied.
I have. Near each through hole 32 on both front and back surfaces of the insulating layer 31
In the side part, a wiring made of a copper plating layer with a thickness of 40 μm
Layer 33₁, 33₃, 33₄And 34₁, 34₂, 34
₃, 34₄(Hereinafter, they are collectively referred to as each of the wiring layers 33 and 34.
Is formed on the inner wall surface of each through-hole 32.
Is a conductive layer 35 made of a copper plating layer of 60 to 100₁, 3
5₂, 35₃, 35₄(Hereinafter, they are collectively referred to as each conductive layer 35.
Is formed. Here, the through hole 32₁, 32₂
Conductive layer 35 in₁, 35₂And wiring layer 34 on the back side₁,
34₂Is_,Common wiring layer 33₁Become the same potential
I have. Of each of the wiring layers 33 and 34 and each of the conductive layers 35
Above the 3μm thick nickel plating layer
First metal layer 37_1a, 37_3a, 37_4aand
38_1a, 38_2a, 38_3a, 38_4a(Hereafter, each gold
Genus 37_aAnd 38_aCollectively)
You. Furthermore, each first metal layer 37_aAnd 38 _aon top of
Is a second metal consisting of a gold plating layer having a thickness of 0.5 μm
Layer 37_1b, 37_3b, 37_4bAnd 38_1b, 38
_2b, 38_3b, 38_4b(Hereinafter, each metal layer 37_bAnd
And 38_b) Are formed. Where
Electric layer 35 and first metal layer 37_aAnd 38_aLine
The second metal layer 37_bAnd 38 _bSurface is flat
ing. The wiring layer 37 of such a wiring board C_1bupon
As shown by the two-dot chain line in FIG.
The diode 39 is mounted.
Electrode and metal layer 37_3b, 37_4bBetween
Respectively connected by wires 40a and 40b of aluminum or the like.
ing.

FIG. 9 is an equivalent circuit diagram of the CSP type twin diode C shown in FIG. That is, FIG.
9A shows a type in which the anodes of two diodes D1 and D2 are commonly connected, and FIG. 9B shows a type in which the cathodes of two diodes D1 and D2 are commonly connected. Which of these is adopted is selected according to the application.

The CSP type twin diode C having the above configuration
In FIG. 10 and FIG. 11, even if the twin diode chip 39 is mounted on the metal layer _371b formed on the conductive layer 35 filled in the through hole 32 or the wire 40 is bonded. The metal layer 6 on the wiring layers 54 and 74 formed on the surfaces of the insulating layers 51 and 71 as shown in FIG.
There was no inconvenience as compared with a wiring board having a conventional structure in which a semiconductor chip was mounted on 1 or 81 and wires were bonded.

[0045]

As described above, the present invention relates to a wiring board having one or more through holes having an insulating layer, wiring layers on both surfaces, and a conductive layer connected to the wiring layer in the through holes. ,
The through hole has a tapered shape, the wiring layer and the conductive layer are integrally formed of the same material, and the conductive layer is filled in the through hole and has a flat surface on both sides of the through hole. Since it is a featured wiring board, there is no need to use a conventional copper-clad board in which copper foil or the like is adhered to both front and back surfaces with an adhesive, and not only can an inexpensive wiring board be provided, but also on the wiring layer A thinner wiring board can be provided as compared with the case where conductive layers are stacked. In the multilayer wiring board of the present invention, a plurality of the wiring boards are stacked and integrated via an interlayer insulating layer, and the wiring layers or conductive layers of the wiring boards are connected to each other via an interlayer conductor. Therefore, an inexpensive and thin multilayer wiring board can be provided. The present invention further comprises a step of forming a tapered through hole in the insulating layer, and a step of roughening both surfaces of the insulating layer and inner wall surfaces of the through hole by a wet method or a dry method,
A step of applying a plating catalyst to both surfaces of the roughened insulating layer and the inner wall surface of the through hole, and simultaneously forming a wiring layer and a conductive layer on both surfaces of the insulating layer provided with the plating catalyst and the inner wall surface of the through hole. And a step of filling the inside of the through hole with a conductive layer.This method is a method for manufacturing a wiring board, and thus uses a copper-clad board to which a conventional copper foil or the like is adhered with an adhesive. As compared with the manufacturing method, it is possible to provide a manufacturing method capable of manufacturing an inexpensive and thin wiring board with good adhesion between the wiring layer and the conductive layer at low cost. The present invention still further provides a step of connecting the wiring boards or the metal layers between the wiring layers or the metal layers via an interlayer conductor and laminating them with an interlayer insulating layer interposed therebetween. A method of manufacturing a multilayer wiring board, which includes a step of integrating by heating and pressurizing, compared with a conventional manufacturing method using a copper-clad board to which a copper foil or the like is adhered with an adhesive. It is possible to provide a manufacturing method capable of manufacturing an inexpensive and thin multilayer wiring board having good adhesion between layers and conductive layers.

[Brief description of the drawings]

FIG. 1 is an enlarged longitudinal sectional view of a main part of a wiring board A according to one embodiment of the present invention.

FIG. 2 is a process block diagram in a case where a wiring board A of one embodiment of the present invention is manufactured by a first manufacturing method.

FIG. 3 is a vertical cross-sectional view of an insulating layer and the like in each of the first half steps in the case where the wiring board A of one embodiment of the present invention is manufactured by the first manufacturing method.

FIG. 4 is a vertical cross-sectional view of an insulating layer and the like in each of the latter steps in the case where the wiring board A of one embodiment of the present invention is manufactured by the first manufacturing method.

FIG. 5 is a process block diagram in the case of manufacturing a wiring board A of one embodiment of the present invention by a second manufacturing method.

FIG. 6 is a process block diagram in a case where a wiring board A of one embodiment of the present invention is manufactured by a third manufacturing method.

FIG. 7 is an enlarged longitudinal sectional view of a main part of a multilayer wiring board B according to one embodiment of the present invention;

FIG. 8 is a plan view before mounting a twin diode chip in a CSP type twin diode C according to an embodiment of the present invention, a sectional view taken along line AA, and a bottom view.

FIG. 9 is an equivalent circuit diagram of the CSP type twin diode C according to the embodiment of the present invention.

FIG. 10 is an enlarged longitudinal sectional view of a main part of a conventional wiring board D;

FIG. 11 is an enlarged longitudinal sectional view of a main part of a conventional wiring board E;

[Explanation of symbols]

A, A1, A2, A3 Wiring board B Multi-layer wiring board C CSP type twin diode D1, D2 Diode 1, 31 Insulating layer 1a Surface of insulating layer 1b Back surface of insulating layer 2, 32 Through hole 2a Inner wall surface of through hole 3, 4, 33, 34 wiring layer 5, 35 conductive layer 6, 9, 10, 11, 12, 13, 14, 15, 16,
17, 18, 19, 20 Resist film 7, 8, 37, 38 Metal layer 21, 22 Interlayer insulating layer 23, 24 Interlayer conductor 37, 38 Metal layer 39 Twin diode chip 40 Wire

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05K 3/40 H05K 3/40 K F term (Reference) 5E317 AA21 AA24 BB12 BB13 BB14 BB15 BB18 CC25 CC31 CD27 CD32 5E346 CC10 CC31 CC32 CC37 CC38 DD02 DD03 DD25 EE02 EE06 EE09 EE19 FF05 FF06 FF07 FF08 FF09 FF15 GG15 GG22 HH11 HH24 HH32

Claims (22)

[Claims] 1. A wiring board in which an insulating layer has one or more through holes, wiring layers on both sides, and a conductive layer connected to the wiring layer in the through holes, wherein the through holes are tapered. ,
The wiring layer and the conductive layer are integrally formed of the same material,
A wiring substrate, wherein the conductive layer is filled in the through hole and has a flat surface on both sides of the through hole. 2. A wiring board having an insulating layer having at least one through hole, a wiring layer on one side, and a conductive layer connected to the wiring layer in the through hole, wherein the through hole has a tapered shape. A wiring substrate, wherein a side in contact with the wiring layer is a small diameter portion, the conductive layer is filled in the through hole, and a flat surface is formed on both sides of the through hole. 3. The tapered through hole has an inclination angle of 5 to 65 ° with respect to a central axis, and a small diameter Φ of 10 to 40 μm.
3. The wiring board according to claim 1, wherein m, thickness t of the wiring layer and the conductive layer is 5 to 30 μm, and Φ ≦ 2t. 4. The wiring layer and the conductive layer are made of copper or a copper alloy, are formed on the insulating layer without interposing an adhesive, and the wiring layer and the conductive layer are integrally formed. The wiring board according to any one of claims 1 to 3, wherein: 5. The method according to claim 1, wherein the wiring layer and the conductive layer are formed by an electroless plating layer or by laminating an electrolytic plating layer on the electroless plating layer. The wiring board according to any one of the above. 6. The surface of the insulating layer and the inner wall surface of the through hole,
The wiring board according to claim 1, wherein the wiring board is formed on a rough surface of 0.1 to 10 μm. 7. The wiring board according to claim 1, wherein a metal layer for electrical connection is provided on a part or all of the wiring layer. 8. The metal layer may be any one of a gold layer, a palladium layer, a tin layer and an alloy layer thereof, or a gold layer, a palladium layer or an alloy layer thereof on a nickel layer or a nickel alloy layer. The wiring substrate according to claim 1, wherein the wiring substrate is formed. 9. The wiring board according to claim 1, wherein a plurality of layers are laminated and integrated via an interlayer insulating layer, and between the wiring layers or conductive layers of each of the wiring boards is connected via an interlayer conductor. A multilayer wiring board characterized in that the wiring board is connected by connecting. 10. The method according to claim 1, wherein the interlayer insulating layer has a glass transition temperature Tg.
10. The multilayer wiring board according to claim 9, wherein the substrate is an adhesive resin or a thermoplastic resin having a temperature of 150 ° C. or higher. 11. The method according to claim 11, wherein the interlayer conductor is tin, lead, silver, copper,
11. A single metal made of gold, bismuth, zinc or aluminum, an alloy containing two or more of these, an alloy containing these as a main component and also containing other metals, or a conductive paste containing them. 2. The multilayer wiring board according to item 1. 12. A step of forming a tapered through-hole in said insulating layer, a step of roughening both surfaces of said insulating layer and an inner wall surface of said through-hole by a wet method or a dry method, Applying a plating catalyst to both surfaces of the insulating layer and the inner wall surface of the through hole, and simultaneously forming a wiring layer and a conductive layer integrally on both surfaces of the insulating layer provided with the plating catalyst and the inner wall surface of the through hole, And filling the inside of the through hole with a conductive layer. 13. The method according to claim 12, wherein the wiring layer and the conductive layer are laminated by electroless plating or by electroplating following electroless plating.
3. The method for manufacturing a wiring board according to claim 1. 14. The wiring layer and the conductive layer, wherein a step of forming a thin-film plating layer on both surfaces of the insulating layer to which a plating catalyst is applied and the inner wall surface of the through-hole by an electroless plating method; Forming a resist film except for a portion to be a conductive layer, and electroless plating or electrolytic plating on the thin film plating layer not covered with the resist film, or electroless plating followed by electroless plating 14. The method according to claim 12, wherein the step of forming a wiring layer and a conductive layer by a method, the step of removing the resist film, and the step of removing an exposed thin-film plating layer by etching are performed. Manufacturing method of wiring board. 15. A step of forming a resist film on both surfaces of the insulating layer provided with a plating catalyst and on the inner wall surface of the through hole except for portions to be the wiring layer and the conductive layer; Forming a wiring layer and a conductive layer by electroless plating or electroplating on an insulating layer not covered with a film by electroless plating or electrolytic plating, or removing the resist film by The method according to claim 12, wherein the wiring board is formed. 16. A method for forming a thin film plating layer on both surfaces of an insulating layer provided with a plating catalyst and inner wall surfaces of through holes by an electroless plating method, comprising the steps of: A step of forming a thick plating layer by electrolytic plating, or by electrolytic plating, or by electroplating following electroless plating, and a resist film on a portion of the thick plating layer to be a wiring layer and a conductive layer. Forming a thin film plating layer and a thin film plating layer which are not covered with the resist film by etching, and a step of removing the resist film. 14. The method for manufacturing a wiring board according to 12 or 13. 17. A step of forming a conductive thin film by a dry process at least on a portion to be the wiring layer and the conductive layer;
Forming a wiring layer and a conductive layer on the conductive thin film by an electroless plating method, by an electrolytic plating method, or by an electrolytic plating method subsequent to the electroless plating method. A method for manufacturing the wiring board according to any one of the above. 18. The method according to claim 12, wherein the through hole is formed by a laser. 19. The method according to claim 12, wherein said through hole is formed by etching with a strong alkaline solution. 20. A step of connecting the wiring board according to claim 1 to a wiring layer or a metal layer via an interlayer conductor and laminating the wiring board or the metal layer via an interlayer insulating layer; 12. The method for manufacturing a multilayer wiring board according to claim 9, further comprising the step of heating and pressurizing the laminate in a vacuum to integrate the laminate. 21. The method according to claim 20, wherein the interlayer insulating layer is formed by applying, printing or transferring a liquid adhesive resin or a thermoplastic resin. 22. The multilayer wiring according to claim 20, wherein said interlayer insulating layer is formed by any one of thermal lamination, vacuum lamination and vacuum thermal lamination of a film-like adhesive resin or thermoplastic resin. Substrate manufacturing method.