JPH1070365A - Method for manufacturing multilayer circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer circuit board which enhances operationality of a conductive layer and enables fine wiring by a method wherein a core basic material is used that the conductive layers are stacked on a metal support plate and insulation layers are stacked on these conductive layers. SOLUTION: In this method, in an insulation layer 4 of a core basic material 1 that conductive layers 3 are stacked on a metal support body 2 and the insulation layers 4 are stacked on these conductive layers 3, a via 4a for connecting electrically with the conductive layer 3 is formed. Further, as the via 4a is electrically connected to a wiring pattern 7a formed in a printed circuit board 7 corresponding to a disposition of this via 4a, a via formation face 1a of the core basic material 1 and a wiring pattern formation face of the printed circuit board 7 are stacked counter to each other. After the metal support body 2 is removed from the core basic material 1 to expose the conductive layer 3, a conductive wiring pattern 3a for electrically connecting this conductive layer 3 to the via 4a is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an MCM for mounting a plurality of electronic components such as a semiconductor element mounting substrate and a semiconductor element.
(Multi-chip module) Applicable to the manufacture of substrates, etc.
The present invention relates to a method for manufacturing a multilayer circuit board capable of forming a fine wiring pattern.

[0002]

2. Description of the Related Art Conventionally, a build-up method shown in FIG. 5 is known as a method for forming a wiring pattern of a multilayer circuit board suitable for high-density mounting in a multilayer through an insulating layer. In this build-up method, a laminate such as a glass epoxy substrate is used as a core substrate 51, a conductor layer is formed on the core substrate 51 by a sputtering method, a plating method, or a combination of these methods, and the conductor layer is etched. The wiring pattern 52 is formed (see FIG. 5A). A photosensitive resist 53 is applied on the core substrate 51 so as to cover the wiring pattern 52, and a via hole 54 is formed in the photosensitive resist 53 on the wiring pattern by a photolithography process (see FIG. 5B). Next, a conductor layer is formed on the photosensitive resist 53 including the via hole 54 by a plating method or a sputtering method, and the conductor layer is etched to form a wiring pattern 55, and the wiring pattern formed on the core substrate 51 is formed. 52 and the via hole 54 are electrically connected (see FIG. 5C). Further, a photosensitive resist 56 is applied on the resist 53 including the wiring pattern 55 formed on the photosensitive resist 53, and a wiring pattern 57 is formed by the same process as described above.
5 is repeated (see FIG. 5D).

[0003]

However, with the recent high integration of LSIs and the high-density mounting of circuit boards on which semiconductor elements such as LSIs are mounted, the use of substrates for mounting semiconductor elements and mounting boards for semiconductor devices has been increasing. There is a demand for finer wiring patterns. In the method of manufacturing a multilayer circuit board by the build-up method, in order to form a fine wiring pattern while miniaturizing a semiconductor element mounting board or an MCM (multi-chip module) board, for example, the photosensitive resists 53 and 56 are used. It is desired to use a high heat-resistant insulating material, for example, polyimide, BCB (benzocyclobutene), or the like. However, in this case, the heat-resistant temperature (glass transition point 110 ° to 130 ° C.) of the core substrate 51 is a curing temperature (about 150 °).
Since the resin portion is lower, the resin portion of the core substrate 51 bends and warps when heated, and it is difficult to directly form a fine wiring pattern on the core substrate 51. Therefore, if a multilayer substrate is manufactured by a build-up method using a core substrate having a high heat-resistant temperature, that is, a core substrate having a glass transition point higher than the curing temperature, the manufacturing cost increases.

When a multilayer circuit board is formed by using a double-sided copper-clad laminate instead of a build-up method by a plating method or a sputtering method, a copper layer, which is a conductor layer, is required to form a fine wiring pattern. Foil thickness 10μm
Hereinafter, it is necessary to make the thickness preferably about 5 μm.
However, when the thickness of the conductor layer is reduced, it becomes difficult to handle the base material including the conductor layer to be formed in multiple layers in the manufacturing process of the multilayer circuit board.

[0005] An object of the present invention is to solve the above-mentioned problems of the prior art, and to use a core substrate having a conductor layer laminated on a metal support and an insulating layer laminated on the conductor layer. It is an object of the present invention to provide a method for manufacturing a multilayer circuit board, which has improved handleability and enables fine wiring.

[0006]

The present invention has the following means to achieve the above object. That is, the first means is:
Forming a via electrically connected to the conductor layer on the insulating layer of the core base material having a conductor layer laminated on a metal support and an insulating layer laminated on the conductor layer; and Laminating the via-formed surface of the core substrate and the wiring pattern-formed surface of the circuit board so as to electrically connect the wiring pattern formed on the circuit board corresponding to the arrangement of the vias; and Removing the metal support from the core substrate to expose the conductor layer, and then forming the conductor layer into a conductor wiring pattern that is electrically connected to the via.

[0007] The first means may further comprise: laminating a core substrate so that vias formed in the core substrate provided separately from the conductor wiring pattern are electrically connected to each other; After removing the support and exposing the conductor layer, the step of forming the conductor layer into a conductor wiring pattern that is electrically connected to the via may be repeated.

[0008] The second means is to electrically connect the conductor layer to the insulation layer of the core substrate, which is formed by laminating a conductor layer on a metal support and laminating an insulation layer on the conductor layer. Providing a first and second core base material having vias formed therein, laminating a via-formed surface of the first core base material and a support, and providing a metal support from the first core base. Forming a single-layer circuit board in which the conductor layer is formed in a conductor wiring pattern for electrically connecting the conductor layer to the via after removing the conductor layer to expose the conductor layer; Laminating the via-formed surface of the second core base material and the conductor wiring pattern-formed surface of the single-layer circuit board so as to be electrically connected to the via formed in the material; After removing the metal support from the core base material to expose the conductor layer, the conductor layer is connected to the conductor wiring pattern. Characterized in that it comprises a step of forming the over emissions, and removing the support.

The second means may include, after the step of removing the support, a via formed on the circuit board corresponding to the via exposed on the support-removed surface of the multilayer circuit board and an arrangement of the via. The method may include a step of laminating the support-removed surface of the multilayer circuit board and the wiring pattern forming surface of the circuit board so as to be electrically connected to the wiring pattern.
Further, the second means may include, after the step of removing the support, a step of forming an external connection terminal in a via exposed on the support-removed surface of the multilayer circuit board.

In the first and second means, a via formed in the insulating layer is formed by applying electrolytic plating to a via hole formed in the insulating layer or by filling a conductive paste. You may. In this case, it is preferable that the via formed in the insulating layer protrudes outward from the opening of the via hole formed in the insulating layer. Further, an aluminum plate or a tin plate may be used for the metal support. Further, the conductor layer is formed by sputtering or plating copper or a copper alloy on the metal support,
Alternatively, it may be formed by attaching a copper foil.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing a configuration of a core substrate, FIG. 2 is an explanatory diagram showing a manufacturing process of a multilayer circuit board according to the first embodiment, FIG. 3 is an explanatory diagram of a printed circuit board bonded to a core substrate, FIG. FIG. 4 is an explanatory view showing a manufacturing process of the multilayer circuit board according to the second embodiment.

(First Embodiment) First, the structure of a core base material used as a part of a multilayer circuit board will be described with reference to FIG. Reference numeral 1 denotes a core substrate, and a metal support 2
In this case, a conductor layer 3 is laminated on one surface, and an insulating layer 4 is sequentially laminated on the conductor layer 3.

The metal support 2 is formed of the thin conductor layer 3
It becomes a support for improving the handling of the above. As the metal support 2, one having good releasability from the conductor layer 3 and sufficiently thicker than the thickness of the conductor layer 3, for example, an aluminum plate of about 500 μm to 1.0 mm is suitably used. In addition, as the metal support 2, it is preferable to use a metal plate that can be removed by an etchant that does not attack the conductor layer 3, and it is also possible to use a tin plate or the like in addition to the aluminum plate. is there. If the metal support 2 can be removed by peeling, it may be peeled. The conductor layer 3 has a thickness of 10 μm or less, preferably 5 μm in consideration of miniaturization.
Formed to the extent. The conductor layer 3 may be formed by forming a copper layer or a copper alloy layer on the metal support 2 by a sputtering method or a plating method, or by attaching a copper foil.

The insulating layer 4 is made of a material having a high glass transition point, for example, polyimide (glass transition point of 250 ° C. to 300 ° C.) in consideration of adhesiveness and durability against an unsaturated vapor pressure bias test (moisture resistance test). C), an epoxy-based resin (glass transition point of about 190 ° C.), an organic insulating material using a thermoplastic material or the like, and having a thickness of 50 μm to 100 μm is applied on the conductor layer 3. Note that a protective film 5 having an insulating property is adhered to the other surface of the metal support 2 to prevent the surface of the metal support 2 from being stained or adhered with foreign matter. The protective film 5 is not always required. In addition, as shown in FIG. 1B, when a film-like insulating layer having low adhesiveness is used as the insulating layer 4, an adhesive layer 6 made of epoxy, polyimide or the like is provided below the insulating layer 4. May be provided with a thickness of about several μm.

An example of a method for manufacturing a multilayer circuit board using the core substrate 1 as a part will be described with reference to FIG.
First, the core substrate 1 shown in FIG.
As shown in (b), a via hole is formed in the insulating layer 4 by an excimer laser or the like (a photolithography step when the insulating layer 4 is a photosensitive resist), and an additive method by electrolytic plating or a conductive paste is formed in the via hole. Is embedded by screen printing or the like to form a via 4 a to be electrically connected to the conductor layer 3. Also, the tip of the via 4a is shown in FIG.
As shown in (b), it may be formed so as to protrude outward from the insulating layer 4. By using the metal support 2 for the core substrate 1 in forming the via 4a, the metal support 2 can be used as a common plating electrode when performing electrolytic plating.

Next, as shown in FIG. 2C and FIG.
Printed circuit board 7 made of BT resin and via 4a electrically connected to conductor layer 3 formed on core substrate 1
The via-formed surface 1a of the core substrate 1 and the printed circuit board 7 are electrically connected to the land portion 7c formed at a portion corresponding to the via 4a in the wiring pattern 7a formed on one surface of the printed circuit board 7. The wiring pattern forming surface 7d is stacked facing the wiring pattern forming surface 7d and bonded by heating and pressing. At this time, the core substrate 1 is connected to the printed circuit board 7 via a prepreg (having the function of an adhesive layer) by the insulating layer 4 or an anisotropic conductive adhesive.
To join. Alternatively, when the insulating layer 4 is made of an adhesive material such as epoxy resin or polyimide, the bonding is performed by heating and pressing. Further, when the tip of the via 4 a formed on the via forming surface 1 a of the core base 1 protrudes outward from the insulating layer 4, the via 4 a can be reliably joined to the land 7 c of the printed circuit board 7. As the printed circuit board 7, a known printed circuit board (for example, a glass epoxy board) on which the wiring patterns 7a, the through holes 7b, the lands 7c, and the like shown in FIG. 3 are formed is used.

Next, as shown in FIG. 2D, the metal support 2 and the protective film 5 on the core substrate 1 are peeled off by etching to expose the conductor layer 3. When copper or copper foil is used for the conductor layer 3 and an aluminum plate is used for the metal support, hydrochloric acid, sulfuric acid, or an alkaline aqueous solution that does not corrode these is preferably used as the etching solution.

Finally, as shown in FIG. 2E, the conductor layer 3 is patterned by etching to form a conductor wiring pattern 3a electrically connected to the via 4a, thereby obtaining a multilayer circuit board 8. Specifically, a photosensitive film is formed on a copper foil, exposed, and etched to form a conductive wiring pattern 3.
a is formed. The multilayer circuit board 8 has a flat via forming surface 1 a of the core substrate 1 having the conductor layer 3 supported by the metal support 2 and a corresponding land portion 7 c of the wiring pattern 7 a of the printed circuit board 7. The wiring pattern forming surface 7d (see FIG. 3) is laminated and joined to face each other. The wiring pattern forming surface 7d is provided with a wiring pattern 7a.
Is formed so as to be more convex than the substrate surface, it is preferable to use a wiring pattern forming surface 7d which has been subjected to a flattening process of coating with a solder resist and has been substantially flattened. Finally, the uppermost conductor layer 3 is patterned by etching to form a conductor wiring pattern 3a.
Therefore, as in the conventional build-up method, a resist is applied to a wiring pattern on a core substrate to form a via hole, and electroless copper plating and electrolytic copper plating are continuously performed on the resist including the via hole. As compared with the case where a conductor layer is formed and a process of forming a wiring pattern by etching the conductor layer is repeated, a multilayer circuit board 8 with less flatness and less waving and distortion of the wiring pattern on the laminated surface is obtained. be able to.

Further, the conductor wiring pattern 3a formed on the uppermost layer of the multilayer circuit board 8 and the via 4a formed on the separately prepared core substrate 1 are laminated so as to be electrically connected and joined. And exposing the metal support 2 from the core substrate 1 to expose the conductor layer 3, and then forming a conductor wiring pattern 3a on the conductor layer 3 (FIG. 2).
By repeating (a) to (e) a plurality of times, it is possible to form a multilayer circuit board 8 in which fine wiring is further formed in multiple layers.

The multilayer circuit board 8 has been described with respect to the step of laminating the core substrate 1 on one side of the printed circuit board 7 and forming the conductor wiring pattern 3a on the conductor layer 3. The conductor wiring pattern 3a may be formed by laminating the core substrates 1 on both sides. Also,
A solder resist is applied to the exposed surface side (the lower surface side in FIG. 2E) of the printed circuit board 7 of the multilayer circuit board 8 except for a land portion 7c connected to the wiring pattern 7a through the through hole 7b. An external connection terminal such as a solder ball is formed on the land portion 7c exposed to the outside to form a BGA (B
It is also possible to manufacture a circuit board (not shown) for an all grid array.

According to the above-described structure, by using the core substrate 1 in which the conductor layer 3 is previously laminated integrally with the metal support 2, the core substrates 1 are joined together or the core substrate 1 is printed. Since the thin conductor layer 3 is easy to handle and can form a fine wiring pattern in the manufacturing process of the multilayer circuit board such as when it is bonded to the circuit board 7, it is suitable for high-density mounting of the multilayer circuit board 8. Further, when a polyimide or epoxy resin having high heat resistance is used as the insulating layer 4 forming the core substrate 1 together with the conductor layer 3, the printed circuit board 7 has excellent adhesion and moisture resistance tests. Even if a low-cost material is used, a high-quality multilayer circuit board 8 can be provided at a low price.

(Second Embodiment) Next, another embodiment of a method for manufacturing a multilayer circuit board using the core substrate 1 will be described with reference to FIG.
This will be described with reference to FIG. The same members as those in the first embodiment are denoted by the same reference numerals, and the description will be referred to. First,
In FIG. 4A, via holes are formed in the first core base material 1 by excimer laser or the like (a photolithography step when the insulating layer 4 is a photosensitive resist) in the lowermost insulating layer 4, The via hole is formed by embedding an additive method by electroplating or a conductive paste into the via hole by screen printing or the like, thereby establishing electrical conduction with the conductor layer 3. Next, the core substrate 1 and a support 9 made of metal are laminated and joined by heating and pressing. At this time, the core substrate 1, the support 9 and the insulating layer 4 are joined via a prepreg or an anisotropic conductive adhesive. Alternatively, when the insulating layer 4 is made of an adhesive material such as epoxy resin or polyimide, the bonding is performed by heating and pressing. The support 9 is not necessarily limited to a metal plate, but a copper plate is preferably used in consideration of formation of a wiring pattern and heat dissipation. Then, as shown in FIG. 4B, the conductor layer 3 of the core base material 1 is formed.
And a copper plate as the support 9 is electrically connected via the via 4a.

Next, as shown in FIG. 4C, the metal support 2 and the protective film 5 on the core substrate 1 are peeled off by etching in the same manner as in the first embodiment, so that the conductor layer 3 is exposed. After that, the conductor layer 3 is patterned by etching to produce the single-layer circuit board 10 on which the conductor wiring pattern 3a is formed. Specifically, a photosensitive film is formed on a copper foil, exposed, and etched to form a conductive wiring pattern 3a.
To form Thereafter, the entire surface of the conductor wiring pattern 3a is plated with nickel or the like and then plated with gold, and a solder resist is coated except for the land 3c of the conductor wiring pattern 3a to flatten the surface of the single-layer circuit board 10. Is also good. In this case, as will be described later, when forming a multilayer, the adhesion to the via of the conductor wiring pattern of the other layer is good, and the electric resistance is low, which is advantageous in forming a fine wiring pattern in the multilayer circuit board. . Also in this case, similarly to the first embodiment, gold plating or the like can be electrolytically plated using the metal support 9 as a common electrode for plating.

Next, as shown in FIG. 4D, a separately prepared second core substrate 1 is laminated on the single-layer circuit board 10 and joined by heating and pressing. Specifically, the vias 4b formed on the second core substrate 1 and the land portions 3c of the wiring patterns 3a corresponding to the vias 4b formed on the single-layer circuit board 10 are laminated so as to face each other. The electrical connection is established by joining them together. At this time, the single-layer circuit board 10 is bonded to the second core substrate 1 via a prepreg or the like made of an insulating layer as in the first embodiment.

Next, as shown in FIG. 4E, after the metal support 2 and the protective film 5 are peeled off from the core substrate 1 by etching to expose the conductor layer 3, the conductor layer 3 is removed. The conductive wiring pattern 3b is formed by patterning by etching. Specifically, a photosensitive film is formed on a copper foil, exposed, and etched to form a conductive wiring pattern 3.
b is formed. Thereafter, after the flattening process is performed in the same manner as the conductor wiring pattern 3a, the lands 3d of the conductor wiring pattern 3b may be plated with nickel or the like and then subjected to gold plating. Further, nickel plating or gold plating may be applied to the entire wiring pattern without performing the flattening process.

Finally, the copper plate as the support 9 joined to the bottom of the single-layer circuit board 10 joined to the lowermost layer is removed by etching or the like, whereby the multilayer circuit board 11 can be manufactured. In the second embodiment, the case where two conductive layers 3 are provided has been described.
Another core substrate 1 is further laminated thereon so as to establish electrical conduction between the via and the corresponding land portion 3c of the wiring pattern 3b, and the steps of FIGS. 4D to 4E are repeated. The multilayer circuit board 1 on which further multilayer fine wiring is formed
1 can be obtained.

The single-layer circuit board 1 bonded to the lowermost layer
After the support 9 is removed from the substrate 0, a solder resist is applied to the bottom so that only the via 4a is exposed, and external connection terminals such as solder balls are formed on the exposed portion to form a multilayer circuit board for BGA (FIG. (Not shown) can also be produced. Alternatively, after removing the support 9, the multilayer circuit board 11 may be electrically connected between the corresponding land 7 c of the wiring pattern 7 a of the printed circuit board 7 and the via 4 a exposed at the bottom of the multilayer circuit board 11. And the printed circuit board 7 may be laminated and joined. Further, the support 9 is not limited to metal, but may be one in which the surface of an insulator (ceramic, resin material) is metallized by plating or the like.

Although the preferred embodiments of the present invention have been described in various ways, the present invention is not limited to the above-described embodiments, and more modifications can be made without departing from the spirit of the invention. Of course. For example,
In the first and second embodiments, the process of joining the core substrate 1 to be formed into a multilayer to the printed circuit board 7 has been described. However, in order to effectively dissipate the heat of the multilayer circuit board, a metal base (iron plate) is required. , An aluminum plate, etc.) and a metal core substrate provided with an insulating layer and a plating layer on both sides.

[0029]

As described above, the present invention uses a core substrate in which a conductor layer is integrally laminated on a metal support in advance, for example, by laminating a core substrate in multiple layers, It is suitable for high-density mounting of a multilayer circuit board because it has good handleability of a thin conductor layer and can form a fine wiring pattern in a manufacturing process of the multilayer circuit board such as when bonding to a board. Also, when a resin such as a polyimide or an epoxy resin having high heat resistance is used as an insulating layer forming the core base material together with the conductor layer, the adhesive and moisture resistance tests are excellent, and a low-cost circuit board is used. Even if the material is used, a high-quality multilayer circuit board can be provided at low cost.
Further, in the multilayer circuit board, a flat via formation surface of a core base having a conductor layer supported by a metal support is opposed to a wiring pattern formation surface formed on the circuit board corresponding to the via arrangement. Since it is manufactured through a process of laminating and joining, there is little undulation or distortion of the wiring pattern on the laminating surface, and it is possible to obtain a multilayer circuit board with high flatness, and so on.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration of a core base material.

FIG. 2 is an explanatory diagram illustrating an example of a manufacturing process of the multilayer circuit board according to the first embodiment.

FIG. 3 is an explanatory view of a printed circuit board bonded to a core base material.

FIG. 4 is an explanatory diagram illustrating an example of a manufacturing process of the multilayer circuit board according to the second embodiment.

FIG. 5 is an explanatory view showing a manufacturing process for manufacturing a multilayer circuit board by a conventional build-up method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Core base material 1a Via formation surface 2 Aluminum plate 3 Conductor layer 3a, 3b Conductor wiring pattern 3c, 3d, 7c Land part 4 Insulating layer 4a, 4b Via 5 Protective film 6 Adhesive layer 7 Printed circuit board 7a Wiring pattern 7b Through Hole 7d Wiring pattern formation surface 8 Circuit board 9 Support plate 10, 12a, 12b Single layer circuit board 11, 13 Multilayer circuit board

Claims (11)

[Claims] Forming a via electrically connected to the conductor layer in the insulation layer of a core base material having a conductor layer laminated on a metal support and an insulation layer laminated on the conductor layer; The via forming surface of the core substrate and the wiring pattern forming surface of the circuit board are opposed to each other so that the via and the wiring pattern formed on the circuit board corresponding to the via arrangement are electrically connected. Laminating, and after exposing the conductor layer by removing the metal support from the core base material, forming a conductor wiring pattern that electrically connects the conductor layer to the via. A method for manufacturing a multilayer circuit board, which is characterized in that: 2. A core substrate is further laminated so that vias formed on a core substrate provided separately from the conductor wiring pattern are electrically connected, and the metal support is removed from the core substrate to form a conductor. 2. The method for manufacturing a multilayer circuit board according to claim 1, wherein after exposing the layer, a step of forming the conductor layer into a conductor wiring pattern electrically connected to the via is repeated. 3. A first substrate having a conductive layer laminated on a metal support and an insulating layer laminated on the conductive layer, wherein the insulating layer of the core substrate has a via formed thereon for electrically connecting to the conductive layer. And the second
Providing a core base material, laminating a via-formed surface of the first core base material and a support, and removing a metal support from the first core base to expose a conductor layer. Forming a single-layer circuit board in which the conductor layer is formed in a conductor wiring pattern that is electrically connected to the via; and electrically connecting the conductor wiring pattern and the via formed in the second core substrate. Laminating the via formation surface of the second core base material and the conductor wiring pattern formation surface of the single-layer circuit board so as to be connected to each other, and removing the metal support from the second core base material Forming a conductive layer on the conductive wiring pattern after exposing the conductive layer, and removing the support. 4. After the step of removing the support, the via exposed on the support-removed surface of the multilayer circuit board and the wiring pattern formed on the circuit board corresponding to the arrangement of the via are electrically connected. 4. The method for manufacturing a multilayer circuit board according to claim 3, further comprising the step of stacking the multilayer circuit board so that the support removing surface of the multilayer circuit board and the wiring pattern forming surface of the circuit board face each other so as to be connected. 5. The multilayer circuit according to claim 3, further comprising, after the step of removing the support, a step of forming an external connection terminal in a via exposed on the support removal surface of the multilayer circuit board. Substrate manufacturing method. 6. The method according to claim 1, wherein the via formed in the insulating layer is formed by applying electrolytic plating to a via hole formed in the insulating layer.
A method for manufacturing a multilayer circuit board according to claim 4. 7. The method according to claim 1, wherein the via formed in the insulating layer is formed by filling a via hole formed in the insulating layer with a conductive paste. A method for manufacturing a multilayer circuit board according to claim 4. 8. The multilayer circuit board according to claim 6, wherein the via formed in the insulating layer protrudes outward from an opening of the via hole formed in the insulating layer. Manufacturing method. 9. The method according to claim 1, wherein an aluminum plate or a tin plate is used for the metal support.
A method for manufacturing a multilayer circuit board according to claim 3, claim 4, claim 5, claim 6, claim 7, or claim 8. 10. The conductor layer according to claim 1, wherein copper or a copper alloy is formed on the metal support by a sputtering method or a plating method. 10. The method for manufacturing a multilayer circuit board according to claim 5, claim 6, claim 7, claim 8, or claim 9. 11. The conductive layer is formed by attaching a copper foil to the metal support. 10. The method for manufacturing a multilayer circuit board according to claim 6, 7, 8, or 9.