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JP2000031312A - Semiconductor element mounting structure - Google Patents

Semiconductor element mounting structure

Info

Publication number
JP2000031312A
JP2000031312A JP19327398A JP19327398A JP2000031312A JP 2000031312 A JP2000031312 A JP 2000031312A JP 19327398 A JP19327398 A JP 19327398A JP 19327398 A JP19327398 A JP 19327398A JP 2000031312 A JP2000031312 A JP 2000031312A
Authority
JP
Japan
Prior art keywords
semiconductor element
substrate
mounting
gap setting
mounting structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19327398A
Other languages
Japanese (ja)
Other versions
JP3502769B2 (en
Inventor
Toru Hosokawa
徹 細川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP19327398A priority Critical patent/JP3502769B2/en
Publication of JP2000031312A publication Critical patent/JP2000031312A/en
Application granted granted Critical
Publication of JP3502769B2 publication Critical patent/JP3502769B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】 【課題】 従来のフリップチップ実装法では、高周波信
号の良好な伝送特性を維持しつつ半導体素子を実装用基
板に良好に接合することが困難であった。 【解決手段】 下面中央部に半導体素子5が取着された
蓋基板5を、下面外周部に複数個配置した間隙設定部材
8を介在させて実装用基板1の上面に載置し、かつ半導
体素子4下面の電極パッドと実装用基板1上面の接続パ
ッドとを導体端子7を介して接合するとともに、間隙設
定部材8を含めて蓋基板5と実装用基板1間を封止樹脂
9で接合した半導体素子4の実装構造である。高周波信
号の伝送特性を悪化させることなく半導体素子4を実装
用基板1に良好に接合できる。また、蓋基板5・間隙設
定部材8を導電性とすれば、高周波ノイズの悪影響もな
くすことができる。
(57) [Problem] In a conventional flip-chip mounting method, it has been difficult to satisfactorily join a semiconductor element to a mounting substrate while maintaining good transmission characteristics of a high-frequency signal. SOLUTION: A lid substrate 5 having a semiconductor element 5 attached to a lower surface central portion is mounted on an upper surface of a mounting substrate 1 with a plurality of gap setting members 8 arranged on an outer peripheral portion of the lower surface, and a semiconductor device. The electrode pads on the lower surface of the element 4 are connected to the connection pads on the upper surface of the mounting substrate 1 via the conductor terminals 7, and the lid substrate 5 and the mounting substrate 1 including the gap setting member 8 are bonded with the sealing resin 9. This is a mounting structure of the semiconductor element 4 obtained. The semiconductor element 4 can be satisfactorily joined to the mounting substrate 1 without deteriorating the transmission characteristics of the high-frequency signal. If the lid substrate 5 and the gap setting member 8 are made conductive, the adverse effect of high frequency noise can be eliminated.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は情報通信分野や半導
体分野等においてマイクロ波帯やミリ波帯等の高周波用
半導体装置に使用される半導体素子の実装構造に関し、
特に半導体素子を回路基板やパッケージ等の実装用基板
にフリップチップ実装法により実装し、電気的特性と信
頼性の両面を改善した半導体素子の実装構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure of a semiconductor element used for a high-frequency semiconductor device such as a microwave band or a millimeter wave band in the information communication field, the semiconductor field, and the like.
In particular, the present invention relates to a semiconductor element mounting structure in which a semiconductor element is mounted on a mounting substrate such as a circuit board or a package by a flip-chip mounting method, and both electrical characteristics and reliability are improved.

【0002】[0002]

【従来の技術】情報通信分野において、近年の情報伝送
の大容量化に伴い、使用される電気信号について数百M
Hzから数GHzのマイクロ波帯や30GHz以上のミリ
波帯まで高周波化が進んでおり、そのような高周波信号
を扱う半導体素子の実装における電気的接続について
も、以前はワイヤボンディングが主流であったが、高周
波化に伴うボンディングワイヤの悪影響を回避する観点
から、最近では導体端子を接続バンプとして電気的接続
に用いて半導体素子を実装用基板に直接実装する、いわ
ゆるフリップチップ実装が多用されるようになってい
る。
2. Description of the Related Art In the field of information communication, several hundred M
The frequency has been increasing from microwaves to microwave bands of several GHz to millimeter-wave bands of 30 GHz or more, and wire bonding has been the mainstream in the past for electrical connection in mounting semiconductor elements that handle such high-frequency signals. However, from the viewpoint of avoiding the adverse effects of bonding wires due to the increase in frequency, recently, so-called flip-chip mounting, in which a semiconductor element is directly mounted on a mounting substrate by using conductor terminals as connection bumps for electrical connection, is often used. It has become.

【0003】このフリップチップ実装にも様々な方法や
構造があり、例えば、 1)半導体素子の電極パッドと実装用基板の接続パッド
との電気的接続に金バンプを用い、半導体素子と実装用
基板との間に付与した樹脂の収縮応力を利用して接続す
る、MBB(Micro Bump Bonding)法と呼ばれる方法に
よるもの 2)導電性接着材料を用いたスタッドバンプ接続とし
て、半導体素子の電極パッドに金バンプを形成し、その
バンプ先端に導電性ペーストを付与して実装用基板の接
続パッドに当接させ、半導体素子と実装用基板とを加圧
・加熱して導電性ペーストを硬化後、半導体素子と実装
用基板との間に封止樹脂を注入して硬化する方法による
もの 3)導電性接着材料を用いないスタッドバンプ接続とし
て、半導体素子の電極パッドと実装用基板の接続パッド
とをバンプにより加圧と加熱のみで接合する方法による
もの等がある。
There are various methods and structures for this flip chip mounting. For example, 1) gold bumps are used for electrical connection between electrode pads of a semiconductor element and connection pads of a mounting board, and the semiconductor element and the mounting board are used. 2) A method called an MBB (Micro Bump Bonding) method in which a connection is made by utilizing the shrinkage stress of a resin applied between the substrate and the substrate. 2) As a stud bump connection using a conductive adhesive material, gold is applied to an electrode pad of a semiconductor element. A bump is formed, a conductive paste is applied to the tip of the bump, and the bump is brought into contact with a connection pad of the mounting board. The semiconductor element and the mounting board are pressed and heated to cure the conductive paste. 3) A method of injecting and curing a sealing resin between the substrate and the mounting substrate. 3) As a stud bump connection without using a conductive adhesive material, the electrode pad of the semiconductor element and the mounting substrate are mounted. And the like by a method of bonding the connection pads by bump a pressurized heating only.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記の
ようなフリップチップ実装においては、1)のMBB法
や2)のスタッドバンプ接続法のように導電性接着材料
を用いた半導体素子の実装構造の場合には、実装用基板
に対する半導体素子の接合力を強化して接続信頼性を向
上させる目的で、いわゆるアンダーフィルや封止樹脂と
してバンプ(導体端子)近傍に樹脂部分を形成しなけれ
ばならず、このために、バンプ近傍の樹脂部分で特性イ
ンピーダンスの不連続が生じたりバンプにより接続する
配線の電気長が設計と異なったりして、高周波信号の伝
送特性が悪化するという問題点があった。
However, in the above-described flip chip mounting, the mounting structure of a semiconductor element using a conductive adhesive material such as the MBB method of 1) or the stud bump connection method of 2). In such a case, a resin portion must be formed near the bump (conductor terminal) as a so-called underfill or sealing resin for the purpose of enhancing the bonding strength of the semiconductor element to the mounting substrate and improving connection reliability. For this reason, there has been a problem that the characteristic impedance is discontinuous in the resin portion near the bump or the electrical length of the wiring connected by the bump is different from the design, so that the transmission characteristic of the high-frequency signal is deteriorated.

【0005】また、3)の導電性接着材料を用いないス
タッドバンプ接続のような、加圧と加熱のみで接合した
実装構造の場合には、バンプ近傍に樹脂部分を形成して
いないことから上記のような悪影響は起こらないため高
周波信号の伝送特性は良いものの、樹脂部分を形成する
実装構造と比較して半導体素子の接合力が弱いため信頼
性が劣るという問題点があった。
[0005] In the case of a mounting structure in which bonding is performed only by pressing and heating, such as stud bump connection without using a conductive adhesive material in 3), no resin portion is formed near the bumps. Although such adverse effects do not occur, the transmission characteristics of high-frequency signals are good, but there is a problem in that the bonding strength of the semiconductor element is weaker than the mounting structure in which the resin portion is formed, so that the reliability is poor.

【0006】また、従来のフリップチップ実装により複
数の半導体素子を同一の実装用基板上に実装した場合、
複数の半導体素子間で高周波信号が相互に干渉して、ノ
イズを発生させたり、特性が悪化したり、正常に回路が
動作しなくなるという問題点もあった。
Further, when a plurality of semiconductor elements are mounted on the same mounting board by conventional flip chip mounting,
High-frequency signals interfere with each other among a plurality of semiconductor elements, causing noise, deteriorating characteristics, and causing malfunction of the circuit.

【0007】本発明は上記従来技術における問題点に鑑
みてなされたものであり、その目的は、フリップチップ
実装を基本とし、高周波信号に対する良好な伝送特性を
維持しつつ精度よく半導体素子を実装でき、信頼性も改
善できる半導体素子の実装構造を提供することにある。
The present invention has been made in view of the above-mentioned problems in the prior art, and has as its object to mount a semiconductor element with high accuracy while maintaining good transmission characteristics for high-frequency signals based on flip-chip mounting. Another object of the present invention is to provide a semiconductor element mounting structure that can improve reliability.

【0008】また、本発明の他の目的は、同一の実装用
基板上に複数の半導体素子を実装した場合にも、半導体
素子間で高周波信号が相互に干渉してノイズとなったり
回路が正常に動作しなくなったりすることがない、高周
波信号に対する良好な伝送特性を有する半導体素子の実
装構造を提供することにある。
Another object of the present invention is that even when a plurality of semiconductor elements are mounted on the same mounting substrate, high-frequency signals interfere with each other between the semiconductor elements to cause noise or a normal circuit. It is an object of the present invention to provide a mounting structure of a semiconductor element having good transmission characteristics for high-frequency signals, which does not stop operation.

【0009】[0009]

【課題を解決するための手段】本発明の半導体素子の実
装構造は、下面中央部に半導体素子が取着された蓋基板
を、この蓋基板の下面外周部に複数個配置した間隙設定
部材を介在させて実装用基板の上面に載置し、かつ前記
半導体素子の下面に形成された電極パッドと前記実装用
基板の上面に形成された接続パッドとを導体端子を介し
て接合するとともに、前記間隙設定部材を含めて前記蓋
基板と前記実装用基板間を封止樹脂で接合したことを特
徴とするものである。
According to the mounting structure of a semiconductor device of the present invention, a cover substrate having a semiconductor element attached to the lower surface center is provided with a plurality of gap setting members arranged on the outer periphery of the lower surface of the cover substrate. Placed on the upper surface of the mounting substrate with interposition, and bonding the electrode pads formed on the lower surface of the semiconductor element and the connection pads formed on the upper surface of the mounting substrate via conductor terminals, The lid substrate and the mounting substrate, including a gap setting member, are joined with a sealing resin.

【0010】また、本発明の半導体素子の実装構造は、
上記構成において、前記複数個の間隙設定部材を導電性
とし、それらの配置間隔を前記半導体素子の動作周波数
またはノイズ周波数の前記封止樹脂中における波長の2
分の1以下とするとともに接地したことを特徴とするも
のである。
The mounting structure of the semiconductor device of the present invention is as follows.
In the above configuration, the plurality of gap setting members are made conductive, and the distance between the gap setting members is set to two times of the operating frequency or noise frequency of the wavelength in the sealing resin of the semiconductor element.
It is characterized in that it is not more than one-half and is grounded.

【0011】さらに、本発明の半導体素子の実装構造
は、上記各構成において、前記蓋基板を導電性とすると
ともに接地したことを特徴とするものである。
Further, the mounting structure of the semiconductor element according to the present invention is characterized in that in each of the above-mentioned structures, the lid substrate is made conductive and grounded.

【0012】さらにまた、本発明の半導体素子の実装構
造は、上記の複数個の間隙設定部材を導電性とした構成
において、前記蓋基板の下面を導電性とするとともに前
記間隙設定部材を介して接地したことを特徴とするもの
である。
Further, in the semiconductor element mounting structure according to the present invention, in the above-described configuration in which the plurality of gap setting members are made conductive, the lower surface of the lid substrate is made conductive and the gap setting member is interposed therebetween. It is characterized by being grounded.

【0013】[0013]

【発明の実施の形態】本発明の半導体素子の実装構造に
よれば、下面に電極パッドが形成された半導体素子と上
面にその電極パッドに対応する接続パッドが形成された
実装用基板とを突起状またはボール状の導体端子を介し
てフェースダウンでフリップチップ実装するような実装
構造において、蓋基板の下面中央部に予め半導体素子を
取着しておき、蓋基板の下面外周部すなわち半導体素子
の周囲に複数個配置した間隙設定部材を介在させて実装
用基板の上面に載置し、半導体素子の電極パッドと実装
用基板の接続パッドとを導体端子を介して接合するとと
もに、蓋基板と実装用基板とを位置合わせし、その中に
間隙設定部材を含めるように形成した封止樹脂で貼り合
わせて接合するようにしたことから、実装用基板に封止
樹脂で接合した蓋基板により半導体素子と実装用基板と
の接合を強固なものとすることができる。
According to the mounting structure of a semiconductor device of the present invention, a semiconductor device having an electrode pad formed on the lower surface and a mounting substrate having a connection pad corresponding to the electrode pad formed on the upper surface are projected. In a mounting structure in which flip-chip mounting is performed face-down via a conductive terminal in the shape of a ball or a ball, a semiconductor element is previously attached to the center of the lower surface of the lid substrate, and the outer peripheral portion of the lower surface of the lid substrate, that is, the semiconductor element is mounted. It is placed on the top surface of the mounting substrate with a plurality of gap setting members arranged around it, and the electrode pads of the semiconductor element and the connection pads of the mounting substrate are joined via conductive terminals, and mounted on the lid substrate. The lid is bonded to the mounting board with the sealing resin because the board is aligned with the mounting board and bonded with the sealing resin formed so as to include the gap setting member therein. The bonding between the semiconductor element and the mounting board can be made stronger by the plate.

【0014】そのため、半導体素子と実装用基板との間
の導体端子の近傍に接合力の強化と接続信頼性の向上の
目的でアンダーフィルや封止樹脂等の樹脂部分を形成す
る必要がなく、導体端子近傍の樹脂部分によって特性イ
ンピーダンスの不連続が生じたり、導体端子により接続
する配線の電気長が設計と異なったりして高周波信号の
伝送特性が悪化することがなくなるので、従来のアンダ
ーフィルや封止樹脂等の樹脂部分を必要とするフリップ
チップ実装による実装構造と比較して、高周波信号の伝
送特性を悪化させることなく半導体素子を実装できる半
導体素子の実装構造となる。しかも、蓋基板と封止樹脂
とにより半導体素子を封止しているので、環境の変化に
対しても安定で信頼性の高い実装構造となる。
Therefore, there is no need to form a resin portion such as an underfill or a sealing resin in the vicinity of the conductor terminal between the semiconductor element and the mounting substrate for the purpose of strengthening the bonding force and improving the connection reliability. Discontinuity of characteristic impedance is not caused by the resin part near the conductor terminal, and the electrical length of the wiring connected by the conductor terminal is different from the design, so that the transmission characteristics of the high frequency signal will not be deteriorated. As compared with a flip-chip mounting structure that requires a resin portion such as a sealing resin, a semiconductor element mounting structure that can mount a semiconductor element without deteriorating transmission characteristics of a high-frequency signal is provided. In addition, since the semiconductor element is sealed with the lid substrate and the sealing resin, the mounting structure is stable and highly reliable against environmental changes.

【0015】また、封止樹脂中に配置して蓋基板と実装
用基板とに当接させて介在させる間隙設定部材の大きさ
を調整することにより半導体素子の電極パッドと実装用
基板の接続パッドとの間隙も調整することができ、それ
により両者を接合する導体端子に対する加圧量も調整す
ることができるので、導体端子(突起電極)の形状・材
質または端子数、あるいは半導体素子の材質や大きさに
応じた最適の実装構造が実現できるものとなる。
Further, by adjusting the size of the gap setting member which is disposed in the sealing resin and is in contact with and interposed between the lid substrate and the mounting substrate, the electrode pad of the semiconductor element and the connection pad of the mounting substrate are adjusted. And the amount of pressure applied to the conductor terminal that joins them can also be adjusted. Therefore, the shape, material or number of conductor terminals (protruding electrodes), the material of the semiconductor element, An optimal mounting structure according to the size can be realized.

【0016】さらに、蓋基板を熱伝導性の良好なものと
すればこの蓋基板により半導体素子の動作時の発熱を効
率よく放散させることができ、さらに間隙設定部材も熱
伝導性の良好なものとすれば、これらを介して実装用基
板にも熱を伝導させ放散させることができるので、特性
が安定した高信頼性の実装構造となる。
Further, if the cover substrate is made of a material having good thermal conductivity, heat generated during operation of the semiconductor element can be efficiently dissipated by the cover substrate, and the gap setting member also has good heat conductivity. In this case, heat can be conducted and dissipated to the mounting substrate via these components, and a highly reliable mounting structure with stable characteristics can be obtained.

【0017】また、本発明の半導体素子の実装構造によ
れば、複数個の間隙設定部材を導電性とし、それらの配
置間隔を半導体素子の動作周波数またはノイズ周波数の
封止樹脂中における波長の2分の1以下とするとともに
接地した場合には、半導体素子から放射される高周波ノ
イズは、それら間隙設定部材が電磁波シールドとして機
能することとなって外部への放射量が低減される。従っ
て、このような実装構造で実装用基板の同一面上に複数
の半導体素子を実装した場合に、従来の実装構造で複数
の半導体素子を実装した場合と比較して、半導体素子同
士が放射し合う高周波ノイズが相互に干渉して互いの動
作に悪影響を与えることが低減でき、特性の悪化を抑制
して、高周波回路を安定して正常に動作させることがで
きるものとなる。
According to the semiconductor element mounting structure of the present invention, the plurality of gap setting members are made conductive, and the interval between them is set to the operating frequency of the semiconductor element or the noise frequency in the sealing resin of the noise frequency. If it is less than one-half and grounded, the amount of high-frequency noise radiated from the semiconductor element to the outside is reduced because the gap setting member functions as an electromagnetic wave shield. Therefore, when a plurality of semiconductor elements are mounted on the same surface of a mounting board in such a mounting structure, the semiconductor elements emit radiation compared to a case where a plurality of semiconductor elements are mounted in a conventional mounting structure. It is possible to reduce the possibility that the matched high-frequency noises interfere with each other and adversely affect each other's operation, suppress the deterioration of the characteristics, and operate the high-frequency circuit stably and normally.

【0018】間隙設定部材は絶縁性であっても導電性で
あってもよいが、このように間隙設定部材を導電性とす
るには、間隙設定部材を種々の金属や半田・ろう材その
他の導電性材料で形成したり、表面に種々の金属層やメ
ッキ層・半田層その他の導電性被膜を被着した絶縁性材
料で形成すればよい。また、その形状としては、球形や
円柱形・楕円柱形・角柱形・板状形・円錐形・角錐形・
円錐台形・角錐台形あるいはそれらを変形させたもの
等、実装用基板と蓋基板との間に介在させて両者に当接
させ所定の間隙に設定できるものであれば任意の形状と
することができる。また、その寸法としては、間隙を設
定する方向の寸法は、半導体素子の厚みと、半導体素子
に蓋基板を取着する接着剤等の厚みと、電極パッドと接
続パッドとを接合した後の導体端子の高さとの合計を基
準として決めればよく、その他の寸法は、間隙設定部材
の材質にもよるが、蓋基板と実装用基板とにより加重し
た時に破壊しない強度を保てるように決めればよい。
The gap setting member may be either insulative or conductive. To make the gap setting member conductive, the gap setting member is made of various metals, solders, brazing materials and the like. It may be formed of a conductive material, or may be formed of an insulating material having a surface coated with various metal layers, plating layers, solder layers, or other conductive films. The shape is spherical, cylindrical, elliptical, prismatic, plate-like, conical, pyramidal,
Any shape, such as a truncated cone, a truncated pyramid, or a deformed version thereof, can be used as long as it can be set between the mounting substrate and the lid substrate and brought into contact with both to set a predetermined gap. . The dimensions in the direction of setting the gap include the thickness of the semiconductor element, the thickness of an adhesive or the like for attaching the lid substrate to the semiconductor element, and the conductor after the electrode pad and the connection pad are joined. The dimensions may be determined based on the sum of the heights of the terminals, and other dimensions may be determined depending on the material of the gap setting member so as to maintain the strength not to be broken when the lid substrate and the mounting substrate are weighted.

【0019】このような間隙設定部材には、導電性でさ
らに熱伝導性も良好なものとしては、例えばAu・Ag
・Cu等の金属またはPb−Sn・Au−Sn等の合金
を用いるとよい。
Such a gap setting member may be made of, for example, Au. Ag, which is conductive and has good thermal conductivity.
-A metal such as Cu or an alloy such as Pb-Sn-Au-Sn may be used.

【0020】なお、間隙設定部材が導電性の場合に、間
隙設定部材を信号配線上または信号配線の近傍付近に配
置すると信号配線の特性インピーダンス不整合をもたら
す場合があるので、そのような場所は避けて配置するの
が好ましい。この場合も、半導体素子の相互干渉やノイ
ズを避けるためには、信号配線を挟んだ間隙設定部材間
の間隔を半導体素子の動作周波数またはノイズ周波数の
封止樹脂中における波長の2分の1以下とすることによ
り、電磁波シールドとして機能させることができる。
When the gap setting member is conductive, disposing the gap setting member on or near the signal wiring may cause a characteristic impedance mismatch of the signal wiring. It is preferable to arrange them avoiding them. Also in this case, in order to avoid mutual interference and noise of the semiconductor element, the interval between the gap setting members sandwiching the signal wiring should be equal to or less than half of the operating frequency or noise frequency of the semiconductor element in the sealing resin. By doing so, it can function as an electromagnetic wave shield.

【0021】さらに、本発明の半導体素子の実装構造に
よれば、蓋基板を導電性とするとともに接地した場合に
は、その蓋基板が電磁波シールドとして機能することと
なって半導体素子の高周波ノイズの外部への放射量が低
減され、また、外部からの電磁波の侵入量も低減され
る。従って、このような実装構造では半導体素子が放射
する高周波ノイズが外部の電気回路に悪影響を与えた
り、外部から高周波ノイズが侵入して半導体素子の動作
に悪影響を与えたりすることが低減でき、特性の悪化を
抑制して、高周波回路を安定して正常に動作させること
ができるものとなる。また、実装用基板の同一面上に複
数の半導体素子を実装した場合にも、従来の実装構造で
複数の半導体素子を実装した場合と比較して、半導体素
子同士が放射し合う高周波ノイズが相互に干渉して互い
の動作に悪影響を与えることが低減できる。
Further, according to the mounting structure of the semiconductor device of the present invention, when the cover substrate is made conductive and grounded, the cover substrate functions as an electromagnetic wave shield, and the high frequency noise of the semiconductor device is reduced. The amount of radiation to the outside is reduced, and the amount of electromagnetic waves entering from the outside is also reduced. Therefore, in such a mounting structure, it is possible to reduce the possibility that high-frequency noise radiated by the semiconductor element adversely affects an external electric circuit, or that high-frequency noise enters from outside and adversely affects the operation of the semiconductor element. Is suppressed, and the high-frequency circuit can be operated stably and normally. Also, even when a plurality of semiconductor elements are mounted on the same surface of the mounting board, high-frequency noise radiated by the semiconductor elements is mutually different as compared with a case where a plurality of semiconductor elements are mounted in a conventional mounting structure. And adversely affect each other's operation due to interference.

【0022】特に、複数個の間隙設定部材を導電性と
し、それらの配置間隔を半導体素子の動作周波数または
ノイズ周波数の封止樹脂中における波長の2分の1以下
とするとともに接地し、かつ蓋基板を導電性とするとと
もに接地した場合には、それらによる電磁波シールドと
しての機能が極めて良好なものとなり、高周波ノイズの
外部への放射も外部からの侵入もほとんどなくすことが
でき、高周波回路を極めて安定かつ正常に動作させるこ
とができるものとなる。
In particular, the plurality of gap setting members are made conductive, and the interval between them is set to be equal to or less than half the wavelength of the operating frequency or noise frequency of the semiconductor element in the sealing resin, and grounded. When the board is made conductive and grounded, the function of the board as an electromagnetic wave shield becomes extremely good, and high-frequency noise can be hardly radiated to the outside and intrusion from the outside can be almost eliminated. It can be operated stably and normally.

【0023】しかも、これら間隙設定部材および蓋基板
を接地するのに、実装用基板の接地配線や接地電極に間
隙設定部材の一つを接続し、それを介して蓋基板を接地
するとともにそれと接合されている他の間隙設定部材も
一体的に接地することができるため、接地のための配線
を引き回したり付加したりする必要がなく、小型化を図
りつつ安定した接地状態を容易に実現できるものとな
る。
Further, in order to ground the gap setting member and the lid substrate, one of the gap setting members is connected to a ground wiring or a ground electrode of the mounting substrate, and the lid substrate is grounded and joined thereto via the connection. The other gap setting members can also be integrally grounded, so that it is not necessary to route or add wiring for grounding, and it is possible to easily realize a stable grounding state while achieving downsizing. Becomes

【0024】蓋基板も絶縁性であっても導電性であって
もよいが、このように蓋基板を導電性とするには、蓋基
板を種々の金属その他の導電性材料の板状体で形成した
り、表面に種々の金属層やメッキ層・半田層その他の導
電性被膜を被着した絶縁性材料の板状体で形成すればよ
い。また、その形状としては、平板状であって正方形や
長方形・菱形等の矩形や円形・楕円形あるいはそれらを
変形させたもの等、またはそれらの形状で、下面外周部
等の実装用基板との間に間隙設定部材を介在させる部位
に壁を設けてキャップ状としたもの等、実装用基板の仕
様に応じて半導体素子を取着でき実装後に封止用の蓋と
して機能できるものであれば任意の形状とすることがで
きる。
The lid substrate may be either insulative or conductive. To make the lid substrate conductive in this way, the lid substrate is made of a plate of various metals or other conductive materials. It may be formed of a plate-like body of an insulating material having a surface coated with various metal layers, plating layers, solder layers, and other conductive films. In addition, the shape thereof is a flat plate, such as a square, a rectangle, a rhombus, or a rectangle, a circle, an ellipse, or a shape obtained by deforming them. Any one that can function as a sealing lid after mounting a semiconductor element according to the specifications of the mounting substrate, such as a cap-shaped one provided with a wall at a portion where a gap setting member is interposed therebetween, Shape.

【0025】このように蓋基板を平板状とした場合には
蓋基板の加工が容易で実装構造もシンプルなものとする
ことができ、蓋基板をキャップ状とした場合には電磁波
シールドとしての機能をより良好なものとすることがで
きる。
As described above, when the lid substrate is formed in a flat plate shape, the processing of the lid substrate is easy and the mounting structure can be made simple. When the lid substrate is formed in a cap shape, it functions as an electromagnetic wave shield. Can be further improved.

【0026】また、その寸法としては、半導体素子の大
きさや間隙設定部材の大きさ・封止樹脂の幅・封止樹脂
の塗布マージン等を考慮して決めればよい。
The size may be determined in consideration of the size of the semiconductor element, the size of the gap setting member, the width of the sealing resin, the application margin of the sealing resin, and the like.

【0027】このような蓋基板には、導電性でさらに熱
伝導性も良好なものとしては、従来のパッケージにおけ
る蓋体として一般的なものを用いればよく、例えばFe
−Ni−Co合金やFe−Ni合金・Ni等の金属、ま
たはセラミックスにメタライズ処理をしたものなどを用
いるとよい。
As such a lid substrate, a general one as a lid in a conventional package may be used as a substrate having good conductivity and good thermal conductivity.
It is preferable to use a metal such as a metal such as -Ni-Co alloy or Fe-Ni alloy / Ni, or ceramics.

【0028】さらにまた、本発明の半導体素子の実装構
造によれば、複数個の間隙設定部材を導電性とし、それ
らの配置間隔を半導体素子の動作周波数またはノイズ周
波数の封止樹脂中における波長の2分の1以下とすると
ともに接地し、かつ蓋基板の下面すなわち半導体素子が
取着される主面を導電性とするとともに間隙設定部材を
介して接地した場合には、電磁波シールドとしての機能
が極めて良好なものとなり、高周波ノイズの外部への放
射も外部からの侵入もほとんどなくすことができるとと
もに、取着した半導体素子をその主面を介して接地する
ことを容易に行なえるものとなり、半導体素子の接地状
態を安定させ、高周波回路を極めて安定かつ正常に動作
させることができるものとなる。
Further, according to the semiconductor element mounting structure of the present invention, the plurality of gap setting members are made conductive, and the interval between the gap setting members is determined by the wavelength of the operating frequency or noise frequency of the semiconductor element in the sealing resin. When it is grounded by half or less and grounded, and when the lower surface of the lid substrate, that is, the main surface on which the semiconductor element is attached is made conductive and grounded via a gap setting member, the function as an electromagnetic wave shield is performed. It is extremely good, it can hardly radiate high frequency noise to the outside and invade from the outside, and it can easily ground the attached semiconductor element via its main surface. The grounding state of the element can be stabilized, and the high-frequency circuit can be operated extremely stably and normally.

【0029】以下、図面に基づいて本発明の半導体素子
の実装構造を詳細に説明する。
Hereinafter, the mounting structure of the semiconductor device of the present invention will be described in detail with reference to the drawings.

【0030】図1は本発明の半導体素子の実装構造の実
施の形態の一例を示す断面図である。図1において、1
は各種のセラミックスや有機絶縁材料等と配線導体とに
より形成された配線基板や多層配線基板あるいは半導体
素子収納用パッケージの基体等の実装用基板であり、2
は実装用基板1上に形成された信号配線、3は信号配線
2の端部に形成され電気的に接続された接続パッドであ
る。
FIG. 1 is a sectional view showing an example of an embodiment of a mounting structure of a semiconductor device according to the present invention. In FIG. 1, 1
Is a mounting substrate such as a wiring board or a multilayer wiring board formed of various ceramics or organic insulating materials and the like and a wiring conductor, or a base of a package for storing semiconductor elements.
Is a signal wiring formed on the mounting substrate 1, and 3 is a connection pad formed at an end of the signal wiring 2 and electrically connected thereto.

【0031】4は半導体素子、5は蓋基板であり、半導
体素子4は表面(図における下面)に電極パッド(図示
せず)を有しており、裏面(図における上面)は、例え
ば金−錫等の接着剤6により蓋基板5の下面中央部にい
わゆるダイボンドされて取着されている。また、半導体
素子4表面に形成された電極パッドとそれに対応して実
装用基板1の上面に形成された接続パッド3とは金バン
プや半田バンプ等の接続バンプあるいは導電性ペースト
等により形成された導体端子7を介して接合され、これ
により半導体素子4の内部配線と実装用基板1の信号配
線2とが電気的に接続される。
Reference numeral 4 denotes a semiconductor element, 5 denotes a lid substrate, and the semiconductor element 4 has an electrode pad (not shown) on the front surface (lower surface in the figure). It is so-called die-bonded and attached to the center of the lower surface of the lid substrate 5 with an adhesive 6 such as tin. The electrode pads formed on the surface of the semiconductor element 4 and the connection pads 3 correspondingly formed on the upper surface of the mounting substrate 1 are formed by connection bumps such as gold bumps or solder bumps or conductive paste. The connection is made via the conductor terminals 7, whereby the internal wiring of the semiconductor element 4 and the signal wiring 2 of the mounting board 1 are electrically connected.

【0032】なお、導体端子7には導電性あるいは金め
っき等で表面が導電性とされた樹脂ボールを用いても良
く、樹脂ボールを用いた場合は実装用基板1と蓋基板5
とのギャップが多少変化しても、その変化量を樹脂の弾
力でキャンセルできて良好な接合ができるものとなる。
The conductor terminals 7 may be made of resin balls whose surfaces are made conductive by gold plating or the like. If resin balls are used, the mounting substrate 1 and the lid substrate 5 may be used.
Even if the gap slightly changes, the amount of change can be canceled by the elasticity of the resin, and good bonding can be achieved.

【0033】そして、8は蓋基板5の下面外周部すなわ
ち半導体素子4の周囲に複数個配置され、蓋基板5と実
装用基板1との間に介在させることにより両者の間隙を
所定の大きさに設定する間隙設定部材、9はその中に間
隙設定部材8を含めるように形成された、蓋基板5と実
装用基板1とを接合する封止樹脂である。このように半
導体素子4の周囲に封止樹脂9が形成されることによ
り、実装用基板1上に導体端子7を介して実装された半
導体素子4が実装用基板1と蓋基板5と封止樹脂9とに
囲まれた空間の内側に封止されることとなる。
A plurality of reference numerals 8 are arranged on the outer peripheral portion of the lower surface of the lid substrate 5, that is, around the semiconductor element 4, and are interposed between the lid substrate 5 and the mounting substrate 1 so that the gap between them is a predetermined size. Is a sealing resin which is formed so as to include the gap setting member 8 therein and which joins the lid substrate 5 and the mounting substrate 1. By forming the sealing resin 9 around the semiconductor element 4 in this manner, the semiconductor element 4 mounted on the mounting substrate 1 via the conductor terminals 7 is sealed with the mounting substrate 1 and the lid substrate 5. It is sealed inside the space surrounded by the resin 9.

【0034】本発明の半導体素子の実装構造に対して
は、実装用基板1上面の蓋基板5の下面外周部に対向す
る部位に蓋基板5を接合するための封止樹脂9を塗布す
る際、封止樹脂9に間隙設定部材8を混ぜておき、ディ
スペンサ等で塗布するようにしてもよい。また、封止樹
脂のみを塗布した後、間隙設定部材8を所望の位置に配
置してもよく、間隙設定部材8を配置した後、封止樹脂
を塗布するようにしても構わない。
For the mounting structure of the semiconductor element of the present invention, when applying a sealing resin 9 for bonding the lid substrate 5 to a portion of the upper surface of the mounting substrate 1 facing the outer peripheral portion of the lower surface of the lid substrate 5. Alternatively, the gap setting member 8 may be mixed with the sealing resin 9 and applied with a dispenser or the like. Further, after only the sealing resin is applied, the gap setting member 8 may be arranged at a desired position, or after the gap setting member 8 is arranged, the sealing resin may be applied.

【0035】信号配線2は、例えばCr/Cu/Ni/
AuあるいはTi/Pd/Au等から成る配線導体によ
り形成し、その厚みや線幅は、実装用基板1の誘電率・
厚さ等や半導体素子4の動作周波数等から計算して、通
常は特性インピーダンスが50Ωとなるように設定する。
The signal wiring 2 is made of, for example, Cr / Cu / Ni /
It is formed of a wiring conductor made of Au, Ti / Pd / Au, or the like.
Calculated from the thickness and the like, the operating frequency of the semiconductor element 4, and the like, the characteristic impedance is usually set so as to be 50Ω.

【0036】10は信号配線2の絶縁を確保する場合に必
要に応じて形成される絶縁膜であり、信号配線2同士の
絶縁や同図に示すように信号配線2の上に導電性の間隙
設定部材8が位置する場合にそれと絶縁する場合等に、
例えばポリイミド等により適宜形成される。なお、間隙
設定部材8は実装用基板1の上面に直接当接させても、
実装用基板1の接地電極パッドや接地配線に当接させて
もよく、絶縁性のものとして信号配線2に直接当接させ
てもよい。
Reference numeral 10 denotes an insulating film formed as necessary to ensure the insulation of the signal wiring 2. The insulating film 10 is used to insulate the signal wiring 2 from each other or to form a conductive gap on the signal wiring 2 as shown in FIG. When the setting member 8 is located and insulated from it,
For example, it is appropriately formed of polyimide or the like. In addition, even if the gap setting member 8 is directly in contact with the upper surface of the mounting substrate 1,
It may be in contact with a ground electrode pad or a ground wiring of the mounting substrate 1 or may be directly in contact with the signal wiring 2 as an insulating material.

【0037】このようにして、蓋基板5に半導体素子4
を取着して、半導体素子4の電極パッドと実装用基板1
の接続パッド3とを導体端子7を介して接合するととも
に、蓋基板5と実装用基板1とを、半導体素子4の周囲
に複数個配置して蓋基板5と実装用基板1間に介在させ
た間隙設定部材8を含めて封止樹脂9で接合しているの
で、間隙設定部材8により実装用基板1と蓋基板5との
ギャップ調整を行なうことができて、そのギャップ調整
により半導体素子4の電極パッドと実装用基板1の接続
パッド3とを接合する導体端子7の加圧量を調整するこ
とができ、半導体素子4を実装用基板1上に所望の良好
な実装状態でフリップチップ実装し、しかも蓋基板5と
封止樹脂9とにより半導体素子4を封止して、環境の変
化に対しても安定して動作させることができる信頼性の
高い実装構造となる。
Thus, the semiconductor element 4 is placed on the lid substrate 5.
After mounting, the electrode pads of the semiconductor element 4 and the mounting substrate 1
And the connection pads 3 are connected via the conductor terminals 7, and a plurality of cover substrates 5 and the mounting substrate 1 are arranged around the semiconductor element 4 so as to be interposed between the lid substrate 5 and the mounting substrate 1. Since the gap setting member 8 and the sealing resin 9 are joined together, the gap between the mounting substrate 1 and the cover substrate 5 can be adjusted by the gap setting member 8, and the semiconductor element 4 can be adjusted by the gap adjustment. The amount of pressurization of the conductor terminal 7 that joins the electrode pad and the connection pad 3 of the mounting substrate 1 can be adjusted, and the semiconductor element 4 is flip-chip mounted on the mounting substrate 1 in a desired good mounting state. In addition, the semiconductor element 4 is sealed with the lid substrate 5 and the sealing resin 9 to provide a highly reliable mounting structure that can be operated stably with respect to environmental changes.

【0038】次に、本発明の半導体素子の実装構造の実
施の形態の他の例を図2に斜視図で示す。図2において
は図1と同様の箇所には同じ符号を付してあり、また、
分かりやすくするため、接着剤6・封止樹脂9・絶縁膜
10については図示を省略し、蓋基板5の一部は切り欠い
て示している。
Next, another example of the embodiment of the mounting structure of the semiconductor device of the present invention is shown in a perspective view in FIG. In FIG. 2, the same parts as those in FIG. 1 are denoted by the same reference numerals,
Adhesive 6, sealing resin 9, insulating film
10 is not shown, and a part of the lid substrate 5 is cut away.

【0039】この例では、間隙設定部材8は実装用基板
1と蓋基板5とにそれぞれ直接に当接しており、このよ
うに各基板1・5の表面に直接当接させると、両者の間
隙の設定がより容易になる。また、導電性として半導体
素子4の動作周波数の封止樹脂中の波長の2分の1以下
の間隔で複数個配置して電磁波シールドとしての機能も
持たせている。
In this example, the gap setting member 8 is in direct contact with the mounting substrate 1 and the lid substrate 5, respectively. Setting becomes easier. In addition, a plurality of conductive elements are arranged at intervals equal to or less than half the wavelength of the operating frequency of the semiconductor element 4 in the sealing resin so as to have a function as an electromagnetic wave shield.

【0040】電磁波の波長の2分の1の間隔で導体が並
んでいる場合には導体間に電流が流れることにより電磁
波はその導体を通過してしまい、波長の2分の1以下の
間隔であれば電磁波は通らなくなるので、このような実
装構造によれば、導電性の間隙設定部材8を波長の2分
の1以下の間隔としていることで電磁波が外部に漏れな
い構造のものとなる。
When conductors are arranged at an interval of one half of the wavelength of the electromagnetic wave, a current flows between the conductors, and the electromagnetic wave passes through the conductor. If there is any electromagnetic wave, the electromagnetic wave will not pass. Therefore, according to such a mounting structure, the conductive gap setting member 8 is arranged at an interval of half or less of the wavelength, so that the electromagnetic wave does not leak to the outside.

【0041】なお、この場合、導電性の間隙設定部材8
の間隔を半導体素子4の動作周波数の封止樹脂中の波長
の4分の1以下とすれば、電磁波をより確実に遮断する
ことができ、電磁波シールドとして良好に機能させるこ
とができるものとなって、より好ましいものとなる。
In this case, the conductive gap setting member 8
Is set to be not more than 分 の of the wavelength of the operating frequency of the semiconductor element 4 in the sealing resin, the electromagnetic wave can be more reliably cut off, and it can function well as an electromagnetic wave shield. Therefore, it becomes more preferable.

【0042】次に、本発明の半導体素子の実装構造の実
施の形態のさらに他の例について、図3にその実装用基
板の上面図を、また図4に実装構造の図2と同様の斜視
図を示す。これらの図において、図1および図2と同様
の箇所には同じ符号を付してある。
FIG. 3 is a top view of a mounting substrate of another embodiment of the semiconductor device mounting structure of the present invention, and FIG. 4 is a perspective view of the mounting structure similar to FIG. The figure is shown. In these drawings, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.

【0043】図3(a)は実装用基板1の上面図、
(b)は実装用基板1の上面に形成された信号配線2そ
の他の配線導体のパターンを示す上面図、(c)は絶縁
膜10のパターンを示す上面図であり、(b)に示す配線
導体のパターン上に(c)に示す絶縁膜のパターンを重
ねて形成することにより、(a)に示す実装用基板1が
形成されている。
FIG. 3A is a top view of the mounting substrate 1,
(B) is a top view showing a pattern of the signal wiring 2 and other wiring conductors formed on the upper surface of the mounting substrate 1, (c) is a top view showing a pattern of the insulating film 10, and the wiring shown in (b) The mounting substrate 1 shown in (a) is formed by superposing and forming the insulating film pattern shown in (c) on the conductor pattern.

【0044】図3および図4において、1は実装用基
板、2はその上面に形成された信号配線、3は半導体素
子4の電極パッドと対応して形成された接続パッドであ
り、10は絶縁膜である。絶縁膜10には信号配線2に重な
る位置で、かつ実装される半導体素子4の電極パッドに
対応する位置に信号配線2の配線導体を接続パッド3と
して露出させる接続パッド用窓3’が形成されている。
なお、図4においては絶縁膜10の図示は省略している。
3 and 4, reference numeral 1 denotes a mounting substrate, 2 denotes a signal wiring formed on an upper surface thereof, 3 denotes a connection pad formed corresponding to an electrode pad of the semiconductor element 4, and 10 denotes an insulating pad. It is a membrane. In the insulating film 10, a connection pad window 3 'for exposing the wiring conductor of the signal wiring 2 as the connection pad 3 is formed at a position overlapping with the signal wiring 2 and at a position corresponding to the electrode pad of the semiconductor element 4 to be mounted. ing.
Note that the illustration of the insulating film 10 is omitted in FIG.

【0045】11は実装用基板1の上面の蓋基板5の下面
外周部と対向する部位に形成した接地導体であり、この
例では、この接地導体11上に導電性の間隙設定部材8を
配置することにより、間隙設定部材8を接地するととも
に、間隙設定部材8を介して導電性の蓋基板5も接地し
ている。また、12は半導体素子4への電源供給線であ
る。なお、絶縁膜10は、接地導体11を避け、また信号配
線2と接地との絶縁、および電源供給線12と接地との絶
縁を確保するようなパターンで形成している。
Reference numeral 11 denotes a ground conductor formed on the upper surface of the mounting substrate 1 at a position opposed to the outer peripheral portion of the lower surface of the lid substrate 5. In this example, a conductive gap setting member 8 is disposed on the ground conductor 11. Thereby, the gap setting member 8 is grounded, and the conductive lid substrate 5 is also grounded via the gap setting member 8. Reference numeral 12 denotes a power supply line to the semiconductor element 4. The insulating film 10 is formed in a pattern that avoids the ground conductor 11 and ensures insulation between the signal wiring 2 and the ground and insulation between the power supply line 12 and the ground.

【0046】このような実装構造によれば、絶縁膜10が
電源供給線12を覆うように形成されているので、導電性
の間隙設定部材8を電源供給線12の上部に配置してもシ
ョートすることがなく、半導体素子4の動作周波数の封
止樹脂中の波長の2分の1以下の間隔に導電性の間隙設
定部材8を配置することが容易なものとなる。
According to such a mounting structure, since the insulating film 10 is formed so as to cover the power supply line 12, even if the conductive gap setting member 8 is disposed above the power supply line 12, the short circuit occurs. Therefore, it is easy to arrange the conductive gap setting member 8 at an interval equal to or less than half the wavelength of the operating frequency of the semiconductor element 4 in the sealing resin.

【0047】なお、以上はあくまで本発明の実施の形態
の例示であって、本発明はこれらに限定されるものでは
なく、本発明の要旨を逸脱しない範囲で種々の変更や改
良を加えることは何ら差し支えない。例えば、絶縁膜10
を実装用基板1の全面に形成し、接地導体11上の必要な
箇所や信号配線2上の必要な箇所に接続パッド用窓を形
成するような構造としてもよい。
It should be noted that the above is only an example of the embodiment of the present invention, and the present invention is not limited to the embodiment. Various changes and improvements can be made without departing from the gist of the present invention. No problem. For example, the insulating film 10
May be formed on the entire surface of the mounting substrate 1, and a connection pad window may be formed at a required location on the ground conductor 11 or a required location on the signal wiring 2.

【0048】また、蓋基板5を下面外周部に側壁を有す
るキャップ状のものとし、その側壁の端部と実装用基板
1上面との間に間隙設定部材8を介在させるようにして
もよい。
Further, the lid substrate 5 may be formed in a cap shape having a side wall on the outer periphery of the lower surface, and the gap setting member 8 may be interposed between the end of the side wall and the upper surface of the mounting substrate 1.

【0049】また、蓋基板5の下面中央部に複数の半導
体素子4を取着し、蓋基板5の下面外周部とともにそれ
ら半導体素子4間にも間隙設定部材8を配置して、いわ
ゆるマルチチップモジュール化した実装構造としてもよ
い。
A plurality of semiconductor elements 4 are attached to the center of the lower surface of the lid substrate 5, and a gap setting member 8 is arranged between the semiconductor elements 4 together with the outer peripheral portion of the lower surface of the lid substrate 5, so that a so-called multi-chip It may be a modular mounting structure.

【0050】[0050]

【発明の効果】以上のように、本発明の半導体素子の実
装構造によれば、蓋基板の下面に予め半導体素子を取着
しておき、蓋基板の下面外周部に複数個配置した間隙設
定部材を介在させて実装用基板の上面に載置し、半導体
素子の電極パッドと実装用基板の接続パッドとを導体端
子を介して接合するとともに、蓋基板と実装用基板と
を、その中に間隙設定部材を含めるように形成した封止
樹脂で接合するようにしたことから、実装用基板に封止
樹脂で接合した蓋基板により半導体素子と実装用基板と
の接合を強固なものとすることができ、導体端子の近傍
にアンダーフィル等の樹脂部分を形成する必要がなく、
導体端子の近傍で特性インピーダンスの不連続が生じた
り接続する配線の電気長が設計と異なったりして高周波
信号の伝送特性が悪化することがなく、良好な高周波信
号の伝送特性で半導体素子を実装することができる。し
かも、蓋基板と封止樹脂とにより半導体素子を気密に封
止しているので、環境の変化に対しても安定で信頼性が
高い。
As described above, according to the semiconductor device mounting structure of the present invention, a semiconductor device is mounted on the lower surface of the lid substrate in advance, and a plurality of gap setting members are arranged on the outer peripheral portion of the lower surface of the lid substrate. Placed on the top surface of the mounting board with members interposed, the electrode pads of the semiconductor element and the connection pads of the mounting board are joined via conductor terminals, and the lid substrate and the mounting board are placed therein. Because the sealing resin formed so as to include the gap setting member is used, the bonding between the semiconductor element and the mounting substrate is strengthened by the lid substrate bonded to the mounting substrate with the sealing resin. It is not necessary to form a resin part such as underfill near the conductor terminal,
The semiconductor element is mounted with good high-frequency signal transmission characteristics without discontinuity in the characteristic impedance near the conductor terminal or the deterioration of the transmission characteristics of high-frequency signals due to differences in the electrical length of the connecting wires from the design. can do. In addition, since the semiconductor element is hermetically sealed with the lid substrate and the sealing resin, the semiconductor element is stable and highly reliable against environmental changes.

【0051】従って、本発明によれば、フリップチップ
実装を基本とし、高周波信号に対する良好な伝送特性を
維持しつつ精度よく半導体素子を実装でき、信頼性も改
善できる半導体素子の実装構造を提供することができ
た。
Therefore, according to the present invention, there is provided a semiconductor element mounting structure which is based on flip-chip mounting, can mount a semiconductor element with high accuracy while maintaining good transmission characteristics for high frequency signals, and can improve reliability. I was able to.

【0052】さらに、蓋基板や間隙設定部材を熱伝導性
の良好なものとすれば、これらを介して半導体素子の動
作時の発熱を効率よく放散させることができ、特性が安
定した高信頼性の実装構造となる。
Further, if the lid substrate and the gap setting member are made of a material having good thermal conductivity, heat generated during the operation of the semiconductor element can be efficiently dissipated through them, and the characteristics are stable and the reliability is high. Mounting structure.

【0053】また、本発明の半導体素子の実装構造によ
れば、複数個の間隙設定部材を導電性とし、それらの配
置間隔を半導体素子の動作周波数またはノイズ周波数の
封止樹脂中における波長の4分の1以下とするとともに
接地した場合には、半導体素子から放射される高周波ノ
イズの外部への放射量が低減され、半導体素子同士が放
射し合う高周波ノイズが相互に干渉して互いの動作に悪
影響を与えることが低減でき、特性の悪化を抑制して、
高周波回路を安定して正常に動作させることができるも
のとなる。
According to the semiconductor element mounting structure of the present invention, the plurality of gap setting members are made conductive, and the interval between them is set to the operating frequency of the semiconductor element or the noise frequency of 4 in the sealing resin. If it is less than one-half and grounded, the amount of high-frequency noise radiated from the semiconductor elements to the outside is reduced, and the high-frequency noise radiated by the semiconductor elements interferes with each other to affect each other's operation. The adverse effects can be reduced, and the deterioration of the characteristics can be suppressed.
The high-frequency circuit can be operated stably and normally.

【0054】さらに、本発明の半導体素子の実装構造に
よれば、蓋基板を導電性とするとともに接地した場合に
は、その蓋基板が電磁波シールドとして機能することと
なって半導体素子の高周波ノイズの外部への放射量が低
減され、また、外部からの電磁波の侵入量も低減される
ので、外部の電気回路に悪影響を与えたり、外部から高
周波ノイズが侵入して半導体素子の動作に悪影響を与え
たり、また、半導体素子同士が相互に干渉して互いの動
作に悪影響を与えることが低減でき、特性の悪化を抑制
して、高周波回路を安定して正常に動作させることがで
きるものとなる。
Further, according to the mounting structure of the semiconductor element of the present invention, when the lid substrate is made conductive and grounded, the lid substrate functions as an electromagnetic wave shield, thereby reducing the high frequency noise of the semiconductor element. The amount of radiation to the outside is reduced, and the amount of intrusion of electromagnetic waves from the outside is also reduced. In addition, it is possible to reduce the possibility that the semiconductor elements interfere with each other and adversely affect each other's operations, suppress the deterioration of the characteristics, and operate the high-frequency circuit stably and normally.

【0055】特に、複数個の間隙設定部材を導電性と
し、それらの配置間隔を半導体素子の動作周波数または
ノイズ周波数の封止樹脂中における波長の4分の1以下
とするとともに接地し、かつ蓋基板を導電性とするとと
もに接地した場合には、それらによる電磁波シールドと
しての機能が極めて良好なものとなる。
In particular, the plurality of gap setting members are made conductive, the interval between them is set to be not more than 波長 of the wavelength of the operating frequency or noise frequency of the semiconductor element in the sealing resin, and grounded. When the substrate is made conductive and grounded, the function as an electromagnetic wave shield thereby becomes extremely good.

【0056】さらにまた、本発明の半導体素子の実装構
造によれば、複数個の間隙設定部材を導電性とし、それ
らの配置間隔を半導体素子の動作周波数またはノイズ周
波数の封止樹脂中における波長の4分の1以下とすると
ともに接地し、かつ蓋基板の下面を導電性とするととも
に間隙設定部材を介して接地した場合には、電磁波シー
ルドとしての機能が極めて良好なものとなるとともに、
取着した半導体素子の接地も容易に行なえるものとな
る。
Further, according to the semiconductor element mounting structure of the present invention, the plurality of gap setting members are made conductive, and the interval between them is determined by the wavelength of the operating frequency or noise frequency of the semiconductor element in the sealing resin. When it is grounded via a gap setting member while the lower surface of the lid substrate is conductive and grounded through a quarter or less, the function as an electromagnetic wave shield becomes extremely good,
Grounding of the attached semiconductor element can be easily performed.

【0057】従って、本発明によれば、同一の実装用基
板上に複数の半導体素子を実装した場合にも、半導体素
子間で高周波信号が相互に干渉してノイズとなったり回
路が正常に動作しなくなったりすることがない、高周波
信号に対する良好な伝送特性を有する半導体素子の実装
構造を提供することができた。
Therefore, according to the present invention, even when a plurality of semiconductor elements are mounted on the same mounting substrate, high-frequency signals interfere with each other between the semiconductor elements to cause noise or the circuit operates normally. It is possible to provide a mounting structure of a semiconductor element having good transmission characteristics for high-frequency signals, which does not disappear.

【0058】さらに、本発明の半導体素子の実装構造に
よれば、従来のフリップチップ実装用の実装装置を用い
て半導体素子を実装することが可能で、蓋基板の下面に
半導体素子を取着して実装することから、フリップチッ
プ用に設計された半導体素子の他に従来のワイヤボンデ
ィング用に設計された半導体素子に対してもフリップチ
ップ実装を行なうことが可能になる。そして、半導体素
子の裏面が蓋基板に接触しているので、放熱性にも優れ
た実装構造となる。
Further, according to the semiconductor element mounting structure of the present invention, the semiconductor element can be mounted using a conventional mounting apparatus for flip chip mounting, and the semiconductor element is mounted on the lower surface of the lid substrate. Therefore, it is possible to perform flip-chip mounting not only on a semiconductor element designed for flip-chip but also on a conventional semiconductor element designed for wire bonding. Since the back surface of the semiconductor element is in contact with the lid substrate, a mounting structure having excellent heat dissipation is obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体素子の実装構造の実施の形態の
一例を示す断面図である。
FIG. 1 is a cross-sectional view illustrating an example of an embodiment of a semiconductor element mounting structure according to the present invention.

【図2】本発明の半導体素子の実装構造の実施の形態の
他の例を示す斜視図である。
FIG. 2 is a perspective view showing another example of the embodiment of the mounting structure of the semiconductor element of the present invention.

【図3】(a)は本発明の半導体素子の実装構造の実施
の形態の例における実装用基板の上面図、(b)は配線
導体のパターンを示す上面図、(c)は絶縁膜のパター
ンを示す上面図である。
3A is a top view of a mounting board in an embodiment of a semiconductor element mounting structure according to the present invention, FIG. 3B is a top view showing a wiring conductor pattern, and FIG. It is a top view showing a pattern.

【図4】本発明の半導体素子の実装構造の実施の形態の
さらに他の例を示す斜視図である。
FIG. 4 is a perspective view showing still another example of the embodiment of the mounting structure of the semiconductor element of the present invention.

【符号の説明】[Explanation of symbols]

1・・・実装用基板 2・・・信号配線 3・・・接続パッド 4・・・半導体素子 5・・・蓋基板 7・・・導体端子 8・・・間隙設定部材 9・・・封止樹脂 DESCRIPTION OF SYMBOLS 1 ... Mounting board 2 ... Signal wiring 3 ... Connection pad 4 ... Semiconductor element 5 ... Lid board 7 ... Conductor terminal 8 ... Gap setting member 9 ... Sealing resin

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 下面中央部に半導体素子が取着された蓋
基板を、該蓋基板の下面外周部に複数個配置した間隙設
定部材を介在させて実装用基板の上面に載置し、かつ前
記半導体素子の下面に形成された電極パッドと前記実装
用基板の上面に形成された接続パッドとを導体端子を介
して接合するとともに、前記間隙設定部材を含めて前記
蓋基板と前記実装用基板間を封止樹脂で接合したことを
特徴とする半導体素子の実装構造。
1. A lid substrate having a semiconductor element attached to a lower central portion thereof is mounted on an upper surface of a mounting substrate with a plurality of gap setting members arranged on an outer peripheral portion of a lower surface of the lid substrate, and An electrode pad formed on the lower surface of the semiconductor element and a connection pad formed on the upper surface of the mounting substrate are joined via conductor terminals, and the lid substrate and the mounting substrate including the gap setting member are included. A mounting structure of a semiconductor element, wherein a gap is joined with a sealing resin.
【請求項2】 前記複数個の間隙設定部材を導電性と
し、それらの配置間隔を前記半導体素子の動作周波数ま
たはノイズ周波数の前記封止樹脂中における波長の2分
の1以下とするとともに接地したことを特徴とする請求
項1記載の半導体素子の実装構造。
2. A method according to claim 1, wherein the plurality of gap setting members are made conductive, and an interval between the plurality of gap setting members is set to a half or less of a wavelength of an operating frequency or a noise frequency of the semiconductor element in the sealing resin and grounded. The mounting structure of a semiconductor device according to claim 1, wherein:
【請求項3】 前記蓋基板を導電性とするとともに接地
したことを特徴とする請求項1または請求項2記載の半
導体素子の実装構造。
3. The mounting structure of a semiconductor device according to claim 1, wherein said lid substrate is made conductive and grounded.
【請求項4】 前記蓋基板の下面を導電性とするととも
に前記間隙設定部材を介して接地したことを特徴とする
請求項2記載の半導体素子の実装構造。
4. The mounting structure of a semiconductor device according to claim 2, wherein the lower surface of said lid substrate is made conductive and grounded via said gap setting member.
JP19327398A 1998-07-08 1998-07-08 Semiconductor element mounting structure Expired - Fee Related JP3502769B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19327398A JP3502769B2 (en) 1998-07-08 1998-07-08 Semiconductor element mounting structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19327398A JP3502769B2 (en) 1998-07-08 1998-07-08 Semiconductor element mounting structure

Publications (2)

Publication Number Publication Date
JP2000031312A true JP2000031312A (en) 2000-01-28
JP3502769B2 JP3502769B2 (en) 2004-03-02

Family

ID=16305206

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19327398A Expired - Fee Related JP3502769B2 (en) 1998-07-08 1998-07-08 Semiconductor element mounting structure

Country Status (1)

Country Link
JP (1) JP3502769B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016032097A (en) * 2014-07-25 2016-03-07 京セラサーキットソリューションズ株式会社 Wiring board
CN110610925A (en) * 2019-09-17 2019-12-24 苏州日月新半导体有限公司 Integrated circuit package and method of manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016032097A (en) * 2014-07-25 2016-03-07 京セラサーキットソリューションズ株式会社 Wiring board
CN110610925A (en) * 2019-09-17 2019-12-24 苏州日月新半导体有限公司 Integrated circuit package and method of manufacturing the same

Also Published As

Publication number Publication date
JP3502769B2 (en) 2004-03-02

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