JP3998562B2 - Semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device. In place In particular, the present invention relates to a technique that is effective when applied to transmission of high-frequency signals.
[0002]
[Prior art]
Conventionally, there is a structure that uses a coaxial cable as a high-speed signal transmission means, and in the PGA (Pin Grid Array) type semiconductor package (semiconductor device), signal transmission in the thickness direction between the component mounting surface and the back surface of the multilayer wiring board A coaxial cable is used as the route (see, for example, Patent Document 1).
[0003]
Some optical communication devices use coaxial cables (see, for example, Non-Patent Document 1).
[0004]
[Patent Document 1]
JP-A-5-167258 (FIG. 1)
[0005]
[Non-Patent Document 1]
Shoichi Hanatani, Katsuyoshi Karasawa, Kiyoshi Yamashita and Jun Maeda, "Characteristics of 565 Mb / s optical transmitter using DFB-LD", communication, optical and radio wave national convention, announced on September 3, 1986 (2 -Page 170, Fig. 2)
[0006]
[Problems to be solved by the invention]
Conventionally, input / output of signals to / from a semiconductor package is performed via “wiring”. However, as a semiconductor chip mounted on a semiconductor package operates in a high frequency region, there is a problem in that signal propagation efficiency is reduced and high frequency characteristics are deteriorated unless an appropriate wiring structure design is performed. ing.
[0007]
In addition, in a PGA type semiconductor package employing a coaxial cable, the core wire of the coaxial cable and the surface wiring of the multilayer wiring board are joined at a right angle, and the core wire and the surface wiring are connected in the direction in which the core wire extends. Since there is a large difference in cross-sectional area in the perpendicular direction, the signal is reflected at a location where the area of the joint between the core wire and the surface wiring has changed.
[0008]
As a result, there is a problem of deteriorating high frequency characteristics.
[0009]
Further, the present inventor, as a structure for realizing a high-frequency semiconductor device to which a coaxial cable is connected, connects an inner lead as an external connection terminal to a package substrate on which a high-frequency semiconductor chip is mounted. The structure in which the outer lead connected to the outer surface of the package substrate protrudes outward from the package substrate along the plane direction thereof was examined.
[0010]
However, in the structure in which the outer lead protrudes toward the outside of the substrate along the planar direction of the package substrate, there is a problem that the size cannot be reduced.
[0011]
An object of the present invention is to provide a semiconductor device that improves the quality of high-frequency characteristics. Place It is to provide.
[0012]
Another object of the present invention is to reduce the size of a semiconductor device. Place It is to provide.
[0013]
Furthermore, another object of the present invention is to reduce the thickness of a semiconductor device. Place It is to provide.
[0014]
Another object of the present invention is to reduce the cost of semiconductor devices. Place It is to provide.
[0015]
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.
[0016]
[Means for Solving the Problems]
Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
[0017]
That is, the present invention is directed to a wiring board having a surface layer wiring formed on a main surface, a semiconductor chip electrically connected to the wiring board using flip chip mounting, and opposite to the main surface of the wiring board. A plurality of external connection terminals provided in the back surface of the side, and a transmission line portion that is electrically connected to the surface layer wiring of the wiring board and made of a tape-shaped member. It is a semiconductor device that , Input of a high-frequency signal from a mounting substrate on which the semiconductor device is mounted and electrically connected to the semiconductor device via the external connection terminal, and a high-frequency signal from another semiconductor device mounted on the mounting substrate Input, high-frequency signal output to the mounting substrate, high-frequency signal output to the other semiconductor device At least one of the outputs Kaga Done via the transmission line section Be Is.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0019]
In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like.
[0020]
Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), particularly when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and it may be more or less than the specific number.
[0021]
Further, in the following embodiments, the constituent elements (including element steps) are not necessarily essential unless explicitly stated or considered to be clearly essential in principle. Needless to say.
[0022]
Similarly, in the following embodiments, when referring to the shape, positional relationship, etc., of components, etc., the shape of the component is substantially the case unless specifically stated or otherwise considered in principle. And the like are included. The same applies to the numerical values and ranges.
[0023]
Further, members having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.
[0024]
(Embodiment 1)
1 is a sectional view showing an example of the structure of a high-frequency package according to Embodiment 1 of the present invention, FIG. 2 is an external perspective view showing an example of the structure of an optical module in which the high-frequency package shown in FIG. 1 is incorporated, and FIG. 4 is a cross-sectional view showing the structure of the optical module shown in FIG. 2, FIG. 4 is a plan view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 2, and FIG. 5 shows the arrangement of components incorporated in the optical module shown in FIG. FIG. 6 is a sectional view showing a structure of a high-frequency package according to a modification, FIG. 7 is a partial plan view showing an example of the structure of a microstrip line in the wiring board of the high-frequency package shown in FIG. 1, and FIG. FIG. 9 is a partial cross-sectional view showing the structure of the microstrip line shown in FIG. 7, and FIG. 9 is a partial plan view showing the structure of the microstrip line as a modification of the wiring board of the high-frequency package shown in FIG. 10 is a partial cross-sectional view showing the structure of the microstrip line of the modification shown in FIG. 9, FIG. 11 is a perspective view and a cross-sectional view showing the structure of the high-frequency package of the modification, and FIG. 12 is a cap of the high-frequency package shown in FIG. FIG. 13 is a plan view of the cap mounting structure shown in FIG. 12, FIG. 14 is a cross-sectional view taken along line AA in FIG. 13, and FIG. 15 is a cap mounting shown in FIG. FIG. 16 is a plan view showing an example of the positional relationship between the surface layer wiring and the cap in the cap mounting structure shown in FIG. 12, and FIG. 17 is a bottom view showing the structure of the cap as viewed from the arrow C in FIG. 18 is a side view showing the structure of the cap shown in FIG. 17, FIG. 19 is a sectional view showing the structure of the cap shown in FIG. 17, an enlarged partial sectional view of the corner, and FIG. 20 is taken along the line AA in FIG. Enlarged partial cut 21 is an enlarged partial cross-sectional view taken along the line BB in FIG. 13. FIG. 22 is an enlarged partial plan view showing an example of the positional relationship between the surface wiring and the cap opening in the cap mounting structure shown in FIG. FIG. 23 is a cross-sectional view showing the structure of a high-frequency package of a modification, FIG. 24 is an enlarged partial cross-sectional view showing an example of a structure in which a heat dissipation member is attached to the cap shown in FIG. 12, and FIGS. 28 is a cross-sectional view showing the structure of the high-frequency package of the modification, FIG. 28 is a plan view showing the structure of the high-frequency package of the modification of the first embodiment, FIG. 29 is a cross-sectional view of the high-frequency package shown in FIG. 31 and 32 are plan views showing the structure of a high-frequency package according to a modification of the first embodiment of the present invention, FIG. 33 is a plan view showing the structure of a high-frequency package according to a modification of the first embodiment, and FIG. 4 is a cross-sectional view of the high-frequency package shown in FIG. 33, FIG. 35 is a plan view showing the structure of a high-frequency package according to a modification of the first embodiment, FIG. 36 is a cross-sectional view of the high-frequency package shown in FIG. FIG. 38 is a cross-sectional view of the high-frequency package shown in FIG. 37. FIG.
[0025]
The semiconductor device according to the first embodiment shown in FIG. 1 is a semiconductor package on which an optical communication IC (Integrated Circuit) is mounted. For example, the semiconductor device is a high-frequency package 1 capable of high-speed transmission at 40 Gbps. The high-frequency package 1 is mounted on the optical module (electronic device such as a semiconductor module device) 14 shown in FIGS. 2 and 3 and has a coaxial cable 7 for signal transmission on the high-frequency side.
[0026]
Here, the coaxial cable 7 of the first embodiment is an example of a transmission line. The transmission line is a wiring path for transmitting high-frequency power such as a coaxial cable 7, a microstrip line, and a feeder cable. General wiring is a line for transmitting power regardless of high and low frequencies, and the input and output sections are electrically connected, but the characteristics when power is transmitted are taken into account. Not necessarily. Therefore, there are cases where low frequency power is transmitted but high frequency power is not transmitted (output is zero).
[0027]
On the other hand, the transmission line has a wiring shape and the shape and arrangement of the surrounding conductors including the wiring so that the power can be efficiently attenuated or reflected without causing a significant decrease in output. This line is designed for insulating layer material, insulating layer thickness and structure.
[0028]
The configuration of the high-frequency package 1 according to the first embodiment includes a signal surface layer wiring (surface layer wiring) 4c and a GND layer (ground conductor layer) 4f formed inside through the signal surface layer wiring 4c and the insulating layer 4e. A package substrate (wiring substrate) 4 which is a chip carrier having a microstrip line 4g, and a main surface 4a of the package substrate 4 electrically connected by flip chip connection via a plurality of solder bump electrodes 5. The high frequency semiconductor chip 2, the coaxial cable 7 in which the core wire 7a is electrically connected to the signal surface layer wiring 4c, and the main surface 2a of the semiconductor chip 2 and the main surface 4a of the package substrate 4 are poured. Underfill resin 6 that protects the flip chip connecting portion and a plurality of external connection terminals arranged in back surface 4b opposite to main surface 4a of package substrate 4 Consisting of a ball electrode 3.
[0029]
In other words, the high-frequency package 1 is for directly inputting a high-frequency (for example, 40 Gbps) signal from the coaxial cable 7 to the semiconductor chip 2 through the solder bump electrode 5 via the signal surface wiring 4c of the package substrate 4. The high frequency signal can be transmitted only by the microstrip line on the surface layer of the package substrate 4.
[0030]
Therefore, a high frequency signal can be transmitted without losing frequency characteristics by transmitting the high frequency signal only through the microstrip line on the surface layer of the package substrate 4 without using vias or the like.
[0031]
That is, a via (including a through hole) is not a transmission line but a wiring. In order to achieve efficient transmission of power in the transmission line, design is performed using parameters such as wiring width, interlayer insulating film thickness, space with adjacent patterns, and material property values so that the characteristic impedance becomes a desired value. Do. However, in the via portion, the via pattern and the conductor between the layers are perpendicular to each other, and it is difficult to form a coaxial structure, so that it is difficult to design to obtain a desired characteristic impedance. Therefore, power loss is likely to occur in the via portion.
[0032]
For these reasons, in the technique of connecting the vicinity of the connection portion between the core wire of the coaxial cable and the bump pad described in JP-A-5-167258 as the via shape, mismatching in characteristic impedance occurs in the connection portion. Furthermore, when trying to embed the coaxial cable in the thickness direction in the board, a hole is formed in the board with a drill or the like, the coaxial cable is inserted into the hole for positioning, and the bump pad and the core wire are connected. It seems that a manufacturing process such as filling holes is necessary. This structure increases the number of processes compared to a general wiring board manufacturing process, and involves a difficult technique of cable connection / embedding, leading to an increase in cost.
[0033]
On the other hand, in the first embodiment, since the wiring board can be manufactured by the existing technology, the cost is not increased.
[0034]
Note that the surface layer wirings such as the signal surface layer wiring 4c and the GND surface layer wiring 4h according to the first embodiment are formed of, for example, copper and are the wirings arranged on the uppermost layer on the main surface 4a side of the package substrate 4. That is, it may be exposed on the surface of the main surface 4a, or may be coated with a non-conductive thin film.
[0035]
In addition, when high-speed transmission such as 40 Gbps is performed, it is preferable that the signal surface wiring 4c of the microstrip line 4g be shortest. Therefore, among the plurality of solder bump electrodes 5 connected to the semiconductor chip 2 of the package substrate 4, the solder bump electrode 5 disposed closer to the coaxial cable 7 (coaxial connector 11) from the center of the semiconductor chip 2 is connected to the signal surface wiring 4c. Connected with.
[0036]
Preferably, among the plurality of solder bump electrodes 5, any one of the solder bump electrodes 5 arranged on the outermost periphery is connected to the signal surface wiring 4c.
[0037]
As a result, high-speed signal transmission can be realized while minimizing the loss of high-frequency frequency characteristics, and noise can be reduced on the microstrip line 4g, so that deterioration of high-frequency characteristics can also be suppressed.
[0038]
In the high frequency package 1, a plurality of ball electrodes (bump electrodes) 3 provided as external connection terminals are arranged in an array on the back surface 4 b of the package substrate 4. Therefore, the high frequency package 1 includes a ball grid array. Type semiconductor package.
[0039]
As a result, the package can be reduced in size as compared with the outer lead protruding high frequency package in which the outer lead protrudes outward from the package substrate 4.
[0040]
The microstrip line 4g transmits a high-frequency signal as an electromagnetic wave in the insulating layer 4e between the signal surface wiring 4c and the internal GND layer 4f. However, in the surface layer of the package substrate 4, FIG. As shown, a microstrip line 4g is formed also with a GND surface layer wiring (grounding surface layer wiring) 4h disposed on both sides of the signal surface layer wiring 4c via an insulating portion.
[0041]
In the high-frequency package 1, a frame member 8 is attached to the package substrate 4 along the outer peripheral portion thereof, and a coaxial connector (relay member) 11 that fits with the coaxial cable 7 is attached to the frame member 8 together with the glass beads 12. Is provided. Therefore, the coaxial cable 7 is fitted into the coaxial connector 11, the core wire 7 a of the coaxial cable 7 is connected to the core wire 12 a of the glass bead 12, and the core wire 12 a is soldered to the signal surface wiring 4 c of the package substrate 4 31. (It may be connected by a conductive resin or the like).
[0042]
The diameter of the coaxial connector 11 is, for example, about 10 mm.
[0043]
The package substrate 4 is a substrate formed of, for example, glass-containing ceramic, and has a thickness of, for example, about 1 mm. Inside the package substrate 4, in addition to the GND layer 4 f, solder for flip chip connection is provided. An internal signal wiring 4d which is a signal line for connecting the bump electrode 5 and the ball electrode 3 which is an external connection terminal corresponding to the bump electrode 5 is formed.
[0044]
The high-frequency package 1 having such a structure is incorporated in an optical module (semiconductor module device) 14 as shown in FIG. 2 and mounted on the module substrate (relay member) 13.
[0045]
Here, the structure of the optical module 14 will be described.
[0046]
The optical module 14 shown in FIG. 2 to FIG. 5 is a module for high-speed optical communication, for example, a module product mounted on a communication system device of a communication network base station.
[0047]
As shown in FIG. 2, the size of the optical module 14 according to the first embodiment is, for example, L (100 to 200 mm) × M (60 to 150 mm), and as shown in FIG. Although (T) is 10 to 25 mm, the size and height of the optical module 14 are not limited to these numerical values.
[0048]
The high-frequency package 1 according to the first embodiment is mounted on the module substrate 13 of the optical module 14 and is covered with the module case 15 together with the module substrate 13. A plurality of fins 16 are formed side by side on the surface of the module case 15, and the heat dissipation of the optical module 14 can be improved when the fins 16 receive the wind 18.
[0049]
The external terminal of the optical module 14 is a module connector 17 attached to the module substrate 13, and a part thereof is exposed on the back side of the module case 15.
[0050]
As shown in FIGS. 4 and 5, in the optical module 14, a high-frequency optical signal input from the input is converted into an electric signal by the photoelectric converter 20, and this electric signal is further input to the input side via the amplifier element 19. 1 enters the high frequency semiconductor chip 2 through the microstrip line 4g of the package substrate 4 and then changes to a low frequency signal so that the internal signal wiring 4d, the solder bump electrode 5, the module substrate 13 and the module substrate 13 shown in FIG. It is sent to the outside of the optical module 14 through the module connector 17.
[0051]
On the other hand, a signal input from the module connector 17 side is sent as an output through the reverse path.
[0052]
FIG. 4 shows a case where two high-frequency semiconductor chips 2 are provided on the input side and the output side, but the input side and the output side may be incorporated in one semiconductor chip 2. Is possible.
[0053]
In FIG. 4, arrows indicated by solid lines in the arrows indicating the flow of input and output signals indicate transmission of optical signals through the optical fiber, and arrows indicated by dotted lines indicate the coaxial cable 7 or the microstrip line. The transmission of the electric signal by 4g is shown.
[0054]
Next, FIG. 6 shows a modification of the high-frequency package 1 in which the core wire 7a of the coaxial cable 7 is directly connected to the signal surface wiring 4c of the package substrate 4 by solder or the like.
[0055]
That is, the coaxial cable 7 is directly attached to the package substrate 4 with solder or the like without using the coaxial connector 11.
[0056]
In this case, the step 4k for arranging the coaxial cable 7 is provided at the end of the package substrate 4, and the surface wiring 4h for GND is provided on the surface of the step 4k, and the coaxial cable 7 is arranged at the step 4k. A shield (GND) 7b covering the core wire 7a of the cable 7 and the GND surface layer wiring 4h at the step 4k are electrically connected by soldering or the like.
[0057]
By directly attaching the coaxial cable 7 to the package substrate 4 in this manner, the high-frequency package 1 can be reduced in thickness because the expensive and relatively large coaxial connector 11 is not used. Cost can be reduced.
[0058]
Next, a preferable shape of the inner GND layer 4f in the package substrate 4 will be described with reference to FIGS.
[0059]
7 and 8 show a case where the GND layer 4f inside the substrate extends to the end of the package substrate 4 in the microstrip line structure 21 using the microstrip line 4g. This is a case where the structure 22 is connected to the microstrip line structure 21.
[0060]
In this case, input / output high-speed signals to / from the outside of the package pass through the paths of the coaxial cable 7, the signal surface wiring 4 c of the package substrate 4, and the semiconductor chip 2. At this time, the core wire 7 a of the coaxial cable 7 is connected to the signal surface wiring 4 c of the package substrate 4, and the shield 7 b that is the GND of the coaxial cable 7 is connected to the GND surface wiring 4 h of the package substrate 4. Yes.
[0061]
Further, a frame member 8 for supporting the coaxial cable 7 may be fixed on the package substrate 4, and the frame member 8 and the shield 7 b of the coaxial cable 7 or the GND surface layer wiring 4 h of the package substrate 4 may be provided. May be connected. As shown in FIG. 8, the GND surface layer wiring 4h and the inner GND layer 4f are connected by a via wiring 4i.
[0062]
Therefore, in order to make the signal surface wiring 4c on the package substrate 4 the microstrip line structure 21 in all regions so as to reduce the L (inductance) of the GND, the GND layer 4f is exposed at the end of the substrate. A via wiring 4i is formed at the end of the substrate to be connected to the shield 7b of the coaxial cable 7 or the GND of the frame member 8 or to connect the GND surface layer wiring 4h and the inner GND layer 4f. 4i must be cut and exposed and connected to the GND of the coaxial cable 7 or the frame member 8.
[0063]
However, these technologies require high accuracy for positioning the surface layer / inner layer wiring of the package substrate 4, and when using a sticky material such as Cu for the wiring, it may lead to the sagging of the wiring, There is concern over manufacturing difficulties.
[0064]
On the other hand, in the structure shown in FIG. 9 and FIG. 10, the signal surface layer wiring 4c and the GND surface layer wiring 4h are arranged in the region between the outermost via wiring 4i and the coaxial cable 7 among the plurality of via wirings 4i. Are arranged on the same plane (main surface 4a), and the coaxial cable 7 and the microstrip line 4g of the package substrate 4 are connected via the coplanar line 23a.
[0065]
That is, a region outside the outermost via wiring 4i near the end of the package substrate 4 is the coplanar structure 23, and the coaxial structure 22, the coplanar structure 23, and the microstrip line structure 21 are connected. .
[0066]
Thereby, the inductance of GND can be reduced.
[0067]
Further, for characteristic impedance matching in the area of the coplanar structure 23, the distance between the signal surface wiring 4c and the GND surface wiring 4h is made closer as shown in FIG. Note that the positional deviation accuracy between the via wiring 4i and the inner GND layer 4f is equal to the conventional one (for example, about 50 μm), and a new technique is not required, so that an increase in cost can be prevented.
[0068]
Therefore, by connecting the coaxial structure 22, the coplanar structure 23, and the microstrip line structure 21, it is possible to reduce the loss of the high-frequency signal and bring the characteristic impedance of the high-speed signal path close to the target value.
[0069]
Furthermore, the characteristic impedance can be made closer to the target value by reducing the distance between the signal surface wiring 4c and the GND surface wiring 4h.
[0070]
As a result, it is possible to suppress the deterioration of the high-speed signal characteristics, and to improve the electrical characteristics of the high-frequency package 1 without increasing the cost.
[0071]
Next, the high frequency package 1 of the modification shown in FIG. 11 will be described.
[0072]
The high-frequency package 1 shown in FIG. 11 uses a thin coaxial connector 24 that is a plate-like member as a relay member between the coaxial cable 7 and the microstrip line 4g of the package substrate 4.
[0073]
The thin coaxial connector 24 has a microstrip line 24c composed of a signal surface layer wiring (surface layer wiring) 24a and a GND line (ground wiring) 24b formed on both sides of the signal line wiring 24a through insulating portions. In the high frequency package 1, the signal surface wiring 24 a of the microstrip line 4 g of the package substrate 4 and the core wire 7 a of the coaxial cable 7 are electrically connected via the signal surface wiring 24 a of the microstrip line 24 c of the thin coaxial connector 24. Has been.
[0074]
That is, a signal surface layer wiring 24a is provided on the upper surface of a thin ceramic plate or the like provided with a step 24d, and GND lines 24b are provided on both sides thereof, and only the GND line 24b is provided on the lower stage, and the upper and lower GND lines are provided. 24b are connected by a surface or an inner layer via.
[0075]
Then, the coaxial cable 7 is mounted on the lower stage, the core wire 7a at the tip is placed on the upper signal surface wiring 24a, the shield 7b of the coaxial cable 7 and the upper and lower GND lines 24b of the ceramic plate are connected with solder or the like, Further, the core wire 7a of the coaxial cable 7 and the upper signal surface wiring 24a are similarly connected with solder or the like.
[0076]
Thereafter, the surface layer wiring of the ceramic plate and the surface layer wiring of the package substrate 4 are opposed to each other, and the mutual wiring is connected by solder or conductive resin. Alternatively, gold (Au) -gold (Au) crimp connection may be performed, or the ceramic plate and the package substrate 4 may be closely fixed.
[0077]
As described above, by using the thin coaxial connector 24 which is a plate member as the relay member, the high-frequency package 1 can be thinned.
[0078]
Furthermore, handling of the coaxial cable 7 becomes easy and connector repair becomes possible. Further, the thin coaxial connector 24 may be attached to both ends of the coaxial cable 7, or one end may be the thin coaxial connector 24 and the other end may be the coaxial connector 11 as shown in FIG. It is possible to attach connectors having different shapes to the connector 7. Alternatively, one end may be a thin coaxial connector 24 and the other end may be exposed at the cable end.
[0079]
The coaxial cable 7 to which the thin coaxial connector 24 is attached can be supplied only by the coaxial cable 7, or can be supplied as the high frequency package 1 to which the thin coaxial connector 24 is attached as shown in FIG. Good.
[0080]
Next, a high-frequency package 1 of a modification shown in FIG. 12 will be described.
[0081]
First, in the high-frequency package 1 shown in FIG. 12, among the ball electrodes 3 of the plurality of external connection terminals, support balls 3a are provided at the four outermost corners as shown in FIG.
[0082]
This is because the weight of the coaxial connector 11 is heavy, so that when the high-frequency package 1 is mounted on a mounting substrate such as the module substrate 13, the ball electrode 3 is crushed and an electrical short occurs between adjacent ball electrodes 3. Since the support balls 3a are provided at the four corners on the outermost periphery, when the ball electrodes 3 are melted, the corner support balls 3a support the package substrate 4 and the ball electrodes 3 are crushed. It is possible to prevent the occurrence of an electrical short due to.
[0083]
The support ball 3a is formed of, for example, high melting point solder, resin or ceramic.
[0084]
In addition, the high-frequency package 1 shown in FIG. 12 has a cap 9 as a heat radiating member attached to a back surface 2 b opposite to the main surface 2 a of the semiconductor chip 2 via a heat conductive adhesive 10.
[0085]
That is, since the high-frequency semiconductor chip 2 may generate high heat when driven, the heat dissipation of the semiconductor chip 2 can be improved by attaching a heat-dissipating cap 9 or a heat diffusion plate or a heat-dissipating fin to the back surface 2b. In addition, the heat dissipation of the high-frequency package 1 can be improved and the deterioration of electrical characteristics can be prevented.
[0086]
Here, the arrangement position of the cap 9 with respect to the package substrate 4 will be described. As shown in FIGS. 12 to 14, the cap 9 is attached to the back surface 2 b of the semiconductor chip 2 with a heat conductive adhesive 10 or the like so as to cover the semiconductor chip 2. As shown in FIG. 4, it is preferable that the wiring is disposed also on the surface wiring (microstrip line 4g) such as the signal surface wiring 4c and the GND surface wiring 4h.
[0087]
That is, it is preferable that the cap 9 covers the microstrip line 4g so that the surface microstrip line 4g does not receive noise due to external electromagnetic waves or the like.
[0088]
Therefore, it is preferable to cover the semiconductor chip 2 and the surface layer wiring to some extent so as to prevent the entry of electromagnetic waves from the outside. However, the cap 9 and the surface layer wirings such as the signal surface layer wiring 4c and the GND surface layer wiring 4h must be insulated.
[0089]
In view of this, in the package substrate 4 of the first embodiment, as shown in FIG. 17, an opening (a meat escape portion) 9 a is formed in the leg 9 b on the surface layer wiring of the cap 9, and the leg of the cap 9 The cap shape is such that 9b does not come into contact with the surface wiring.
[0090]
20 and 22 show details of the positional relationship between the opening 9a of the leg 9b of the cap 9, and the signal surface wiring 4c and the GND surface wiring 4h of the package substrate 4. FIG. That is, the leg portion 9b of the cap 9 opens as an opening portion 9a up to the outer side of the both sides of the GND surface layer wiring 4h so as not to contact the signal surface layer wiring 4c and the GND surface layer wiring 4h.
[0091]
Further, the portions other than the connection area of the signal surface wiring 4c, which is the surface wiring of the package substrate 4, with the coaxial cable 7 are insulating thin films (non-conductive thin films) made of resin or the like as shown in FIG. It is covered with a certain solder resist 4j (the same applies to the GND surface layer wiring 4h). The solder resist 4j has an insulating function and also has a function of preventing a solder flow for the solder connection 31 of the coaxial cable 7.
[0092]
Therefore, since the opening 9a that is the flare escape portion of the cap 9 and the solder resist 4j that is an insulating thin film are formed on the surface layer wiring, it is possible to prevent the surface layer wiring and the cap 9 from contacting each other.
[0093]
Note that, as shown in FIGS. 17 and 18, the cap 9 is formed with a cutout portion 9 c that is a flesh escape portion that does not come into contact with the surface layer wiring at corners and side portions.
[0094]
Further, since the cap 9 also needs a shielding effect, as shown in FIG. 19, the entire surface of the base material 9d made of a copper alloy or the like is covered with a chromium-based conductive film 9e, and only the outer surface thereof is covered. However, it is covered with a non-conductive film 9f so as to prevent an electrical short circuit with other components.
[0095]
Such a cap 9 is attached to the same layer as the signal surface wiring 4c and the GND surface wiring 4h formed on the main surface 4a of the package substrate 4 as shown in FIGS. Note that the base electrode layer of the solder bump electrode 5 is the same layer.
[0096]
Further, in the portion where the opening portion 9a of the leg portion 9b of the cap 9 is not formed, the leg portion 9b is placed inside the package substrate 4 through the conductive material 25 in order to enhance the shielding effect as shown in FIG. The power supply (or the GND layer 4f) is connected via the via wiring 4i, and the cap 9 itself is electrically connected to the power supply layer (or the GND layer 4f and the GND surface wiring 4h) inside the package substrate 4. Yes.
[0097]
As a result, the periphery of the solder bump electrode 5 for the high frequency signal is surrounded by the GND potential, and the shielding effect by the cap 9 can be enhanced.
[0098]
Further, as shown in FIG. 22, the solder bump electrode 5 connected to the solder bump electrode 5 of the high frequency signal, that is, the signal surface layer wiring 4c, is disposed at substantially the center of the side of the outermost solder bump electrode 5 row. The solder bump electrode 5 is preferably used, and the coaxial connector 11 connected to the solder bump electrode 5 via the signal surface wiring 4c is also preferably arranged at a substantially central portion of the side.
[0099]
As a result, the microstrip line 4g can be shortened, high-speed signal transmission can be realized with the loss of high frequency characteristics minimized, and noise on the microstrip line 4g can be reduced.
[0100]
Next, the high-frequency package 1 of the modification shown in FIG. 23 has a structure in which a cap 9 is attached to the high-frequency package 1 using the thin coaxial connector 24 shown in FIG. 11, and the high-frequency package 1 shown in FIG. For example, both the thinning and heat dissipation of the high-frequency package 1 can be improved.
[0101]
Further, in the high-frequency package 1 of the modification shown in FIG. 24, a heat dissipation block (heat dissipation member) 26 is further attached to the surface of the cap 9 attached to the back surface 2b of the semiconductor chip 2 via the heat conductive adhesive 10. Therefore, the heat dissipation of the high-frequency package 1 can be further improved.
[0102]
25 shows a structure in which a second semiconductor chip 27 is further mounted on the package substrate 4 in addition to the semiconductor chip 2, and a cap 9 that covers both chips is provided. It is attached.
[0103]
Here, a signal is input from the semiconductor chip 2 connected to the coaxial cable 7 via the surface microstrip line 4g to the second semiconductor chip 27 via the internal signal wiring 4d of the package substrate 4, and A signal is transmitted from the solder bump electrode 5 of the second semiconductor chip 27 to the ball electrode 3 which is an external connection terminal via the internal signal wiring 4d.
[0104]
In addition, the high-frequency package 1 of the modified example shown in FIGS. 26 and 27 is one in which a balancer 28 is attached to the frame member 8. The balancer 28 functions to adjust the center of gravity of the package so that the high frequency package 1 does not tilt when the high frequency package 1 is mounted on the board.
[0105]
FIG. 26 shows the balancer 28 fixed to the frame member 8 via the screw member 29. FIG. 27 shows a groove formed in the balancer 28 and this groove is fitted to the frame member 8 so that the balancer 28 is fitted. The frame member 8 is attached.
[0106]
26 and 27, the center of gravity of the package is adjusted by the balancer 28 so that the high-frequency package 1 does not tilt when the board is mounted.
[0107]
Next, arrangement positions of the package substrate 4 and the semiconductor chip 2 will be described.
[0108]
In the high frequency package 1, the semiconductor chip 2 is preferably arranged on the package substrate 4 in a region as close to the coaxial cable 7 as possible.
[0109]
That is, when a high-frequency signal is transmitted from the coaxial cable 7 to the semiconductor chip 2 via the microstrip line 4g on the surface layer of the package substrate 4, if the path of the microstrip line 4g is long, noise is applied and the high-frequency characteristics are degraded. Therefore, in order to prevent this, it is preferable to dispose the semiconductor chip 2 so as to be offset from the central portion of the package substrate 4 closer to the coaxial cable 7, and as close to the coaxial cable 7 as possible.
[0110]
Thereby, the length of the microstrip line 4g can be shortened, and it is possible to prevent the high frequency characteristics from being deteriorated due to noise.
[0111]
The high-frequency package 1 shown in FIG. 13 is a case where one semiconductor chip 2 is mounted on a package substrate 4, and the semiconductor chip 2 is disposed closer to the coaxial connector 11 than the central portion of the package substrate 4. By fitting the coaxial cable 7 to the connector 11, the semiconductor chip 2 is arranged closer to the coaxial cable 7 than the central portion.
[0112]
28 and 29 show a case where the high-frequency semiconductor chip 2 and the low-frequency second semiconductor chip 27 are mounted on the package substrate 4. The high-frequency semiconductor chip 2 is coaxial from the center of the package substrate 4. It is arranged closer to the connector 11, is located closer to the coaxial connector 11 than the low-frequency second semiconductor chip 27, and two coaxial connectors 11 are attached correspondingly to one semiconductor chip 2. It is what has been.
[0113]
FIG. 30 is a modified example of the structure of FIG. 28, in which the arrangement combination of the two coaxial connectors 11 is changed.
[0114]
FIGS. 31 and 32 each show a case where one semiconductor chip 2 is mounted on the package substrate 4, and FIG. 31 shows a case where two coaxial connectors 11 are provided on the same side. Is disposed closer to the coaxial connector 11 than the central portion.
[0115]
Also in FIG. 32, the semiconductor chip 2 is arranged closer to the coaxial connector 11 than the center portion, but the two coaxial connectors 11 are arranged symmetrically facing two opposite sides.
[0116]
In the high-frequency package 1 shown in FIGS. 33 and 34, one semiconductor chip 2 is disposed closer to the coaxial connector 11 than the central portion, and the coaxial connector 11 is provided on the nearest side correspondingly. Further, a plurality of chip capacitors 30 are mounted around the semiconductor chip 2 on the main surface 4 a of the package substrate 4.
[0117]
That is, since the semiconductor chip 2 is arranged closer to the coaxial connector 11 than the center portion, a plurality of chip capacitors 30 and the like can be mounted in an empty space on the opposite side of the semiconductor chip 2.
[0118]
On the other hand, in the high frequency package 1 shown in FIGS. 35 and 36, one semiconductor chip 2 is disposed closer to the coaxial connector 11 than the central portion, and a plurality of chip-corresponding regions on the back surface 4 b of the package substrate 4 are provided. In the high-frequency package 1 shown in FIGS. 37 and 38, one semiconductor chip 2 is disposed closer to the coaxial connector 11 than the center portion and the package substrate 4 is mounted. A plurality of chip capacitors 30 are mounted in a recess 41 that is a cavity formed in the chip corresponding area of the back surface 4b.
[0119]
Any high frequency package 1 shown in FIGS. 28 to 38 can be reduced in size, thickness, and cost.
[0120]
(Embodiment 2)
39 is a cross-sectional view showing the structure of the semiconductor device (high-frequency package) according to the second embodiment of the present invention. FIGS. 40 and 41 are cross-sectional views showing the structure of a high-frequency package according to a modification of the second embodiment of the present invention. 42 is a cross-sectional view showing an example of a cap mounting state in the assembly of the high-frequency package shown in FIG. 41, and FIG. 43 is a partial cross-sectional view showing an example of the connection state of the auxiliary board and the coaxial cable in the assembly of the high-frequency package shown in FIG. 44 is a partial cross-sectional view showing an example of a testing state in the assembly of the high-frequency package shown in FIG. 41, and FIG. 45 is a partial cross-sectional view showing an example of the structure after the assembly of the high-frequency package shown in FIG.
[0121]
The semiconductor device shown in FIG. 39 of the second embodiment is a high-frequency semiconductor package for optical communication having a coaxial cable 7 as in the high-frequency package 1 of the first embodiment. The coaxial cable 7 is not attached via the coaxial connector 11, or the coaxial cable 7 is directly attached to the package substrate 4 which is a chip carrier. Instead, the coaxial cable 7 is an optical module 14 shown in FIG. The module substrate 13 is connected to the module substrate 13 of the (semiconductor module device), and the module substrate 13 is connected to the package substrate 4 via a protruding electrode.
[0122]
Therefore, the module substrate 13 is used as a relay member for transmitting a high-frequency signal from the coaxial cable 7 to the package substrate 4, and the signal substrate surface wiring is also provided on the surface of the main surface 13a of the module substrate 13. A microstrip line 13g including a (surface layer wiring) 13c and a GND layer (ground conductor layer) 13f formed inside through the signal surface layer wiring 13c and the insulating layer 13e is formed.
[0123]
Therefore, the signal surface wiring 4c of the microstrip line 4g of the package substrate 4 and the core wire 7a of the coaxial cable 7 are connected via the signal surface wiring 13c of the microstrip line 13g of the module substrate 13.
[0124]
That is, since the thin ball electrode 34 which is an external connection terminal is formed on the main surface 4a on the flip chip connection side of the package substrate 4, the main surface 4a of the package substrate 4 and the main surface 13a of the module substrate 13 are opposed to each other. Thus, the signal surface wiring 4c of the package substrate 4 and the signal surface wiring 13c of the module substrate 13 can be connected via the thin ball electrode 34 made of solder or the like. The microstrip line 4 g of the package substrate 4 and the microstrip line 13 g of the module substrate 13 are connected via the thin ball electrode 34.
[0125]
Accordingly, the high-frequency package 1 of the second embodiment also directly receives a high-frequency (for example, 40 Gbps) signal from the coaxial cable 7 through the signal surface wiring 13c of the module substrate 13 and the thin ball electrode 34 and directly into the semiconductor chip 2. The high-frequency signal can be transmitted through the module substrate 13 only through the microstrip line on the surface layer of the package substrate 4.
[0126]
Thus, as with the high frequency package 1 of the first embodiment, the high frequency signal is transmitted only through the microstrip lines on the surface layer of the module substrate 13 and the package substrate 4 without via vias and the like, thereby improving the frequency characteristics. High frequency signals can be transmitted without loss.
[0127]
The low-frequency signal is sent to the outside through the internal signal wiring 4 d of the package substrate 4, the thin ball electrode 34, and the internal signal wiring 13 d of the module substrate 13.
[0128]
Further, the semiconductor chip 2 is disposed in the opening 13h of the module substrate 13 in a state of being flip-chip connected to the package substrate 4, and further, a heat dissipation block is provided on the back surface 2b of the semiconductor chip 2 via a heat conductive adhesive 10. A (heat radiating member) 26 is attached, and therefore, the heat radiating block 26 is disposed on the back surface 13 b side of the module substrate 13.
[0129]
In the high frequency package 1 of the second embodiment, the module substrate 13 is interposed between the coaxial cable 7 and the package substrate 4 without directly attaching the coaxial cable 7 to the package substrate 4. A structure in which the semiconductor chip 2 is flip-chip connected to the package substrate 4 can be handled as a product.
[0130]
In this case, the coaxial cable 7 is connected to the module substrate 13 on the user side, and the package substrate 4 and the module substrate 13 are connected on the user side via the thin ball electrode 34 to assemble the high-frequency package 1. .
[0131]
Thus, in the high-frequency package 1 using the module substrate 13 as a relay member, the package substrate 4 on which the semiconductor chip 2 is mounted and the module substrate 13 to which the coaxial cable 7 is connected are assembled separately and then both are connected. , Each yield can be carved out.
[0132]
That is, the yield risk can be divided between the assembly of the semiconductor chip 2 and the assembly of the coaxial cable 7, and the yield of the structure after connecting both assemblies can be improved.
[0133]
Moreover, in the high frequency package 1 using the module substrate 13, since the expensive coaxial connector 11 is not used, the cost of the high frequency package 1 can be reduced and the thickness can be reduced.
[0134]
Further, since all the external connection terminals are provided on the main surface 4a on the flip chip connection side of the package substrate 4, a selection test can be easily performed when selecting the high-frequency semiconductor chip 2 of 40 Gbps. .
[0135]
That is, since all external connection terminals of high frequency and low frequency are provided on one surface (main surface 4a) of the package substrate 4, it is easy to contact the probe needle during the sorting test, and it is complicated. The test can be performed without using a jig having a simple shape.
[0136]
As a result, the test time can be shortened.
[0137]
40, the cap 9 is first attached to the back surface 2b of the semiconductor chip 2 via the heat conductive adhesive 10, and the surface of the cap 9 is further bonded to the heat conductive adhesive. A heat dissipation block 26 is attached via the agent 10.
[0138]
In this case, the cap 9 is formed with an opening (a meat escape portion) 9a that insulates the cap 9 from the surface layer wiring such as the signal surface wiring 4c.
[0139]
Furthermore, in the high frequency package 1 shown in FIG. 40, not only the cap 9 but also the heat dissipation block 26 is provided on the cap 9, so that the heat dissipation of the high frequency package 1 can be further improved and the deterioration of the high frequency characteristics is prevented. be able to.
[0140]
Next, the high-frequency package 1 of the modification shown in FIG. 41 is the case where the relay member that connects the coaxial cable 7 and the signal surface wiring 4c of the package substrate 4 is the auxiliary substrate 32 that is the second package substrate, The auxiliary substrate 32 has a signal surface layer wiring (surface layer wiring) 32c on the surface layer of the main surface 32a, and a GND layer (grounding conductor layer) formed inside through the signal surface layer wiring 32c and the insulating layer 32e. ) 32f is formed as a microstrip line 32g.
[0141]
Therefore, the signal surface wiring 4c of the microstrip line 4g of the package substrate 4 and the core wire 7a of the coaxial cable 7 are connected via the signal surface wiring 32c of the microstrip line 32g of the auxiliary substrate 32.
[0142]
That is, the thin ball electrode 34 as an external connection terminal is formed on the main surface 4a on the flip chip connection side of the package substrate 4, and the main surface 4a of the package substrate 4 and the main surface 32a of the auxiliary substrate 32 are opposed to each other. Accordingly, the signal surface wiring 4c of the package substrate 4 and the signal surface wiring 32c of the auxiliary substrate 32 can be connected via the thin ball electrode 34 made of solder or the like. The microstrip line 4 g of the package substrate 4 and the microstrip line 32 g of the auxiliary substrate 32 are connected via the ball electrode 34.
[0143]
Therefore, the high-frequency package 1 of the modified example shown in FIG. 41 also uses a semiconductor device that directly receives a high-frequency (for example, 40 Gbps) signal from the coaxial cable 7 via the signal surface wiring 32c of the auxiliary substrate 32 and the thin ball electrode 34. A high-frequency signal can be transferred to the chip 2 through the auxiliary substrate 32 and can be transmitted only through the microstrip line on the surface layer of the package substrate 4.
[0144]
Thus, similar to the high frequency package 1 of the first embodiment, the high frequency signal is transmitted only by the microstrip line on the surface layer of the auxiliary substrate 32 and the package substrate 4 without via vias and the like, so that the frequency characteristics are improved. High frequency signals can be transmitted without loss.
[0145]
The signal on the low frequency side passes through the internal signal wiring 4d of the package substrate 4, the thin ball electrode 34, the internal signal wiring 32d of the auxiliary substrate 32, and the pin member (connection terminal) 33. Is transmitted to the module substrate 13 or the like.
[0146]
In addition, the semiconductor chip 2 is disposed in the opening 32 h of the auxiliary substrate 32 in a state of being flip-chip connected to the package substrate 4, and the cap 9 is disposed on the back surface 2 b of the semiconductor chip 2 via the heat conductive adhesive 10. Further, a heat radiating block (heat radiating member) 26 is attached to the surface of the cap 9. Therefore, the heat radiating block 26 is disposed on the back surface 32 b side of the auxiliary substrate 32.
[0147]
In the high-frequency package 1 according to the second embodiment, the components on the coaxial cable 7 side and the components on the semiconductor chip 2 side are separately selected, and non-defective products are connected to each other, thereby improving the yield as the high-frequency package 1. Can be achieved.
[0148]
That is, the chip side structure 36 shown in FIG. 42 in which the semiconductor chip 2 to which the cap 9 is attached is flip-chip connected, and the cable side structure 37 shown in FIG. 43 in which the coaxial cable 7 is connected to the auxiliary substrate 32 by the solder connection 31. Are assembled, and each structure is screened separately.
[0149]
As a result, since both structures include microstrip lines, high frequency tests can be performed as respective components, and the yields can be separated by connecting non-defective products. As a result, the yield risk can be divided between the chip-side structure 36 and the cable-side structure 37, and the yield of the high-frequency package 1 shown in FIG. 41 in which both structures are connected can be improved.
[0150]
Furthermore, the chip-side structure 36 and the cable-side structure 37 can be distributed as individual parts, and each can be obtained as a part.
[0151]
In addition, since all the external connection terminals are provided on the main surface 4a on the flip chip connection side of the package substrate 4, a sorting test can be easily performed when sorting the high-frequency semiconductor chip 2 of 40 Gbps. .
[0152]
That is, since all external connection terminals of high frequency and low frequency are provided on one surface (main surface 4a) of the package substrate 4, it is easy to contact the probe needle during the sorting test, and it is complicated. The test can be performed without using a jig having a simple shape.
[0153]
As a result, the test time can be shortened.
[0154]
Note that the auxiliary substrate 32 can be used as a testing substrate 35 as shown in FIG. 44, and can also be used as a socket in a sorting test of the package substrate 4.
[0155]
At that time, the package substrate 4 and the testing substrate 35 are brought into electrical contact via an interposer 35a such as an ACF (Anisotropic Conductive Film), and a test is performed by transmitting a signal to the outside via a pin member 35b.
[0156]
As in the auxiliary substrate 32, the testing substrate 35 includes a signal surface wiring 35c, an internal signal wiring 35d, a signal surface wiring 35c, a GND layer 35f disposed via an insulating layer 35e, and a microstrip line. 35 g is formed.
[0157]
The chip-side structure 36 shown in FIG. 42 and the cable-side structure 37 shown in FIG. 43 are separately selected and tested, and after obtaining good products, the chip-side structure 36 and the cable-side structure 37 are separated. What is connected and assembled is a high-frequency package 1 of a modification of the second embodiment shown in FIG.
[0158]
Further, the heat conductive adhesive 10 is applied to the surface of the cap 9, and the heat dissipation block 26 is attached via the heat conductive adhesive 10, and the high frequency package 1 is connected to the module substrate of the optical module 14 via the pin member 35b. What is mounted on 13 is the mounting structure shown in FIG.
[0159]
In the high-frequency package 1 shown in FIG. 41, a cap 9 is first attached to the back surface 2b of the semiconductor chip 2 via a heat conductive adhesive 10, and the heat conductive adhesive 10 is further applied to the surface of the cap 9. In the optical module 14, the module case 15 shares the role of the heat dissipation block 26, and the cap 9 includes the cap 9 and surface layer wiring such as the signal surface wiring 4c. An opening (a meat escape portion) 9a that insulates is formed.
[0160]
Therefore, also in the high frequency package 1 shown in FIG. 41, not only the cap 9 but also the cap 9 is provided with the heat dissipation block 26 (module case 15), so that the heat dissipation of the high frequency package 1 can be further improved. Deterioration of high frequency characteristics can be prevented.
[0161]
(Embodiment 3)
46 is a plan view showing an example of the arrangement of components incorporated in the optical module according to Embodiment 3 of the present invention. FIG. 47 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 46 is a cross-sectional view showing a modification of the connection method of the transmission line section in the optical module shown in FIG. 46, FIG. 49 is a plan view showing the arrangement of components incorporated in the optical module of the modification of the third embodiment of the present invention, and FIG. 50 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 49, and FIG. 51 is a plan view showing the structure of a tape-like transmission line portion which is an example of the transmission line portion of Embodiment 3 of the present invention. 52 is a cross-sectional view showing a cross-sectional structure cut along the line AA shown in FIG. 51. FIG. 53 is a cross-sectional view showing a cross-sectional structure cut along the line BB shown in FIG. 54 shows the tape-like shape shown in FIG. FIG. 55 is a cross-sectional view showing a cross-sectional structure cut along the line CC shown in FIG. 51, and FIG. 56 is a modification of the third embodiment of the present invention. 57 is a plan view showing the structure of the tape-shaped transmission line portion, FIG. 57 is a cross-sectional view showing a cross-sectional structure cut along the line AA shown in FIG. 56, and FIG. 58 is taken along the line BB shown in FIG. FIG. 59 is a rear view showing the structure of the back surface of the tape-shaped transmission line portion shown in FIG. 56, and FIG. 60 is a cross section taken along the line CC shown in FIG. FIG. 61 is a plan view showing the structure of a tape-shaped transmission line portion of a modification of the third embodiment of the present invention, and FIG. 62 is cut along the line AA shown in FIG. FIG. 63 is a cross-sectional view showing the structure of the cross section cut along the line BB shown in FIG. 64 is a back view showing the structure of the back surface of the tape-shaped transmission line portion shown in FIG. 61, FIG. 65 is a cross-sectional view showing the structure of a cross section taken along the line CC shown in FIG. 61, and FIG. Sectional drawing which shows an example of the mounting structure of the high frequency package in which the tape-shaped transmission line part of Embodiment 3 of this Embodiment was provided, FIG. 67 is an expanded fragmentary sectional view which expands and shows the structure of the D section shown in FIG. 68 is a cross-sectional view showing a cross-sectional structure taken along line EE shown in FIG. 67, FIG. 69 is a cross-sectional view showing a modification of the structure shown in FIG. 68, and FIG. 70 is a modification of the structure shown in FIG. 71 is a cross-sectional view showing a modification of the structure shown in FIG. 66, FIG. 72 is a plan view showing the structure of the tape-shaped transmission line portion of the modification of the third embodiment of the present invention, and FIG. FIG. 74 is a plan view showing a connection state of a tape-shaped transmission line portion of the modification of FIG. 72, and FIG. 74 is the present invention. Sectional drawing which shows the mounting structure of the modification of the tape-shaped transmission line part of Embodiment 3 of this, FIG. 75 is sectional drawing which shows the mounting structure of the modification of the tape-shaped transmission line part of Embodiment 3 of this invention It is.
[0162]
In the third embodiment, a high-frequency package (semiconductor device) 38 mounted on an electronic device such as the optical module 39 shown in FIG. 46 having the same structure as that of the optical module 14 described in the first embodiment will be described. .
[0163]
That is, the high-frequency package 38 is also a semiconductor package on which an optical communication IC is mounted, and is a semiconductor device capable of performing high-speed transmission at 1 gigahertz (GHz) or higher, for example, 40 Gbps. The high-frequency package 38 has a tape-like line portion 40 that is a tape-like transmission line portion as shown in FIGS. 51 to 55 as a high-frequency signal transmission line portion. A signal is input or output through the tape-shaped line portion 40. Therefore, the tape-shaped line portion 40 is a member that delivers a high-speed signal.
[0164]
The configuration of the high-frequency package 38 includes a package substrate (wiring substrate) 4 on which signal surface wiring (surface wiring) 4c as shown in FIG. 66 is formed, and a plurality of solder bump electrodes 5 on the main surface 4a of the package substrate 4. A high-frequency semiconductor chip 2 that is electrically connected via flip-chip connection, a tape-like line portion 40 that is electrically connected to the signal surface wiring 4c of the package substrate 4, and the semiconductor chip 2 An underfill resin 6 that flows between the main surface 2a (see FIG. 1) and the main surface 4a of the package substrate 4 to protect the flip chip connecting portion, and a back surface 4b opposite to the main surface 4a of the package substrate 4 And a plurality of ball electrodes 3 serving as external connection terminals.
[0165]
Further, as shown in FIG. 51, the tape-like line portion 40 of the third embodiment has a plate-like lead 40a which is a transmission line and also a high-frequency wiring, and the plate-like lead 40a is It is electrically connected to the signal surface wiring 4 c of the package substrate 4.
[0166]
As shown in FIG. 1, the package substrate 4 includes a signal surface wiring 4c and a GND layer (grounding conductor layer) 4f formed inside through the signal surface wiring 4c and the insulating layer 4e. A microstrip line 4g is formed.
[0167]
Therefore, the high frequency package 38 according to the third embodiment, like the high frequency package 1 according to the first embodiment, applies a high frequency (for example, 40 Gbps) signal from the tape-shaped line portion 40 to the signal surface wiring 4c of the package substrate 4. Is directly input to the semiconductor chip 2 through the solder bump electrode 5 via the, or on the contrary, a high-frequency signal from the semiconductor chip 2 is output to the outside via the tape-shaped line portion 40. The structure is such that signals can be transmitted only by the microstrip line on the entire surface of the package substrate 4.
[0168]
As a result, the high-frequency signal can be transmitted without losing the frequency characteristics by transmitting the high-frequency signal only through the microstrip line on the surface layer of the package substrate 4 without via wiring by vias.
[0169]
Specifically, by transmitting a high-frequency signal only through the microstrip line on the surface layer, the reflection characteristics in high-frequency transmission can be reduced and the transmission characteristics can be increased. As a result, loss in high-frequency transmission can be reduced, and high-quality high-frequency signals can be transmitted.
[0170]
Furthermore, the disturbance of the waveform of the high-frequency signal in the high-frequency transmission can be reduced, so that a high-quality high-frequency signal can be transmitted.
[0171]
That is, as described in the first embodiment, when a via is inserted in high-frequency transmission, a mismatched portion of characteristic impedance occurs, which causes transmission loss. However, in the case of a microstrip line, a desired characteristic impedance can be obtained by designing parameters such as a wiring width, an insulating layer thickness, and a space with an adjacent pattern. Therefore, uniform characteristic impedance can be designed from the input side to the output side, and transmission loss can be reduced.
[0172]
Note that the surface layer wiring of the package substrate 4 such as the signal surface layer wiring 4c and the GND surface layer wiring 4h according to the third embodiment is formed of, for example, copper, and is arranged in the uppermost layer on the main surface 4a side of the package substrate 4. It may be exposed on the surface of the main surface 4a or may be coated with a non-conductive thin film.
[0173]
In the high frequency package 38, a plurality of ball electrodes (bump electrodes) 3 provided as external connection terminals are arranged in an array on the back surface 4 b of the package substrate 4 as in the high frequency package 1. 38 is a ball grid array type semiconductor package.
[0174]
Thereby, the package can be reduced in size as compared with the outer lead protruding high frequency package in which the outer lead protrudes outward from the package body.
[0175]
Next, the optical module 39 shown in FIG. 46 on which the high frequency package 38 is mounted will be described.
[0176]
The optical module 39 according to the third embodiment has the same structure as that of the optical module 14 according to the first embodiment, converts an input optical signal into an electric signal by the photoelectric converter (another semiconductor device) 20, and further After amplification by an amplifier element (another semiconductor device) 19, arithmetic processing is performed inside the semiconductor chip with an electric signal, and the processing result is converted again into an optical signal, which is then output to the next module product.
[0177]
In the optical module 39 shown in FIG. 46, a high-frequency signal of the order of giga (G) Hz is input / output to the next stage of the amplifier element 19. Therefore, the high frequency package 38 and the amplifier element 19 which is another semiconductor device are connected via the tape-shaped line portion 40.
[0178]
Therefore, in the connection via the tape-shaped line portion 40, as shown in FIG. 47, in the connection between the high frequency package 38 mounted on the same module substrate 13 and the amplifier element 19, the respective tape-shaped line portions 40 are connected. Once connected to the module substrate 13, the high frequency package 38 and the amplifier element 19 are electrically connected via the surface layer wiring on the module substrate 13 and the tape-shaped line portion 40.
[0179]
In addition, as shown in FIG. 48, the high frequency package 38 and the amplifier element 19 can be directly connected by a tape-shaped line portion 40.
[0180]
That is, since the tape-shaped line portion 40 is flexible, the high-frequency package 38 or the amplifier element 19 can be mounted by bending the tape-shaped line portion 40 in advance as shown in FIG. It becomes possible to carry out easily.
[0181]
On the other hand, since the tape-shaped line part 40 has flexibility, even if it is between components with different heights, both can be directly connected by the tape-shaped line part 40. Therefore, as shown in FIG. 48, the distance between the two parts can be shortened, the mounting area can be reduced, and the surface layer wiring of the module substrate 13 is not interposed in the transmission of the high-frequency signal between the parts. Therefore, loss in high-frequency signal transmission can be reduced, and high-frequency signal transmission can be improved in quality.
[0182]
The optical module 39 shown in FIGS. 49 and 50 includes a tape-shaped line between the amplifier element 19 and the photoelectric converter (other semiconductor device) 20 in addition to between the high-frequency package 38 and the amplifier element 19. In this structure, the mounting area of the component can be reduced and the transmission quality of the high-frequency signal can be improved.
[0183]
In the optical module 39 shown in FIG. 46, the semiconductor chip 2 in which the tape-shaped line portion 40 is provided on the signal input side has, for example, a plurality of input signals having a first frequency smaller than the first frequency. On the other hand, in the semiconductor chip 2 in which the tape-shaped line portion 40 is provided on the signal output side, for example, a plurality of third frequency signals are output. A circuit for integrating and outputting an input signal into a signal having a fourth frequency higher than the third frequency is incorporated. Here, the first and fourth frequencies are 1 gigahertz or higher.
[0184]
Of the structure of the optical module 39 shown in FIGS. 46 to 50 of the third embodiment, the other structures other than the tape-shaped line portion 40 are the same as those of the optical module 14 shown in FIG. To do.
[0185]
Next, the configuration of the tape-shaped line portion 40 provided in the high frequency package 38 of the third embodiment will be described.
[0186]
The tape-shaped line portion 40 shown in FIGS. 51 to 55 includes one base metal layer (ground conductor layer) 40b having a ground potential shown in FIG. 54, an insulating layer 40c disposed thereon, and an upper layer thereof. It is a tape-shaped member having a four-layer structure as shown in FIG. 52, which is composed of the formed surface metal layer 40d and a cover coat layer 40e which is a solder resist covering the surface metal layer 40d.
[0187]
As shown in FIG. 51, the surface metal layer 40d includes a surface signal lead 40g which is a plate-like lead 40a disposed along the longitudinal direction near the center in the width direction, and is disposed along the longitudinal direction on both sides thereof. The ground potential surface layer GND lead 40h, and the base metal layer 40b and the two surface layer GND leads 40h are connected by a plurality of vias 40f as shown in FIGS. 53 and 55, respectively. The ground potential is the same.
[0188]
That is, the surface layer GND lead 40h is disposed on both sides of the surface layer signal lead 40g of the surface layer metal layer 40d via the insulating cover coat layer 40e, and further, the base metal is disposed on the back side of the surface layer signal lead 40g via the insulating layer 40c. The layer 40b is arranged, and as a result, a microstrip line 40i is formed in the tape-shaped line portion 40 as shown in FIG.
[0189]
As a result, high-frequency signals are transmitted to other semiconductor devices such as the amplifier element 19 and the module substrate 13 via the signal surface wiring 4c of the package substrate 4 and the surface signal leads 40g of the microstrip line 40i of the tape-like line portion 40. As a result, a high-quality high-frequency signal can be transmitted with less loss in high-frequency transmission.
[0190]
The base metal layer 40b is made of, for example, stainless steel (SUS), and the thickness thereof is, for example, about 0.1 to 0.2 mm. The surface metal layer 40d is, for example, a copper thin film, and has a thickness of, for example, about a dozen μm to 35 μm. The insulating layer 40c is made of, for example, a polyimide resin.
[0191]
However, the material and thickness of the constituent members of the tape-shaped line portion 40 are not limited to those described above.
[0192]
In the tape-shaped line portion 40 shown in FIGS. 51 to 55, the surface metal layer 40d is formed on the surface of the insulating layer 40c. The surface metal layer 40d is formed by a wiring pattern such as copper and further insulated. The base metal layer 40b on the back side of the layer 40c is formed by, for example, backing a thin metal plate having elasticity.
[0193]
By disposing the base metal layer 40b on the back side of the insulating layer 40c, the tape-shaped line portion 40 can be easily bent and the bent shape can be kept constant. This facilitates formation of a gull wing shape as shown in FIG. 66. As a result, the tape-shaped line portion 40 is formed from the high frequency package 38 to the module substrate 13 or the like, or from the high frequency package 38 to another semiconductor device. It is possible to arrange with high accuracy, to improve the workability at the time of mounting, and to improve the mountability of the high frequency package 38.
[0194]
In addition, the tape-shaped line portion 40 of the modification shown in FIGS. 56 to 60 has a ground potential metal layer 40j on the base metal layer 40b via an adhesive 40l as shown in FIG. The metal layer 40j is electrically connected to the surface layer GND lead 40h through a plurality of vias 40f. Compared with the tape-shaped line portion 40 shown in FIGS. 51 to 55, the ground potential layer of copper foil is increased by one layer, so that the resistance value can be lowered compared with the case of the base metal layer 40b alone, and further, Characteristics can be improved.
[0195]
However, since the tape-shaped line part 40 shown in FIGS. 51-55 is easy in structure compared with the tape-shaped line part 40 of the modification shown in FIGS. 56-60, cost can be reduced.
[0196]
The tape-shaped line portion 40 of the modification shown in FIGS. 61 to 65 is provided with a surface metal layer 40d and a metal layer 40j as a wiring pattern, and both are electrically connected by a plurality of vias 40f. In addition, the surface metal layer 40d and the metal layer 40j are each covered with a cover coat layer 40e which is an insulating solder resist.
[0197]
The tape-shaped line portion 40 of the modified example shown in FIGS. 61 to 65 can be patterned because the metal layer 40j is also a copper foil, and further has electrical characteristics as compared with the tape-shaped line portion 40 shown in FIGS. Since the structure is easier compared with the tape-shaped line portion 40 of the modification shown in FIGS. 56 to 60, the cost can be reduced. Moreover, since it has a softness | flexibility, it can connect easily components from which height differs.
[0198]
In the high frequency package 38 according to the third embodiment, the tape-shaped line portion 40 as shown in FIGS. 51 to 65 is used as the transmission line portion of the high frequency signal, so that the high frequency package using the coaxial cable 7 according to the first embodiment. The tape-shaped line portion 40 can be made smaller and thinner than the coaxial cable 7 and the cost of the high-frequency package 38 can be reduced. be able to.
[0199]
In addition, since the transmission line such as the surface signal lead 40g, the surface layer GND lead 40h, or the metal layer 40j formed on the tape-shaped line portion 40 can be formed by a photolithography technique as a wiring pattern, the dimension of the transmission line is formed with high accuracy. It is possible to facilitate the design of the transmission line.
[0200]
Next, FIGS. 66 to 71 show a mounting structure (electronic device) of the high-frequency package 38. The high-frequency package 38 to which the tape-like line portion 40 bent in a gull-wing shape is attached in advance is mounted on the mounting substrate 41. Is implemented.
[0201]
Since the tape-shaped line portion 40 is bent and formed in advance in a gull wing shape, the mounting operation is easy, and the mountability can be improved. When the tape-shaped line portion 40 is bent and formed in a gull-wing shape as described above, the tape-shaped line portion 40 is lined like the tape-shaped line portion 40 shown in FIGS. 51 to 55 or the tape-shaped line portion 40 of the modification shown in FIGS. It is preferable to use the tape-shaped line portion 40 provided with the base metal layer 40b.
[0202]
67 and 68 show the details of the connection state between the tape-shaped line portion 40 and the mounting substrate 41, and the surface layer signal lead (transmission line) 40g of the tape-shaped line portion 40 and the signal for the mounting substrate 41 are shown. The surface layer wiring (electrode) 41 a is further connected to the surface layer GND lead (transmission line) 40 h of the tape-shaped line portion 40 and the GND surface layer wiring (electrode) 41 b of the mounting substrate 41 via solder 42.
[0203]
FIG. 69 shows a case where an anisotropic conductive resin 43 is used in place of the solder 42. The surface signal lead 40g of the tape-shaped line portion 40 and the signal surface wiring 41a of the mounting substrate 41 are further tape-shaped. The surface layer GND lead 40h of the line portion 40 and the GND surface layer wiring 41b of the mounting substrate 41 are electrically connected by the conductive particles 43a.
[0204]
Thus, by using the solder 42 and the anisotropic conductive resin 43, it becomes possible to remove each tape-shaped line part 40, and the high frequency package 38 can be repaired easily.
[0205]
Further, as shown in FIG. 70, when the high frequency package 38 is mounted, the connection of the ball electrode 3 which is an external connection terminal and the connection of the tape-shaped line portion 40 are not the same mounting substrate 41 but different from each other. It is also possible to connect to separate mounting boards 41. That is, since there is a degree of freedom in the shape of the tape-shaped line portion 40, such a mounting structure can be realized.
[0206]
FIG. 71 shows a structure in which the high-frequency package 38 and another semiconductor package (another semiconductor device) 44 are electrically connected by the tape-shaped line portion 40. In this case, since the high-frequency package 38 and the other semiconductor package 44 often have different heights, the tape-like line portion 40 as shown in the modified examples of FIGS. It is preferable to use this, so that even if there is a difference in height between the two, connection can be made easily.
[0207]
In this case, the high-frequency package 38 to which the tape-shaped line portion 40 is attached in advance may be mounted on the mounting substrate 41, and then the tape-shaped line portion 40 and another semiconductor package 44 may be connected. After the high frequency package 38 that does not have the tape-shaped line portion 40 and the other semiconductor package 44 are mounted on the mounting substrate 41, the tape-shaped line portion 40 may be connected to the both. It is preferable to use a tape-shaped line portion 40 having a general softness (flexibility).
[0208]
Further, in the mounting structure shown in FIG. 71, since the tape-shaped line portion 40 is directly connected to the high-frequency package 38 and the other semiconductor package 44 without being connected to the mounting substrate 41, the distance between the packages can be shortened. The mounting area can be reduced.
[0209]
Next, FIG. 72 shows a modification of the transmission line portion, which is a bifurcated tape-like line portion 45 (differential line) used when inputting and outputting a high-frequency signal between a plurality of packages, and has two surface layers. A surface layer GND lead 40h is arranged between the signal lead 40g and both sides thereof.
[0210]
In this case, as shown in FIG. 73, one end of the bifurcated tape-shaped line portion 45 is connected to one high-frequency package 38, and the other divided end is connected to another semiconductor package 44 or the like.
[0211]
74 and 75, the high-frequency package 38 to which the tape-shaped line portion 40 is not attached, the other semiconductor package 44, etc. are first mounted on the mounting substrate 41, and then the tape-shaped line portion 40 is mounted by the user or the like. The structure to connect is shown.
[0212]
In this case, the user can easily turn on / off the electrical connection between the packages by attaching and detaching the tape-shaped line portion 40, and the application can be changed.
[0213]
(Embodiment 4)
76 is a perspective view showing an example of the structure of the high frequency package according to Embodiment 4 of the present invention, FIG. 77 is a plan view showing the structure of the high frequency package shown in FIG. 76, and FIG. 78 is provided in the high frequency package shown in FIG. FIG. 79 is a sectional view showing an example of the mounting structure of the high-frequency package shown in FIG. 76, and FIG. 80 is a modification of the fourth embodiment of the present invention. 81 is a plan view showing the structure of the high-frequency package, FIG. 81 is a perspective view showing the structure of the high-frequency package shown in FIG. 80, and FIG. 82 is a perspective view showing the structure on the back side of the transmission line portion provided in the high-frequency package shown in FIG. 83 is a plan view showing the structure of a high frequency package according to a modification of the fourth embodiment of the present invention, FIG. 84 is a perspective view showing the structure of the high frequency package shown in FIG. 83, and FIG. 85 is a high frequency package shown in FIG. Perspective view showing the back surface side of the structure of the transmission line section provided in the cage, Figure 86 is a sectional view showing the structure of a high-frequency package shown in FIG. 83.
[0214]
In the fourth embodiment, as shown in FIG. 76, the transmission line portion of the high-frequency package (semiconductor device) 47 is arranged so as to protrude in two opposing directions of the package substrate 4, and at that time, the transmission line portion Is provided with a connecting portion 46g that protrudes from the transmission line portion in a direction crossing the transmission line and is formed integrally with the transmission line portion.
[0215]
As shown in FIG. 78, the connecting portion 46g is formed in a frame shape according to the outer peripheral shape of the package substrate 4, and the plate-like line portion 46 which is a transmission line portion in two opposing directions of the frame-like connecting portion 46g. Protrudes and is formed integrally with the connecting portion 46g.
[0216]
Also in this plate-like line portion 46, a base metal layer (ground conductor layer) 46b and a surface metal layer 46e (see FIG. 78) are arranged via an insulating layer 46f made of polyimide resin or the like. Reference numeral 46e denotes a plate-like lead (wiring) 46a composed of a surface layer signal lead (transmission line) 46c and a surface layer GND lead (transmission line) 46d.
[0217]
Since the connecting portion 46g has a frame shape, the semiconductor chip 2 is exposed in the frame as shown in FIGS. 76 and 77 when the connecting portion 46g is mounted on the package substrate 4.
[0218]
FIG. 79 shows a mounting structure in which the high frequency package 47 is mounted on the mounting substrate 41. The signal surface wiring 4c of the package substrate 4 and the surface signal lead 46c of the plate-like line portion 46 in the high frequency package 47 are shown. The surface layer signal lead 46c of the plate-like line portion 46 and the signal surface layer wiring 41a of the mounting substrate 41 are electrically connected to each other.
[0219]
In the high-frequency package 47 shown in FIG. 76 of the fourth embodiment, the connecting portion 46g protruding from the plate-like line portion 46 plays a role of reinforcement in the connection between the plate-like line portion 46 and the package substrate 4, so that the plate-like line The connection strength between the portion 46 and the package substrate 4 can be increased by the connection portion 46g. At that time, the larger the connection area between the connection portion 46g and the package substrate 4, the higher the connection strength between them.
[0220]
Further, since the connecting portion 46g formed integrally with the plate-like line portion 46 is directly connected to the package substrate 4 in a wide area due to the frame shape, heat generated from the semiconductor chip 2 is connected via the package substrate 4 to the connecting portion. 46g can be released, and the heat dissipation of the high frequency package 47 can be improved.
[0221]
Further, since the plate-like line portion 46 having the base metal layer 46b having the ground potential is connected to the package substrate 4, the ground of the high frequency package 47 can be strengthened, and the noise margin can be improved.
[0222]
When the plate-like line portion 46 and the connection portion 46g are integrally formed, the surface signal lead 46c and the surface layer GND lead 46d, which are transmission lines, are formed by etching, and the central portion of the connection portion 46g is formed. Is formed by press molding. At that time, the bending accuracy of the plate-like line portion 46 can be set to about ± 0.05 mm due to the accuracy of the press die.
[0223]
Note that the connecting portion 46g does not necessarily have to be formed in a frame shape that connects the two plate-like line portions 46 arranged opposite to each other, and in a direction crossing the transmission line from the plate-like line portion 46. What is necessary is just to have a region that protrudes and can be connected to the package substrate 4. That is, the two plate-like line portions 46 arranged to face each other are not necessarily connected.
[0224]
Next, FIGS. 80 to 82 show a high-frequency package 47 on which a plate-like line portion 46 according to a modification is mounted. A transmission line is formed corresponding to each of the four directions of the package substrate 4 and corresponds to each of the four sides. In this structure, the plate-like line portions 46 formed in this manner are connected together.
[0225]
In this way, by adopting a structure in which the plate-like line portions 46 corresponding to the four sides of the package substrate 4 are connected at the corners, the lead flatness can be improved.
[0226]
For example, when the bending accuracy of the press die is about ± 0.05 mm, it is possible to ensure flatness of 0.05 mm or less, and the plate-like line portion of the integrated structure corresponding to the four sides of the package substrate 4 Since 46 is joined, the flatness of the ball electrode mounting surface of the package substrate 4 can be made 0.1 mm or less.
[0227]
In addition, since the lead flatness can be improved, the ball electrode 3 for height control (see FIG. 76) is not required, so that the price of the high-frequency package 47 can be reduced and the connection reliability can be improved.
[0228]
FIGS. 83 to 86 show a high-frequency package 47 on which a plate-like line portion 46 according to another modification is mounted. A connection portion 46g is also arranged on the semiconductor chip 2, and a semiconductor as shown in FIG. The back surface 2 b of the chip 2 and the connection portion 46 g are joined by an adhesive 48.
[0229]
Thereby, the heat dissipation in the high frequency package 47 can be further improved.
[0230]
(Embodiment 5)
87 is a plan view showing the structure of the tape-shaped transmission line portion according to the fifth embodiment of the present invention, FIG. 88 is a plan view showing the structure of the base metal layer of the tape-shaped transmission line portion shown in FIG. 87, and FIG. Is a plan view showing the structure of the insulating layer of the tape-shaped transmission line section shown in FIG. 87, FIG. 90 is a plan view showing the structure of the surface metal layer of the tape-shaped transmission line section shown in FIG. 87, and FIG. 92 is a plan view showing the structure of the cover coat layer of the tape-shaped transmission line section shown in FIG. 92, FIG. 92 is a cross-sectional view showing the structure of the cross section cut along the line AA shown in FIG. 87, and FIG. FIG. 94 is a partial sectional view showing the connection structure of the base metal layer of the tape-shaped transmission line portion shown in FIG. 87, and FIG. 95 is shown in FIG. 87. Partial sectional view showing the connection structure of the surface metal layer of the tape-shaped transmission line part, 96 is a plan view showing the structure of the tape-shaped transmission line portion of a modification of the fifth embodiment of the present invention, FIG. 97 is a plan view showing the structure of the base metal layer of the tape-shaped transmission line portion shown in FIG. 98 is a plan view showing the structure of the insulating layer of the tape-shaped transmission line section shown in FIG. 96, FIG. 99 is a plan view showing the structure of the surface metal layer of the tape-shaped transmission line section shown in FIG. 96, and FIG. 96 is a plan view showing the structure of the cover coat layer of the tape-shaped transmission line portion shown in FIG. 96, FIG. 101 is a cross-sectional view showing a cross-sectional structure cut along the line AA shown in FIG. 96, and FIG. FIG. 103 is a partial sectional view showing the connection structure of the surface metal layer (GND) of the tape-shaped transmission line part shown in FIG. 96, FIG. Is the surface metal layer of the tape-shaped transmission line shown in FIG. 105) is a partial cross-sectional view showing the connection structure of FIG. 105, FIG. 105 is a cross-sectional view showing the structure of a tape-shaped transmission line portion of a modification of the fifth embodiment of the present invention, and FIG. FIG. 107 is a plan view showing the structure of a tape-shaped transmission line portion according to a modification of the fifth embodiment of the present invention, and FIG. 108 is a plan view showing the structure of the tape-shaped transmission line portion of the example. FIG. 109 is a plan view showing an example of the flow of return current in the connection structure shown in FIG. 108, and FIG. 110 is a connection structure shown in FIG. 108. It is a top view which shows how the return current flows in the connection structure of the comparative example with respect to.
[0231]
The fifth embodiment will explain another embodiment of the tape-shaped transmission line section.
[0232]
The tape-shaped line portion (transmission line portion) 49 shown in FIG. 87 has substantially the same structure as the tape-shaped line portion 40 described in the third embodiment, except that the base metal layer 40b and the insulating layer 40c are different. That is, a notch 40k is formed in each of the cover coat layers 40e.
[0233]
87, the base metal layer 40b shown in FIG. 88, the insulating layer 40c shown in FIG. 89, the surface metal layer 40d shown in FIG. 90, and the cover shown in FIG. It consists of four layers of the coat layer 40e. FIG. 92 shows a cross-sectional structure along the GND line, and FIG. 93 shows a cross-sectional structure along the signal line.
[0234]
Note that the base metal layer 40b shown in FIG. 88, the insulating layer 40c shown in FIG. 89, and the cover coat layer 40e shown in FIG. 91 are overlapped with the surface signal lead 40g of the surface metal layer 40d, A notch 40k is formed in a part.
[0235]
Further, the length of the insulating layer 40c in the longitudinal direction is shorter than the length of the base metal layer 40b, and the end of the base metal layer 40b is exposed so that it can be connected to the surface layer wiring of the wiring substrate such as the package substrate 4. .
[0236]
Further, the surface metal layer 40d includes a surface layer signal lead 40g and a surface layer GND lead 40h. The surface layer GND lead 40h is shorter than the surface layer signal lead 40g, and an end portion of the surface layer GND lead 40h is covered with an insulating layer 40c. Is called.
[0237]
A cover coat layer 40e shown in FIG. 91 is disposed on the surface metal layer 40d. Furthermore, the base metal layer 40b and the surface layer GND lead 40h of the surface metal layer 40d are electrically connected by a plurality of vias 40f. At that time, in the vicinity of the notch 40k of each layer, the installation pitch of the vias 40f is made narrower than other portions, or continuous vias 40n are provided.
[0238]
94 and 95 show the connection state of the tape-shaped line portion 49 shown in FIG. 87 with the package substrate 4, and FIG. 94 shows the soldering between the base metal layer 40b and the GND surface layer wiring 4h of the package substrate 4. FIG. 95 shows a connection state between the surface signal lead 40g and the signal surface wiring 4c of the package substrate 4 by the solder 42 (which may be a conductive paste). Is.
[0239]
As shown in FIGS. 88 and 89, since the length of the insulating layer 40c in the longitudinal direction is shorter than the length of the base metal layer 40b, the end of the base metal layer 40b can be exposed. 94, the base metal layer 40b of the tape-shaped line portion 49 can be connected to the GND surface layer wiring 4h of the package substrate 4, thereby stabilizing the GND potential and improving the electrical characteristics. be able to.
[0240]
In the fifth embodiment, the base metal layer 40b, the insulating layer 40c, and the cover coat layer 40e of the tape-shaped line portion 49 overlap with the surface signal leads 40g of the surface metal layer 40d, and a part of each end. A notch 40k is formed in the.
[0241]
In addition, in the vicinity of the notch 40k of each layer, the installation pitch of the vias 40f is made narrower than other portions, or continuous vias 40n are provided. Thereby, as shown in FIG. 109, the flow of the return current 54 can be made smoother and the power supply inductance can be reduced.
[0242]
Here, the difference in the flow of the return current 54 between the case where the notch 40k is provided in the tape-shaped line portion 49 and the case where the notch 40k is not provided will be described.
[0243]
As shown in FIG. 108, when the notch 40k is provided in the tape-shaped line portion 49 as in the fifth embodiment, the connection portion of the surface signal lead 40g becomes the coplanar structure 50. There is an inner GND layer 4f on the substrate side, while there is a base metal layer 40b on the lead side from the connection portion, so that both sides of the connection portion have the GND coplanar structure 51.
[0244]
In the tape-shaped line portion 49 shown in the comparative example of FIG. 110, the notch 40k as shown in FIG. 108 is not formed. That is, the connection portion of the surface signal lead 40 g is the GND coplanar structure 51. Therefore, when the surface signal lead 40g of the GND coplanar structure 51 is connected to the substrate, the end of the base metal layer 40b is disposed on the back surface side of the surface signal lead 40g, and in the overlapping portion with the surface signal lead 40g. Since the signal surface wiring 4c is formed, the connection between the base metal layer 40b and the GND surface wiring 4h is only near the edge of the end of the base metal layer 40b.
[0245]
For this reason, for example, the return current 54 that has flowed directly under the wiring from the lead side toward the substrate changes direction suddenly near the edge (near Q) of the base metal layer 40b (GND) and enters the substrate side. become.
[0246]
Therefore, since the moving distance of the return current 54 becomes long and may cause the power supply inductance to increase, it is not preferable.
[0247]
On the other hand, as shown in FIG. 109, in the case where the notch 40k is provided, the return current 54 that has flowed directly under the wiring from the lead side toward the substrate gently changes its direction, so the base metal layer 40b (GND) ) (In the vicinity of P), the increase in power supply inductance is smaller than in the case of FIG.
[0248]
Therefore, it is possible to reduce the transmission loss of high-frequency signals by providing the notch 40k in the tape-shaped line portion 49 to make the GND coplanar structure 51 + the coplanar structure 50 + the GND coplanar structure 51. Furthermore, by making the installation pitch of the vias 40f narrower than other portions in the vicinity of the notches 40k or by providing the continuous vias 40n, the flow of the return current 54 can be made smoother and the power supply inductance can be further reduced. In addition, the electrical characteristics can be further improved.
[0249]
Next, FIG. 96 shows a tape-shaped line portion 49 according to a modification of the fifth embodiment, and the structure and cross-sectional structure thereof are shown in FIGS.
[0250]
The tape-shaped line portion 49 of the modification shown in FIG. 96 has substantially the same structure as the tape-shaped line portion 49 shown in FIG. 87, and has a notch 40k. However, the length of the base metal layer 40b is larger. This is a case where the length of the surface layer GND lead 40h in the surface layer metal layer 40d is longer.
[0251]
In this case, as shown in FIG. 103, the surface layer GND lead 40h of the surface layer metal layer 40d and the GND surface layer wiring 4h of the package substrate 4 are connected by solder 42 or a conductive paste, etc. On the other hand, as shown in FIG. The surface signal lead 40g of the surface metal layer 40d and the signal surface wiring 4c of the package substrate 4 are connected by solder 42 or conductive paste.
[0252]
Here, as shown in FIGS. 103 and 104, the semiconductor chip 2 is mounted on the package substrate 4 via the solder bump electrode 5, and the GND surface layer wiring 4h and the predetermined solder bump electrode 5 are connected to each other or a signal. The surface layer wiring 4c and a predetermined solder bump electrode 5 are connected.
[0253]
In the package substrate 4 shown in FIGS. 103 and 104, a region (region where the GND layer 4f is not formed) from the left side toward the left side of the GND layer 4f in the figure is a first region, and the GND layer If the region in which 4f is formed is the second region, no other wiring layer is formed between the GND surface layer wiring 4h and the GND layer 4f in the second region. Further, the GND layer 4f is not formed under the GND surface layer wiring 4h or the signal surface layer wiring 4c formed in the first region.
[0254]
Therefore, in the case of the tape-shaped line portion 49 shown in FIG. 96, since the notch 40k is formed, as shown in FIGS. 103 and 104, the GND coplanar structure 51 + the coplanar structure 50 + the GND coplanar structure 51 may be used. As in the case of the tape-shaped line portion 49 shown in FIG. 87, the transmission loss of the high frequency signal can be reduced. As a result, the electrical characteristics can be improved.
[0255]
If the base metal layer 40b can be formed sufficiently thick, the tape-shaped line portion 49 shown in FIG. 87 can increase the connection strength of the GND connection.
[0256]
Next, the tape-shaped line portion 52 of the modification shown in FIG. 105 is provided with another metal layer 40j made of a wiring pattern or the like between the base metal layer 40b and the insulating layer 40c, and on the surface of the base metal layer 40b. A surface protective layer 40m is formed.
[0257]
In this case, since the metal layer 40j having a high metal purity made of a wiring pattern can be formed, the power supply inductance can be further reduced and the electrical characteristics can be improved.
[0258]
In the fifth embodiment, a case has been described in which one signal line is disposed in each of the tape-shaped line portions 49 and 52 and three GND lines are formed on both sides of each signal line. The number of signal lines and GND lines is not limited to this. Therefore, two surface layer signal leads 40g may be provided as shown in FIGS. A tape-shaped line portion 53 shown in FIG. 106 is obtained by arranging two surface layer signal leads 40g between the surface layer GND leads 40h at both ends, and the tape-shaped line portion 55 shown in FIG. The surface layer GND lead 40h is disposed on both sides of each of the surface layer signal leads 40g, and the surface layer GND lead 40h is disposed between the two surface layer signal leads 40g. The surface layer GND lead 40h is provided.
[0259]
Also in the tape-shaped line part 53 and the tape-shaped line part 55, since the notch 40k is provided, the effect similar to the tape-shaped line part 49 shown in FIG. 87 can be acquired.
[0260]
Although the invention made by the present inventor has been specifically described based on the embodiments of the invention, the present invention is not limited to the embodiments of the invention, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.
[0261]
For example, in the first to fifth embodiments, the case where the semiconductor device is a ball grid array type semiconductor package has been described. However, the semiconductor device has a structure in which a plurality of external connection terminals are arranged on the surface of the package substrate. For example, an LGA (Land Grid Array) may be used.
[0262]
Furthermore, in the first to fifth embodiments, the case where the semiconductor chip 2 is flip-chip connected to the package substrate 4 has been described, but the electrical connection method between the semiconductor chip 2 and the package substrate 4 is flip-chip. Not only the connection but also ribbon bonding using a flat metal wire may be used.
[0263]
【The invention's effect】
Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.
[0264]
By transmitting a high-frequency signal through a transmission line portion connected to the surface layer wiring of the wiring board, it is possible to reduce the transmission loss of the high-frequency and transmit the signal. It becomes possible.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an example of the structure of a semiconductor device (high frequency package) according to a first embodiment of the present invention.
FIG. 2 is an external perspective view showing an example of the structure of an optical module in which the high-frequency package shown in FIG. 1 is incorporated.
3 is a cross-sectional view showing the structure of the optical module shown in FIG.
4 is a plan view showing an example of an arrangement of components incorporated in the optical module shown in FIG. 2. FIG.
5 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG.
6 is a cross-sectional view showing a structure of a semiconductor device (high frequency package) according to a modification of the first embodiment of the present invention. FIG.
7 is a partial plan view showing an example of a structure of a microstrip line in the wiring board of the high-frequency package shown in FIG. 1. FIG.
8 is a partial cross-sectional view showing the structure of the microstrip line shown in FIG.
9 is a partial plan view showing the structure of a microstrip line of a modification of the wiring board of the high-frequency package shown in FIG.
10 is a partial cross-sectional view showing a structure of a microstrip line according to a modification shown in FIG. 9;
FIGS. 11A and 11B are a perspective view and a cross-sectional view showing a structure of a semiconductor device (high frequency package) according to a modification of the first embodiment of the present invention. FIGS.
12 is a cross-sectional view showing an example of a cap mounting structure of the high-frequency package shown in FIG.
13 is a plan view of the cap mounting structure shown in FIG. 12. FIG.
14 is a cross-sectional view showing a cross-sectional structure cut along line AA in FIG. 13;
15 is a bottom view of the cap mounting structure shown in FIG.
16 is a plan view showing an example of the positional relationship between the surface layer wiring and the cap in the cap mounting structure shown in FIG. 12. FIG.
17 is a bottom view showing the structure of the cap as viewed from the direction of arrow C in FIG. 14;
18 is a side view showing the structure of the cap shown in FIG.
19 is a cross-sectional view showing the structure of the cap shown in FIG. 17 and an enlarged partial cross-sectional view of a corner portion.
20 is an enlarged partial cross-sectional view showing a detailed structure of a cross section cut along the line AA in FIG. 13;
21 is an enlarged partial cross-sectional view showing a detailed structure of a cross section cut along the line BB in FIG. 13;
22 is an enlarged partial plan view showing an example of the positional relationship between the surface wiring and the cap opening in the cap mounting structure shown in FIG.
FIG. 23 is a cross-sectional view showing a structure of a semiconductor device (high frequency package) of a modification of the first embodiment of the present invention.
24 is an enlarged partial sectional view showing an example of a structure in which a heat dissipation member is attached to the cap shown in FIG.
FIG. 25 is a cross-sectional view showing a structure of a semiconductor device (high frequency package) of a modification of the first embodiment of the present invention.
FIG. 26 is a cross sectional view showing a structure of a semiconductor device (high frequency package) according to a modification of the first embodiment of the present invention.
FIG. 27 is a cross-sectional view showing a structure of a semiconductor device (high frequency package) according to a modification of the first embodiment of the present invention.
FIG. 28 is a plan view showing a structure of a semiconductor device (high frequency package) of a modification of the first embodiment of the present invention.
29 is a cross-sectional view showing the structure of the high-frequency package shown in FIG. 28. FIG.
30 is a plan view showing a structure of a semiconductor device (high frequency package) according to a modification of the first embodiment of the present invention; FIG.
FIG. 31 is a plan view showing a structure of a semiconductor device (high frequency package) of a modification of the first embodiment of the present invention.
32 is a plan view showing a structure of a semiconductor device (high frequency package) according to a modification of the first embodiment of the present invention; FIG.
33 is a plan view showing a structure of a semiconductor device (high-frequency package) according to a modification of the first embodiment of the present invention. FIG.
34 is a cross-sectional view showing the structure of the high-frequency package shown in FIG. 33. FIG.
FIG. 35 is a plan view showing a structure of a semiconductor device (high frequency package) of a modification of the first embodiment of the present invention.
36 is a cross-sectional view showing the structure of the high-frequency package shown in FIG. 35. FIG.
FIG. 37 is a plan view showing a structure of a semiconductor device (high frequency package) according to a modification of the first embodiment of the present invention.
38 is a cross-sectional view showing the structure of the high-frequency package shown in FIG. 37.
FIG. 39 is a cross-sectional view showing the structure of the semiconductor device (high frequency package) according to the second embodiment of the present invention;
FIG. 40 is a cross sectional view showing a structure of a semiconductor device (high frequency package) of a modification of the second embodiment of the present invention.
41 is a cross-sectional view showing a structure of a semiconductor device (high frequency package) of a modification of the second embodiment of the present invention. FIG.
42 is a cross-sectional view showing an example of a cap mounting state in the assembly of the high frequency package shown in FIG. 41. FIG.
43 is a partial cross-sectional view showing an example of a connection state between an auxiliary board and a coaxial cable in the assembly of the high-frequency package shown in FIG. 41. FIG.
44 is a partial cross-sectional view showing an example of a testing state in assembling the high-frequency package shown in FIG. 41. FIG.
45 is a partial cross-sectional view showing an example of the structure after the assembly of the high-frequency package shown in FIG. 41 is completed.
FIG. 46 is a plan view showing an example of the arrangement of components incorporated in the optical module according to Embodiment 3 of the present invention.
47 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 46. FIG.
48 is a cross-sectional view showing a modification of the connection method of the transmission line section in the optical module shown in FIG. 46. FIG.
FIG. 49 is a plan view showing the arrangement of components incorporated in the optical module according to the modification of the third embodiment of the present invention.
50 is a cross-sectional view showing an example of the arrangement of components incorporated in the optical module shown in FIG. 49. FIG.
FIG. 51 is a plan view showing a structure of a tape-shaped transmission line portion which is an example of a transmission line portion according to the third embodiment of the present invention.
52 is a cross-sectional view showing a cross-sectional structure cut along the line AA shown in FIG. 51. FIG.
53 is a cross-sectional view showing a cross-sectional structure cut along the line BB shown in FIG. 51. FIG.
54 is a back view showing the structure of the back surface of the tape-shaped transmission line section shown in FIG. 51. FIG.
55 is a cross-sectional view showing a cross-sectional structure cut along line CC shown in FIG. 51. FIG.
FIG. 56 is a plan view showing a structure of a tape-shaped transmission line portion according to a modification of the third embodiment of the present invention.
57 is a cross-sectional view showing a cross-sectional structure cut along the line AA shown in FIG. 56. FIG.
58 is a cross-sectional view showing a cross-sectional structure cut along the line BB shown in FIG. 56. FIG.
59 is a rear view showing the structure of the rear surface of the tape-shaped transmission line portion shown in FIG. 56. FIG.
60 is a cross-sectional view showing a cross-sectional structure cut along line CC shown in FIG. 56. FIG.
61 is a plan view showing a structure of a tape-shaped transmission line portion according to a modification of the third embodiment of the present invention. FIG.
62 is a cross-sectional view showing a cross-sectional structure cut along line AA shown in FIG. 61. FIG.
63 is a cross-sectional view showing a cross-sectional structure cut along the line BB shown in FIG. 61. FIG.
64 is a back view showing the structure of the back surface of the tape-shaped transmission line section shown in FIG. 61. FIG.
65 is a cross-sectional view showing a cross-sectional structure cut along the line CC shown in FIG. 61. FIG.
66 is a cross-sectional view showing an example of a mounting structure of a high-frequency package provided with a tape-shaped transmission line unit according to the third embodiment of the present invention. FIG.
67 is an enlarged partial cross-sectional view showing an enlarged structure of a portion D shown in FIG. 66. FIG.
68 is a cross sectional view showing a cross sectional structure taken along line EE shown in FIG. 67; FIG.
69 is a cross-sectional view showing a modified example of the structure shown in FIG. 68. FIG.
70 is a cross-sectional view showing a modified example of the structure shown in FIG. 66. FIG.
71 is a cross-sectional view showing a modification of the structure shown in FIG. 66. FIG.
72 is a plan view showing a structure of a tape-shaped transmission line portion according to a modification of the third embodiment of the present invention. FIG.
73 is a plan view showing a connection state of a tape-shaped transmission line portion of a modification of FIG. 72. FIG.
74 is a cross-sectional view showing a mounting structure of a modification of the tape-shaped transmission line portion according to the third embodiment of the present invention. FIG.
75 is a cross-sectional view showing a mounting structure of a modification of the tape-shaped transmission line portion according to the third embodiment of the present invention. FIG.
FIG. 76 is a perspective view showing an example of the structure of a high-frequency package according to Embodiment 4 of the present invention.
77 is a plan view showing the structure of the high-frequency package shown in FIG. 76. FIG.
78 is a perspective view showing a structure on the back surface side of a frame-shaped transmission line portion provided in the high-frequency package shown in FIG. 76. FIG.
79 is a cross-sectional view showing an example of a mounting structure of the high-frequency package shown in FIG. 76. FIG.
FIG. 80 is a plan view showing a structure of a high frequency package of a modification of the fourth embodiment of the present invention.
81 is a perspective view showing a structure of the high frequency package shown in FIG. 80. FIG.
82 is a perspective view showing the structure on the back surface side of the transmission line portion provided in the high frequency package shown in FIG. 81. FIG.
FIG. 83 is a plan view showing a structure of a high frequency package of a modification of the fourth embodiment of the present invention.
84 is a perspective view showing a structure of the high frequency package shown in FIG. 83. FIG.
85 is a perspective view showing a structure on the back surface side of a transmission line portion provided in the high-frequency package shown in FIG. 84. FIG.
86 is a cross-sectional view showing the structure of the high-frequency package shown in FIG. 83.
87 is a plan view showing a structure of a tape-shaped transmission line unit according to the fifth embodiment of the present invention. FIG.
88 is a plan view showing a structure of a base metal layer of the tape-shaped transmission line portion shown in FIG. 87. FIG.
89 is a plan view showing a structure of an insulating layer of the tape-shaped transmission line portion shown in FIG. 87. FIG.
90 is a plan view showing a structure of a surface metal layer of the tape-shaped transmission line portion shown in FIG. 87. FIG.
91 is a plan view showing a structure of a cover coat layer of the tape-shaped transmission line portion shown in FIG. 87. FIG.
92 is a cross-sectional view showing a cross-sectional structure cut along the line AA shown in FIG. 87. FIG.
93 is a cross-sectional view showing a cross-sectional structure cut along the line BB shown in FIG. 87. FIG.
94 is a partial cross-sectional view showing a connection structure of a base metal layer of the tape-shaped transmission line portion shown in FIG. 87. FIG.
95 is a partial cross-sectional view showing a connection structure of a surface metal layer of the tape-shaped transmission line portion shown in FIG. 87. FIG.
FIG. 96 is a plan view showing a structure of a tape-shaped transmission line portion according to a modification of the fifth embodiment of the present invention.
97 is a plan view showing the structure of the base metal layer of the tape-shaped transmission line portion shown in FIG. 96. FIG.
98 is a plan view showing a structure of an insulating layer of the tape-shaped transmission line portion shown in FIG. 96. FIG.
99 is a plan view showing a structure of a surface metal layer of the tape-shaped transmission line portion shown in FIG. 96. FIG.
100 is a plan view showing a structure of a cover coat layer of the tape-shaped transmission line portion shown in FIG. 96. FIG.
101 is a cross-sectional view showing a cross-sectional structure cut along line AA shown in FIG. 96. FIG.
102 is a cross sectional view showing a cross sectional structure taken along line BB shown in FIG. 96. FIG.
103 is a partial cross-sectional view showing a connection structure of a surface metal layer (GND) of the tape-shaped transmission line portion shown in FIG. 96. FIG.
104 is a partial cross-sectional view showing a connection structure of a surface metal layer (signal) of the tape-shaped transmission line portion shown in FIG. 96. FIG.
105 is a cross sectional view showing a structure of a tape-shaped transmission line portion according to a modification of the fifth embodiment of the present invention. FIG.
106 is a plan view showing a structure of a tape-shaped transmission line portion according to a modification of the fifth embodiment of the present invention. FIG.
FIG. 107 is a plan view showing a structure of a tape-shaped transmission line portion according to a modification of the fifth embodiment of the present invention.
FIG. 108 is a plan view showing an example of a connection structure of a tape-shaped transmission line unit according to the fifth embodiment of the present invention.
109 is a plan view showing an example of how the return current flows in the connection structure shown in FIG. 108. FIG.
110 is a plan view showing how the return current flows in the connection structure of the comparative example with respect to the connection structure shown in FIG. 108. FIG.
[Explanation of symbols]
1 High-frequency package (semiconductor device)
2 Semiconductor chip
2a Main surface
2b back
3 Ball electrode (terminal for external connection)
3a Support ball
4 Package board (wiring board)
4a Main surface
4b Back side
4c Signal surface wiring (surface wiring)
4d Internal signal wiring
4e Insulating layer
4f GND layer
4g microstrip line
4h GND surface layer wiring
4i via wiring
4j Solder resist
4k step
4l recess
5 Solder bump electrodes
6 Underfill resin
7 Coaxial cable (transmission line)
7a core wire
7b Shield
8 Frame members
9 Cap
9a opening
9b Leg
9c Notch
9d base material
9e conductive film
9f Non-conductive film
10 Thermally conductive adhesive
11 Coaxial connector
12 Glass beads
12a core wire
13 Module board (wiring board)
13a Main surface
13b reverse side
13c Signal surface wiring (surface wiring)
13d Internal signal wiring
13e Insulating layer
13f GND layer
13g microstrip line
13h opening
14 Optical module
15 Module case
16 Fin
17 Module connector
18 wind
19 Amplifier elements (other semiconductor devices)
20 Photoelectric converter (other semiconductor devices)
21 Microstrip line structure
22 Coaxial structure
23 Coplanar structure
23a Coplanar track
24 Thin coaxial connector
24a Signal surface wiring (surface wiring)
24b GND line
24c microstrip line
24d step
25 Conductive material
26 Heat dissipation block
27 Second semiconductor chip
28 Balancer
29 Screw member
30 chip capacitor
31 Solder connection
32 Auxiliary board
32a Main surface
32b reverse side
32c Signal surface wiring (surface wiring)
32d Internal signal wiring
32e Insulating layer
32f GND layer
32g microstrip line
32h opening
33 Pin member
34 Thin ball electrode
35 Testing board
35a Interposer
35b Pin member
35c Signal surface wiring
35d Internal signal wiring
35e Insulating layer
35f GND layer
35g microstrip line
36 Chip side structure
37 Cable side structure
38 RF package (semiconductor device)
39 Optical module (electronic device)
40 Tape-like line section (transmission line section)
40a Plate-shaped lead (wiring)
40b Base metal layer (grounding conductor layer)
40c Insulating layer
40d surface metal layer
40e Cover coat layer
40f beer
40g Surface layer signal lead (transmission line)
40h Surface layer GND lead (transmission line)
40i microstrip line
40j metal layer
40k cutout
40 l adhesive
40m surface protective layer
40n continuous via
41 Mounting board
41a Signal surface wiring (electrode)
41b GND surface layer wiring (electrode)
42 Solder
43 Anisotropic conductive resin
43a conductive particles
44 Other semiconductor packages (other semiconductor devices)
45 Forked tape-shaped line (transmission line)
46 Plate line part (transmission line part)
46a Plate-shaped lead (wiring)
46b Base metal layer (grounding conductor layer)
46c Surface layer signal lead (transmission line)
46d Surface layer GND lead (transmission line)
46e Surface metal layer
46f insulation layer
46g connection
47 High Frequency Package (Semiconductor Device)
48 Adhesive
49 Tape-shaped line part (transmission line part)
50 Coplanar structure
51 GND coplanar structure
52, 53, 55 Tape-like line section (transmission line section)
54 Return current

Claims (11)

A wiring board with surface wiring formed on the main surface;
A semiconductor chip mounted and electrically connected to the wiring board using flip chip mounting;
A plurality of external connection terminals provided in the back surface opposite to the main surface of the wiring board;
Electrically connected to the surface wires of the wiring board, a semiconductor device which have a a transmission line section comprising a tape-like member,
Input of a high-frequency signal from a mounting substrate on which the semiconductor device is mounted and electrically connected to the semiconductor device via the external connection terminal, and a high-frequency signal from another semiconductor device mounted on the mounting substrate input, the semiconductor device output of the high frequency signal, at least one of the output of the high-frequency signal to the other semiconductor device is characterized by being performed via said transmission line section to the mounting substrate.   2. The semiconductor device according to claim 1, wherein the transmission line portion has a plate-like lead, and the plate-like lead is electrically connected to the surface layer wiring. .   The semiconductor device according to claim 1, wherein the transmission line portion protrudes from the transmission line portion in a direction crossing the transmission line, and a connection portion is provided integrally with the transmission line portion. .   4. The semiconductor device according to claim 3, wherein the connection portion is disposed on the semiconductor chip.   2. The semiconductor device according to claim 1, wherein the transmission line section includes a wiring and a ground conductor layer disposed via the wiring and an insulating layer.   2. The semiconductor device according to claim 1, wherein the semiconductor device is a ball grid array having a plurality of bump electrodes as the external connection terminals.   2. The semiconductor device according to claim 1, wherein the semiconductor device is a land grid array having a plurality of land electrodes as the external connection terminals.   2. The semiconductor device according to claim 1, wherein the semiconductor chip divides a first frequency input signal into a plurality of second frequency signals smaller than the first frequency, or outputs a plurality of signals. A semiconductor device comprising: a circuit that outputs an input signal having a third frequency integrated with a signal having a fourth frequency higher than the third frequency.   9. The semiconductor device according to claim 8, wherein the first and fourth frequencies are 1 gigahertz or higher.   2. The semiconductor device according to claim 1, wherein the semiconductor chip is mounted on the wiring board via a plurality of solder bump electrodes. A wiring board;
A semiconductor chip mounted and electrically connected to the wiring board using flip chip mounting;
A plurality of external connection terminals provided in the back surface opposite to the main surface of the wiring board;
Has electrically connected plate-shaped lead wire of the wiring substrate, is formed on the main surface of the wiring board, a semiconductor device which have a a transmission line section comprising a tape-like member,
Input of a high-frequency signal from a mounting substrate on which the semiconductor device is mounted and electrically connected to the semiconductor device via the external connection terminal, and a high-frequency signal from another semiconductor device mounted on the mounting substrate input, the semiconductor device output of the high frequency signal, at least one of the output of the high-frequency signal to the other semiconductor device is characterized by being performed through the plate-like leads to the mounting substrate.

Images