[go: up one dir, main page]

IT8322982A0 - Dispositivo elettronico includente una piastrina comprendente un substrato ed una struttura di collegamento elettrico formata su una superfice maggiore del substrato e costituita da unapellicola elettricamente isolante e da uno strato di collegamento metallico. - Google Patents

Dispositivo elettronico includente una piastrina comprendente un substrato ed una struttura di collegamento elettrico formata su una superfice maggiore del substrato e costituita da unapellicola elettricamente isolante e da uno strato di collegamento metallico.

Info

Publication number
IT8322982A0
IT8322982A0 IT8322982A IT2298283A IT8322982A0 IT 8322982 A0 IT8322982 A0 IT 8322982A0 IT 8322982 A IT8322982 A IT 8322982A IT 2298283 A IT2298283 A IT 2298283A IT 8322982 A0 IT8322982 A0 IT 8322982A0
Authority
IT
Italy
Prior art keywords
substrate
electronic device
insulating film
device including
electrically insulating
Prior art date
Application number
IT8322982A
Other languages
English (en)
Other versions
IT8322982A1 (it
IT1168293B (it
Inventor
Tohru Inaba
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of IT8322982A0 publication Critical patent/IT8322982A0/it
Publication of IT8322982A1 publication Critical patent/IT8322982A1/it
Application granted granted Critical
Publication of IT1168293B publication Critical patent/IT1168293B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H01L23/53295—Stacked insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
IT8322982A 1982-09-24 1983-09-23 Dispositivo elettronico includente una piastrina comprendente un substrato ed una struttura di collegamento elettrico formata su una superfice maggiore del substrato e costituita da una pellicola elettricamente isolante e da uno strato di collegamento metallico IT1168293B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57164839A JPS5955037A (ja) 1982-09-24 1982-09-24 半導体装置

Publications (3)

Publication Number Publication Date
IT8322982A0 true IT8322982A0 (it) 1983-09-23
IT8322982A1 IT8322982A1 (it) 1985-03-23
IT1168293B IT1168293B (it) 1987-05-20

Family

ID=15800899

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8322982A IT1168293B (it) 1982-09-24 1983-09-23 Dispositivo elettronico includente una piastrina comprendente un substrato ed una struttura di collegamento elettrico formata su una superfice maggiore del substrato e costituita da una pellicola elettricamente isolante e da uno strato di collegamento metallico

Country Status (7)

Country Link
US (1) US4841354A (it)
JP (1) JPS5955037A (it)
KR (1) KR910007101B1 (it)
DE (1) DE3331624C2 (it)
FR (1) FR2533750B1 (it)
GB (1) GB2128025B (it)
IT (1) IT1168293B (it)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60138940A (ja) * 1983-12-27 1985-07-23 Toshiba Corp 半導体装置の製造方法
US4656055A (en) * 1984-12-07 1987-04-07 Rca Corporation Double level metal edge seal for a semiconductor device
IT1185731B (it) * 1984-12-07 1987-11-12 Rca Corp Sistema metallico di tenuta marginale,a due livelli,per un dispositivo semicondutore
US5111276A (en) * 1985-03-19 1992-05-05 National Semiconductor Corp. Thick bus metallization interconnect structure to reduce bus area
JPS61283160A (ja) * 1985-06-10 1986-12-13 Mitsubishi Electric Corp 半導体記憶装置
JPH0715970B2 (ja) * 1985-09-26 1995-02-22 富士通株式会社 半導体装置の製造方法
JPS62194644A (ja) * 1986-02-20 1987-08-27 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2557898B2 (ja) * 1987-07-31 1996-11-27 株式会社東芝 半導体装置
JPH077783B2 (ja) * 1988-03-18 1995-01-30 株式会社東芝 電気的接続部に銅もしくは銅合金製金属細線を配置する半導体装置
US5187558A (en) * 1989-05-08 1993-02-16 Mitsubishi Denki Kabushiki Kaisha Stress reduction structure for a resin sealed semiconductor device
US5216280A (en) * 1989-12-02 1993-06-01 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device having pads at periphery of semiconductor chip
SE465193B (sv) * 1989-12-06 1991-08-05 Ericsson Telefon Ab L M Foer hoegspaenning avsedd ic-krets
JP3144817B2 (ja) * 1990-03-23 2001-03-12 株式会社東芝 半導体装置
JPH04256371A (ja) * 1991-02-08 1992-09-11 Toyota Autom Loom Works Ltd 半導体装置及びその製造方法
US5252382A (en) * 1991-09-03 1993-10-12 Cornell Research Foundation, Inc. Interconnect structures having patterned interfaces to minimize stress migration and related electromigration damages
US5430325A (en) * 1992-06-30 1995-07-04 Rohm Co. Ltd. Semiconductor chip having dummy pattern
US5306945A (en) * 1992-10-27 1994-04-26 Micron Semiconductor, Inc. Feature for a semiconductor device to reduce mobile ion contamination
US5439731A (en) * 1994-03-11 1995-08-08 Cornell Research Goundation, Inc. Interconnect structures containing blocked segments to minimize stress migration and electromigration damage
JP3504421B2 (ja) * 1996-03-12 2004-03-08 株式会社ルネサステクノロジ 半導体装置
TW448524B (en) * 1997-01-17 2001-08-01 Seiko Epson Corp Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment
US6137155A (en) * 1997-12-31 2000-10-24 Intel Corporation Planar guard ring
US6562674B1 (en) * 1999-07-06 2003-05-13 Matsushita Electronics Corporation Semiconductor integrated circuit device and method of producing the same
US6614118B1 (en) * 1999-12-15 2003-09-02 Intel Corporation Structures to mechanically stabilize isolated top-level metal lines
DE10126955A1 (de) * 2001-06-01 2002-12-05 Philips Corp Intellectual Pty Integrierte Schaltung mit energieabsorbierender Struktur
JP4501715B2 (ja) * 2005-02-16 2010-07-14 セイコーエプソン株式会社 Ｍｅｍｓ素子およびｍｅｍｓ素子の製造方法
DE102007020263B4 (de) 2007-04-30 2013-12-12 Infineon Technologies Ag Verkrallungsstruktur
US9076821B2 (en) 2007-04-30 2015-07-07 Infineon Technologies Ag Anchoring structure and intermeshing structure
US20110079908A1 (en) * 2009-10-06 2011-04-07 Unisem Advanced Technologies Sdn. Bhd. Stress buffer to protect device features
DE112013006871T5 (de) * 2013-03-27 2015-12-10 Toyota Jidosha Kabushiki Kaisha Vertikale Halbleitervorrichtung

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1424544A (fr) * 1964-12-03 1966-01-15 Csf Procédé de passivation des éléments semiconducteurs
JPS492798B1 (it) * 1969-04-16 1974-01-22
GB1249812A (en) * 1969-05-29 1971-10-13 Ferranti Ltd Improvements relating to semiconductor devices
GB1251456A (it) * 1969-06-12 1971-10-27
US3751292A (en) * 1971-08-20 1973-08-07 Motorola Inc Multilayer metallization system
JPS4835778A (it) * 1971-09-09 1973-05-26
US4001870A (en) * 1972-08-18 1977-01-04 Hitachi, Ltd. Isolating protective film for semiconductor devices and method for making the same
JPS5421073B2 (it) * 1974-04-15 1979-07-27
US3997964A (en) * 1974-09-30 1976-12-21 General Electric Company Premature breakage resistant semiconductor wafer and method for the manufacture thereof
US3985597A (en) * 1975-05-01 1976-10-12 International Business Machines Corporation Process for forming passivated metal interconnection system with a planar surface
DE2603747A1 (de) * 1976-01-31 1977-08-04 Licentia Gmbh Integrierte schaltungsanordnung
JPS56140648A (en) * 1980-04-04 1981-11-04 Hitachi Ltd Semiconductor integrated circuit device
JPS5745259A (en) * 1980-09-01 1982-03-15 Hitachi Ltd Resin sealing type semiconductor device
IT1153991B (it) * 1980-10-29 1987-01-21 Rca Corp Metodo per creare una struttura a metallizzazione dielettrico
JPS57113235A (en) * 1980-12-29 1982-07-14 Nec Corp Semiconductor device
DE3137914A1 (de) * 1981-09-23 1983-04-07 Siemens AG, 1000 Berlin und 8000 München Anordnung zur kompensation von korrosionseffekten inintegrierten halbleiterschaltkreisen
JPS5913364A (ja) * 1982-07-14 1984-01-24 Toshiba Corp 半導体装置

Also Published As

Publication number Publication date
DE3331624A1 (de) 1984-03-29
KR840005921A (ko) 1984-11-19
IT8322982A1 (it) 1985-03-23
GB2128025A (en) 1984-04-18
US4841354A (en) 1989-06-20
GB8324765D0 (en) 1983-10-19
KR910007101B1 (ko) 1991-09-18
IT1168293B (it) 1987-05-20
FR2533750A1 (fr) 1984-03-30
JPH0373136B2 (it) 1991-11-20
JPS5955037A (ja) 1984-03-29
DE3331624C2 (de) 1994-01-20
GB2128025B (en) 1986-05-21
FR2533750B1 (fr) 1986-01-24

Similar Documents

Publication Publication Date Title
IT8322982A0 (it) Dispositivo elettronico includente una piastrina comprendente un substrato ed una struttura di collegamento elettrico formata su una superfice maggiore del substrato e costituita da unapellicola elettricamente isolante e da uno strato di collegamento metallico.
KR930014905A (ko) 기밀 패키지된 고밀도 상호연결(hdi)전자시스템
ES8206095A1 (es) Dispositivo rectificador a base de semiconductores
JPS5939949U (ja) 高周波回路装置
GB1373008A (en) Electronic components
IT1084172B (it) Procedimento e composizione per il rivestimento di un substrato elettricamente conduttore
GB1152809A (en) Electric Circuit Assembly
JPS61160946A (ja) 半導体装置の接続構造体
GB1246057A (en) Improvements in or relating to thin-film electronic circuit assemblies
JPS575356A (en) Hybrid integrated circuit device
JP2756223B2 (ja) 基板の貫通電極
BE788894A (fr) Couche electriquement conductrice sur base de forte resistivite, procede de fabrication et application d'une telle couchecomme resistance electrique
EP0095283A3 (en) Memory device
EP0134692A3 (en) Multilayer semiconductor devices with embedded conductor structure
JPH08107257A (ja) 電磁波シールドを有するプリント配線板の製造方法
DE3170365D1 (en) Electrically conductive substrate with insulating coating and coating for same
FR2172200B1 (it)
FR2492395B1 (fr) Encres conductrices ameliorees et leur application dans des circuits electriques sur plaquettes metalliques revetues de porcelaine
IT1051793B (it) Dispositivo di connessione elettrico e di sostegno per un substrato di ceramica o di vetro con configurazioni circuitali disposte su questo con la tecnologia dei circuiti a strati
ES2101032T3 (es) Metodo para formar un contacto electricamente conductor sobre un sustrato.
JPS57160156A (en) Semiconductor device
JPS5211862A (en) Semiconductor device
JPS59119892A (ja) 電気回路用ベ−ス基板
JPS5552231A (en) Semiconductor attaching device
JPS5280798A (en) Electrical connection equipment for display substance

Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19950927