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IT8220049A0 - Apparecchiatura per il controllo di memorie. - Google Patents

Apparecchiatura per il controllo di memorie.

Info

Publication number
IT8220049A0
IT8220049A0 IT8220049A IT2004982A IT8220049A0 IT 8220049 A0 IT8220049 A0 IT 8220049A0 IT 8220049 A IT8220049 A IT 8220049A IT 2004982 A IT2004982 A IT 2004982A IT 8220049 A0 IT8220049 A0 IT 8220049A0
Authority
IT
Italy
Prior art keywords
equipment
memory control
memory
control
Prior art date
Application number
IT8220049A
Other languages
English (en)
Other versions
IT1150270B (it
Inventor
Henry C Sibley
Original Assignee
Gen Signal Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Signal Corp filed Critical Gen Signal Corp
Publication of IT8220049A0 publication Critical patent/IT8220049A0/it
Application granted granted Critical
Publication of IT1150270B publication Critical patent/IT1150270B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/20—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits using counters or linear-feedback shift registers [LFSR]

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Complex Calculations (AREA)
IT20049/82A 1981-03-09 1982-03-09 Apparecchiatura per il controllo di memorie IT1150270B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/241,819 US4485435A (en) 1981-03-09 1981-03-09 Memory management method and apparatus for initializing and/or clearing R/W storage areas

Publications (2)

Publication Number Publication Date
IT8220049A0 true IT8220049A0 (it) 1982-03-09
IT1150270B IT1150270B (it) 1986-12-10

Family

ID=22912310

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20049/82A IT1150270B (it) 1981-03-09 1982-03-09 Apparecchiatura per il controllo di memorie

Country Status (6)

Country Link
US (1) US4485435A (it)
CA (1) CA1166752A (it)
GB (1) GB2094524B (it)
IT (1) IT1150270B (it)
NL (1) NL8200913A (it)
ZA (1) ZA821015B (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4751636A (en) * 1981-03-09 1988-06-14 General Signal Corp. Memory management method and apparatus for initializing and/or clearing R/W storage areas
US4914577A (en) * 1987-07-16 1990-04-03 Icon International, Inc. Dynamic memory management system and method
US4839796A (en) * 1987-07-16 1989-06-13 Icon International, Inc. Static frame digital memory
US4873705A (en) * 1988-01-27 1989-10-10 John Fluke Mfg. Co., Inc. Method of and system for high-speed, high-accuracy functional testing of memories in microprocessor-based units
US4974167A (en) * 1989-02-28 1990-11-27 Tektronix, Inc. Erasable data acquisition and storage instrument
US5247654A (en) * 1989-05-19 1993-09-21 Compaq Computer Corporation Minimum reset time hold circuit for delaying the completion of a second and complementary operation
JPH0331928A (ja) * 1989-06-29 1991-02-12 Fujitsu Ltd フレーム変換回路
US5623621A (en) * 1990-11-02 1997-04-22 Analog Devices, Inc. Apparatus for generating target addresses within a circular buffer including a register for storing position and size of the circular buffer
WO1992008186A1 (en) * 1990-11-02 1992-05-14 Analog Devices, Inc. Address generator for circular buffer
AU660011B2 (en) * 1991-04-26 1995-06-08 Nec Corporation Method and system for fault coverage testing memory
US5704033A (en) * 1994-10-07 1997-12-30 Lg Semicon Co., Ltd. Apparatus and method for testing a program memory for a one-chip microcomputer
US6550058B1 (en) 2000-02-03 2003-04-15 International Business Machines Corporation Stack clearing device and method
US8468077B2 (en) * 2005-01-14 2013-06-18 Taxnet Inc. Distributed tax-return-preparation processing

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3351917A (en) * 1965-02-05 1967-11-07 Burroughs Corp Information storage and retrieval system having a dynamic memory device
US3654448A (en) * 1970-06-19 1972-04-04 Ibm Instruction execution and re-execution with in-line branch sequences
JPS5255446A (en) * 1975-10-31 1977-05-06 Toshiba Corp Information transfer control system
US4055851A (en) * 1976-02-13 1977-10-25 Digital Equipment Corporation Memory module with means for generating a control signal that inhibits a subsequent overlapped memory cycle during a reading operation portion of a reading memory cycle
US4149244A (en) * 1976-06-07 1979-04-10 Amdahl Corporation Data processing system including a program-executing secondary system controlling a program-executing primary system
US4058851A (en) * 1976-10-18 1977-11-15 Sperry Rand Corporation Conditional bypass of error correction for dual memory access time selection
FR2382724A1 (fr) * 1977-03-04 1978-09-29 Cii Honeywell Bull Systeme pour controler la validite de la lecture par une machine d'un code porte sur un document
MX4130E (es) * 1977-05-20 1982-01-04 Amdahl Corp Mejoras en sistema de procesamiento de datos y escrutinio de informacion utilizando sumas de comprobacion
US4195341A (en) * 1977-12-22 1980-03-25 Honeywell Information Systems Inc. Initialization of cache store to assure valid data
US4167782A (en) * 1977-12-22 1979-09-11 Honeywell Information Systems Inc. Continuous updating of cache store
US4195343A (en) * 1977-12-22 1980-03-25 Honeywell Information Systems Inc. Round robin replacement for a cache store
US4184201A (en) * 1978-04-26 1980-01-15 Sperry Rand Corporation Integrating processor element
US4270168A (en) * 1978-08-31 1981-05-26 United Technologies Corporation Selective disablement in fail-operational, fail-safe multi-computer control system
US4251863A (en) * 1979-03-15 1981-02-17 Sperry Corporation Apparatus for correction of memory errors
JPS5622300A (en) * 1979-08-01 1981-03-02 Fanuc Ltd Memory check method
DE2939461C2 (de) * 1979-09-28 1989-07-20 Siemens AG, 1000 Berlin und 8000 München Verfahren zum Feststellen von Datenstörungen in Speichern
US4334307A (en) * 1979-12-28 1982-06-08 Honeywell Information Systems Inc. Data processing system with self testing and configuration mapping capability

Also Published As

Publication number Publication date
GB2094524A (en) 1982-09-15
NL8200913A (nl) 1982-10-01
GB2094524B (en) 1985-06-05
CA1166752A (en) 1984-05-01
ZA821015B (en) 1983-01-26
IT1150270B (it) 1986-12-10
US4485435A (en) 1984-11-27

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970329