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IT1255814B - Circuito generatore di tensione di alimentazione interna programmabileelettricamente - Google Patents

Circuito generatore di tensione di alimentazione interna programmabileelettricamente

Info

Publication number
IT1255814B
IT1255814B ITMI921964A ITMI921964A IT1255814B IT 1255814 B IT1255814 B IT 1255814B IT MI921964 A ITMI921964 A IT MI921964A IT MI921964 A ITMI921964 A IT MI921964A IT 1255814 B IT1255814 B IT 1255814B
Authority
IT
Italy
Prior art keywords
supply voltage
voltage
internal
power supply
voltage circuit
Prior art date
Application number
ITMI921964A
Other languages
English (en)
Inventor
Yong-Ho Park
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI921964A0 publication Critical patent/ITMI921964A0/it
Publication of ITMI921964A1 publication Critical patent/ITMI921964A1/it
Application granted granted Critical
Publication of IT1255814B publication Critical patent/IT1255814B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/819—Bias arrangements for gate electrodes of FETs, e.g. RC networks or voltage partitioning circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

Circuito generatore di tensione di alimentazione interna di un dispositivo di memoria e semiconduttore. Il circuito generatore di tensione di alimentazione interna avente un circuito sensore (100) di tensione ed un'unità di controllo (300) di tensione di riferimento produce una tensione di alimentazione interna int.VCC di un dato livello di tensione di riferimento VREF, e un dato livello di tensione di alimentazione esterno ext.Vcc. Così, quando un'alta tensione superiore alla tensione di funzionamento di una piastrina di circuito integrato viene applicata ad una piazzuola della piastrina, la tensione di alimentazione interna è alzata al livello della tensione di alimentazione esterna. Perciò, poiché sollecitazione effettiva è aggiunta alla piastrina durante la "prova di bruciatura", può essere facilmente rivelata una piastrina difettosa. Conseguente-mente, l'affidabilità del dispositivo di memoria a semiconduttore può essere migliorata.
ITMI921964A 1991-08-19 1992-08-07 Circuito generatore di tensione di alimentazione interna programmabileelettricamente IT1255814B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910014265A KR930008886B1 (ko) 1991-08-19 1991-08-19 전기적으로 프로그램 할 수 있는 내부전원 발생회로

Publications (3)

Publication Number Publication Date
ITMI921964A0 ITMI921964A0 (it) 1992-08-07
ITMI921964A1 ITMI921964A1 (it) 1994-02-07
IT1255814B true IT1255814B (it) 1995-11-16

Family

ID=19318747

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI921964A IT1255814B (it) 1991-08-19 1992-08-07 Circuito generatore di tensione di alimentazione interna programmabileelettricamente

Country Status (7)

Country Link
US (1) US5396113A (it)
JP (2) JPH05205469A (it)
KR (1) KR930008886B1 (it)
DE (1) DE4226048C2 (it)
GB (1) GB2258925B (it)
IT (1) IT1255814B (it)
TW (1) TW209927B (it)

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Also Published As

Publication number Publication date
JP2550480Y2 (ja) 1997-10-15
JPH08435U (ja) 1996-02-27
DE4226048A1 (de) 1993-02-25
ITMI921964A1 (it) 1994-02-07
JPH05205469A (ja) 1993-08-13
DE4226048C2 (de) 1996-07-04
KR930008886B1 (ko) 1993-09-16
GB2258925B (en) 1995-08-30
ITMI921964A0 (it) 1992-08-07
US5396113A (en) 1995-03-07
TW209927B (it) 1993-07-21
GB2258925A (en) 1993-02-24
GB9216934D0 (en) 1992-09-23
KR930005187A (ko) 1993-03-23

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Legal Events

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0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970826