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IT1224656B - Procedimento per la fabbricazione di condensatori integrati in tecnologia mos. - Google Patents

Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.

Info

Publication number
IT1224656B
IT1224656B IT8723200A IT2320087A IT1224656B IT 1224656 B IT1224656 B IT 1224656B IT 8723200 A IT8723200 A IT 8723200A IT 2320087 A IT2320087 A IT 2320087A IT 1224656 B IT1224656 B IT 1224656B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
mos technology
capacitors integrated
capacitors
Prior art date
Application number
IT8723200A
Other languages
English (en)
Other versions
IT8723200A0 (it
Inventor
Danilo Re
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT8723200A priority Critical patent/IT1224656B/it
Publication of IT8723200A0 publication Critical patent/IT8723200A0/it
Priority to EP88120975A priority patent/EP0321860A3/en
Priority to JP63324719A priority patent/JP2766492B2/ja
Application granted granted Critical
Publication of IT1224656B publication Critical patent/IT1224656B/it
Priority to US08/675,520 priority patent/US5851871A/en
Priority to JP9203590A priority patent/JPH10144871A/ja

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
IT8723200A 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos. IT1224656B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8723200A IT1224656B (it) 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.
EP88120975A EP0321860A3 (en) 1987-12-23 1988-12-15 Process for manufacturing integrated capacitors in mos technology
JP63324719A JP2766492B2 (ja) 1987-12-23 1988-12-21 Ｍｏｓ技術で集積キャパシタを製造するための方法
US08/675,520 US5851871A (en) 1987-12-23 1996-07-03 Process for manufacturing integrated capacitors in MOS technology
JP9203590A JPH10144871A (ja) 1987-12-23 1997-07-29 Ｃｍｏｓ半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8723200A IT1224656B (it) 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.

Publications (2)

Publication Number Publication Date
IT8723200A0 IT8723200A0 (it) 1987-12-23
IT1224656B true IT1224656B (it) 1990-10-18

Family

ID=11204822

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8723200A IT1224656B (it) 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.

Country Status (3)

Country Link
EP (1) EP0321860A3 (it)
JP (2) JP2766492B2 (it)
IT (1) IT1224656B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5851871A (en) * 1987-12-23 1998-12-22 Sgs-Thomson Microelectronics, S.R.L. Process for manufacturing integrated capacitors in MOS technology
IT1237894B (it) * 1989-12-14 1993-06-18 Sgs Thomson Microelectronics Processo per la fabbricazione di circuiti integrati comprendenti componenti elettronici di due tipi diversi aventi ciascuno coppie di elettrodi ricavati dagli stessi strati di silicio policristallino e separati da dielettrici diversi
FR2658951B1 (fr) * 1990-02-23 1992-05-07 Bonis Maurice Procede de fabrication d'un circuit integre pour filiere analogique rapide utilisant des lignes d'interconnexions locales en siliciure.
KR0167274B1 (ko) * 1995-12-07 1998-12-15 문정환 씨모스 아날로그 반도체장치와 그 제조방법
CN115241131B (zh) * 2022-08-05 2025-03-14 重庆中科渝芯电子有限公司 多层栅模拟cmos工艺边缘应力优化集成方法和低电压系数多晶电容器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4261772A (en) * 1979-07-06 1981-04-14 American Microsystems, Inc. Method for forming voltage-invariant capacitors for MOS type integrated circuit device utilizing oxidation and reflow techniques
US4577390A (en) * 1983-02-23 1986-03-25 Texas Instruments Incorporated Fabrication of polysilicon to polysilicon capacitors with a composite dielectric layer
JPS60113960A (ja) * 1983-11-25 1985-06-20 Nec Corp 半導体容量装置
US4639274A (en) * 1984-11-28 1987-01-27 Fairchild Semiconductor Corporation Method of making precision high-value MOS capacitors
ATE64237T1 (de) * 1985-05-22 1991-06-15 Siemens Ag Verfahren zum herstellen von mit bor und phosphor dotierten siliziumoxid-schichten fuer integrierte halbleiterschaltungen.
EP0208459B1 (en) * 1985-06-24 1992-03-18 Silicon Valley Group, Inc. Process for the chemical vapour deposition of a thin film of oxide on a silicon wafer

Also Published As

Publication number Publication date
EP0321860A2 (en) 1989-06-28
JP2766492B2 (ja) 1998-06-18
JPH02138769A (ja) 1990-05-28
IT8723200A0 (it) 1987-12-23
EP0321860A3 (en) 1990-03-07
JPH10144871A (ja) 1998-05-29

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227