IT1210751B - Sommatore veloce in tecnologia c mos - Google Patents

Sommatore veloce in tecnologia c mos

Info

Publication number: IT1210751B
Authority: IT; Italy
Prior art keywords: summator; fast; mos technology; mos; technology
Prior art date: 1987-05-20

Application number

IT8767440A

Other languages

English (en)

Other versions

IT8767440A0 (it

Inventor

Luigi Licciardi

Alessandro Torielli

Original Assignee

Cselt Centro Studi Lab Telecom

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1987-05-20

Filing date

1987-05-20

Publication date

1989-09-20

1987-05-20 Application filed by Cselt Centro Studi Lab Telecom filed Critical Cselt Centro Studi Lab Telecom

1987-05-20 Priority to IT8767440A priority Critical patent/IT1210751B/it

1987-05-20 Publication of IT8767440A0 publication Critical patent/IT8767440A0/it

1988-04-27 Priority to US07/186,895 priority patent/US4905179A/en

1988-05-16 Priority to CA000566864A priority patent/CA1282176C/en

1988-05-17 Priority to JP63118422A priority patent/JPS63304322A/ja

1988-05-18 Priority to EP19880107975 priority patent/EP0291963A3/en

1989-09-20 Application granted granted Critical

1989-09-20 Publication of IT1210751B publication Critical patent/IT1210751B/it

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
- G06F7/5306—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with row wise addition of partial products
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
- G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/3876—Alternation of true and inverted stages

Landscapes

Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Engineering & Computer Science (AREA)
Computational Mathematics (AREA)
Mathematical Analysis (AREA)
Pure & Applied Mathematics (AREA)
Mathematical Optimization (AREA)
Theoretical Computer Science (AREA)
Computing Systems (AREA)
General Engineering & Computer Science (AREA)
Logic Circuits (AREA)
Manipulation Of Pulses (AREA)

IT8767440A 1987-05-20 1987-05-20 Sommatore veloce in tecnologia c mos IT1210751B (it)

Priority Applications (5)

Application Number	Priority Date	Filing Date	Title
IT8767440A IT1210751B (it)	1987-05-20	1987-05-20	Sommatore veloce in tecnologia c mos
US07/186,895 US4905179A (en)	1987-05-20	1988-04-27	CMOS cell for logic operations with fast carry
CA000566864A CA1282176C (en)	1987-05-20	1988-05-16	Fast c-mos adder
JP63118422A JPS63304322A (ja)	1987-05-20	1988-05-17	高速ｃ−ｍｏｓ加算器
EP19880107975 EP0291963A3 (en)	1987-05-20	1988-05-18	Fast c-mos adder

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
IT8767440A IT1210751B (it)	1987-05-20	1987-05-20	Sommatore veloce in tecnologia c mos

Publications (2)

Publication Number	Publication Date
IT8767440A0 IT8767440A0 (it)	1987-05-20
IT1210751B true IT1210751B (it)	1989-09-20

Family

ID=11302401

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
IT8767440A IT1210751B (it)	1987-05-20	1987-05-20	Sommatore veloce in tecnologia c mos

Country Status (5)

Country	Link
US (1)	US4905179A (it)
EP (1)	EP0291963A3 (it)
JP (1)	JPS63304322A (it)
CA (1)	CA1282176C (it)
IT (1)	IT1210751B (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
DE59010655D1 (de) *	1990-04-25	1997-04-03	Itt Ind Gmbh Deutsche	Paralleladdierwerk
JPH04230521A (ja) *	1990-12-29	1992-08-19	Nec Corp	ビット反転演算器
KR960004572B1 (ko) *	1994-01-28	1996-04-09	금성일렉트론주식회사	산술연산 논리회로
DE69530838D1 (de) *	1995-06-30	2003-06-26	St Microelectronics Srl	Basiszelle zum Vergleichen eines ersten und eines zweiten digitalen Signals und entsprechender digitaler Komparator
KR100255962B1 (ko) *	1995-11-03	2000-05-01	윤종용	3-상태회로의 출력 안정화회로
JP2002312160A (ja) *	2001-04-13	2002-10-25	Fujitsu Ltd	２進キャリー演算回路並びにこれを用いた半加算回路及びインクリメンタ、２進ボロー演算回路並びにこれを用いた半減算回路及びデクリメンタ
CN109828743B (zh) *	2019-02-01	2021-07-09	杭州嘉楠耘智信息科技有限公司	加法器进位输出计算电路
US11669302B2 (en) *	2019-10-16	2023-06-06	Purdue Research Foundation	In-memory bit-serial addition system

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4052604A (en) *	1976-01-19	1977-10-04	Hewlett-Packard Company	Binary adder
JPS52152132A (en) *	1976-06-14	1977-12-17	Matsushita Electric Ind Co Ltd	Carry siganl generator circuit
US4369500A (en) *	1980-10-20	1983-01-18	Motorola Inc.	High speed NXM bit digital, repeated addition type multiplying circuit
JPS58211252A (ja) *	1982-06-03	1983-12-08	Toshiba Corp	全加算器
US4523292A (en) *	1982-09-30	1985-06-11	Rca Corporation	Complementary FET ripple carry binary adder circuit
JPS59139447A (ja) *	1983-01-28	1984-08-10	Matsushita Electric Ind Co Ltd	全加算器
EP0122946B1 (de) *	1983-04-15	1987-09-09	Deutsche ITT Industries GmbH	CMOS-Volladdierstufe
JPS6170636A (ja) *	1984-09-10	1986-04-11	レイセオン　カンパニ−	全加算器回路
US4706210A (en) *	1984-12-13	1987-11-10	The Johns Hopkins University	Guild array multiplier for binary numbers in two's complement notation
US4685079A (en) *	1984-12-14	1987-08-04	Rca Corporation	Ripple-borrow binary subtraction circuit
DE3674387D1 (de) *	1986-03-22	1990-10-25	Itt Ind Gmbh Deutsche	Cmos-volladdierstufe.
US4739503A (en) *	1986-04-21	1988-04-19	Rca Corporation	Carry/borrow propagate adder/subtractor
US4768161A (en) *	1986-11-14	1988-08-30	International Business Machines Corporation	Digital binary array multipliers using inverting full adders

1987
- 1987-05-20 IT IT8767440A patent/IT1210751B/it active
1988
- 1988-04-27 US US07/186,895 patent/US4905179A/en not_active Expired - Fee Related
- 1988-05-16 CA CA000566864A patent/CA1282176C/en not_active Expired - Lifetime
- 1988-05-17 JP JP63118422A patent/JPS63304322A/ja active Pending
- 1988-05-18 EP EP19880107975 patent/EP0291963A3/en not_active Withdrawn

Also Published As

Publication number	Publication date
JPS63304322A (ja)	1988-12-12
EP0291963A2 (en)	1988-11-23
US4905179A (en)	1990-02-27
EP0291963A3 (en)	1991-03-06
IT8767440A0 (it)	1987-05-20
CA1282176C (en)	1991-03-26

Publication	Publication Date	Title
DK646888A (da)	1989-05-21	Skaarsamlemaskine
IS3416A7 (is)	1989-02-15	Orkuveitustöð.
ES539731A0 (es)	1985-11-16	Perfeccionamientos en calandrias
IT1185638B (it)	1987-11-12	Amplificatore operazionale tutto differenziale per circuiti integrati in tecnologia mos
DE3685360D1 (de)	1992-06-25	Hochglanzpoliergeraet.
ES1014018Y (es)	1991-08-01	Mejoras introducidas en escobillas.
FI87937C (fi)	1993-03-10	Elektrolytisk cell
IT1210751B (it)	1989-09-20	Sommatore veloce in tecnologia c mos
FI881031A (fi)	1988-03-04	Foerbaettringar till munstycken foer injektion av aemnen in i vaetskor.
DE3888499D1 (de)	1994-04-21	Trockenzelle.
KR890002927U (ko)	1989-04-08	태양전지를 이용한 휴대용 선풍기
DK385986D0 (da)	1986-08-13	Solariebaenk
FI881648A0 (fi)	1988-04-08	Shampookoostumuksia
FI851796A0 (fi)	1985-05-07	Kamflaenskonstruktion foer fastsaettning av tvao in i varandra placerbara roerformiga stycken.
DE3876815D1 (de)	1993-02-04	Uv-haertende gelzusammensetzung.
KR880001913U (ko)	1988-04-07	연탄집게
KR880011413U (ko)	1988-08-25	다용도용 손가방
IT8468199A0 (it)	1984-12-04	Circuito per la precarica di busper componenti integrati in tecnologia mos
FI830093L (fi)	1983-09-23	Av formmotsvarigt in i varandra gripande delar uppbyggd luftkontaktor
AR230786A1 (es)	1984-07-31	Mejoras en barriletes
KR860009087U (ko)	1986-07-31	완구에 사용되는 스피커의 확성장치
BR6501864U (pt)	1986-02-25	Disposicao introduzida em alimentador compacto
SE8700550D0 (sv)	1987-02-12	Eldkloss i biomassa
KR890023924U (ko)	1989-12-04	채널 변환시 뮤우트 회로
BR8701989A (pt)	1988-10-25	Esgarcadeira