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GB2094552A - A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate - Google Patents

A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate Download PDF

Info

Publication number
GB2094552A
GB2094552A GB8206106A GB8206106A GB2094552A GB 2094552 A GB2094552 A GB 2094552A GB 8206106 A GB8206106 A GB 8206106A GB 8206106 A GB8206106 A GB 8206106A GB 2094552 A GB2094552 A GB 2094552A
Authority
GB
United Kingdom
Prior art keywords
micromodule
base
external leads
cover
soldering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8206106A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of GB2094552A publication Critical patent/GB2094552A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
GB8206106A 1981-03-06 1982-03-02 A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate Withdrawn GB2094552A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8104536A FR2501414A1 (fr) 1981-03-06 1981-03-06 Microboitier d'encapsulation de pastilles de semi-conducteur, testable apres soudure sur un substrat

Publications (1)

Publication Number Publication Date
GB2094552A true GB2094552A (en) 1982-09-15

Family

ID=9255957

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8206106A Withdrawn GB2094552A (en) 1981-03-06 1982-03-02 A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate

Country Status (3)

Country Link
DE (1) DE3207846A1 (fr)
FR (1) FR2501414A1 (fr)
GB (1) GB2094552A (fr)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2127217A (en) * 1982-08-10 1984-04-04 Brown David F Semiconductor chip carriers and housings
FR2565408A1 (fr) * 1984-05-30 1985-12-06 Thomson Csf Dispositif comportant une pastille de circuit integre surmontee d'une dalle isolante servant de boitier
WO1987006062A1 (fr) * 1986-03-27 1987-10-08 Hughes Aircraft Company Support intermediaire inverse
EP0331245A2 (fr) * 1988-03-01 1989-09-06 Lsi Logic Corporation Conteneur de puces à circuit intégré et procédé de fabrication
EP0351581A1 (fr) * 1988-07-22 1990-01-24 Oerlikon-Contraves AG Circuit intégré à haute densité et procédé pour sa fabrication
EP0538010A2 (fr) * 1991-10-17 1993-04-21 Fujitsu Limited Empaquetage pour semi-conducteur, support, méthode de fabrication et de test associé
GB2283863A (en) * 1993-11-16 1995-05-17 Ibm Direct chip attach module
EP0723703A1 (fr) * 1993-10-12 1996-07-31 Olin Corporation Boitier metallique connectable aux extremites
EP0844658A2 (fr) * 1996-10-16 1998-05-27 Oki Electric Industry Co., Ltd. Circuit intégré, méthode de fabrication et évaluation associée
EP1063699A1 (fr) * 1998-02-10 2000-12-27 Nissha Printing Co., Ltd. Feuille de base pour module de semiconducteur, procede de fabrication de ladite feuille de base, et module de semiconducteur
US6300673B1 (en) 1992-08-21 2001-10-09 Advanced Interconnect Technologies, Inc. Edge connectable metal package
US8395399B2 (en) 2007-12-06 2013-03-12 Nxp B.V. Semiconductor device and wafer with a test structure and method for assessing adhesion of under-bump metallization

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3809797A (en) * 1971-11-16 1974-05-07 Du Pont Seal ring compositions and electronic packages made therewith
US4180161A (en) * 1977-02-14 1979-12-25 Motorola, Inc. Carrier structure integral with an electronic package and method of construction

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2127217A (en) * 1982-08-10 1984-04-04 Brown David F Semiconductor chip carriers and housings
US4638348A (en) * 1982-08-10 1987-01-20 Brown David F Semiconductor chip carrier
FR2565408A1 (fr) * 1984-05-30 1985-12-06 Thomson Csf Dispositif comportant une pastille de circuit integre surmontee d'une dalle isolante servant de boitier
WO1987006062A1 (fr) * 1986-03-27 1987-10-08 Hughes Aircraft Company Support intermediaire inverse
EP0331245A2 (fr) * 1988-03-01 1989-09-06 Lsi Logic Corporation Conteneur de puces à circuit intégré et procédé de fabrication
EP0331245A3 (fr) * 1988-03-01 1991-05-08 Lsi Logic Corporation Conteneur de puces à circuit intégré et procédé de fabrication
EP0351581A1 (fr) * 1988-07-22 1990-01-24 Oerlikon-Contraves AG Circuit intégré à haute densité et procédé pour sa fabrication
US4975765A (en) * 1988-07-22 1990-12-04 Contraves Ag Highly integrated circuit and method for the production thereof
US5666064A (en) * 1991-10-17 1997-09-09 Fujitsu Limited Semiconductor device, carrier for carrying semiconductor device, and method of testing and producing semiconductor device
US5750421A (en) * 1991-10-17 1998-05-12 Fujitsu Limited Semiconductor device, carrier for carrying semiconductor device, and method of testing and producing semiconductor device
EP0538010A3 (en) * 1991-10-17 1993-05-19 Fujitsu Limited Semiconductor package, a holder, a method of production and testing for the same
US5475259A (en) * 1991-10-17 1995-12-12 Fujitsu Limited Semiconductor device and carrier for carrying semiconductor device
US5736428A (en) * 1991-10-17 1998-04-07 Fujitsu Limited Process for manufacturing a semiconductor device having a stepped encapsulated package
US5637923A (en) * 1991-10-17 1997-06-10 Fujitsu Limited Semiconductor device, carrier for carrying semiconductor device
EP0538010A2 (fr) * 1991-10-17 1993-04-21 Fujitsu Limited Empaquetage pour semi-conducteur, support, méthode de fabrication et de test associé
US6300673B1 (en) 1992-08-21 2001-10-09 Advanced Interconnect Technologies, Inc. Edge connectable metal package
EP0723703A1 (fr) * 1993-10-12 1996-07-31 Olin Corporation Boitier metallique connectable aux extremites
EP0723703A4 (fr) * 1993-10-12 1998-04-01 Olin Corp Boitier metallique connectable aux extremites
GB2283863A (en) * 1993-11-16 1995-05-17 Ibm Direct chip attach module
AU740693B2 (en) * 1996-10-16 2001-11-08 Oki Electric Industry Co. Ltd. Integrated circuit and fabricating method and evaluating method of integrated circuit
US5994716A (en) * 1996-10-16 1999-11-30 Oki Electric Industry, Co. Ltd. Integrated circuit and fabricating method and evaluating method of integrated circuit
US6251696B1 (en) 1996-10-16 2001-06-26 Oki Electric Industry, Co. Ltd. Method of forming integrated circuit with evaluation contacts electrically connected by forming via holes through the chip, and bonding the chip with a substrate
EP0844658A3 (fr) * 1996-10-16 1999-01-07 Oki Electric Industry Co., Ltd. Circuit intégré, méthode de fabrication et évaluation associée
EP0844658A2 (fr) * 1996-10-16 1998-05-27 Oki Electric Industry Co., Ltd. Circuit intégré, méthode de fabrication et évaluation associée
US6423559B2 (en) 1996-10-16 2002-07-23 Oki Electric Industry Co. Integrated circuit and fabricating method and evaluating method of integrated circuit
EP1063699A1 (fr) * 1998-02-10 2000-12-27 Nissha Printing Co., Ltd. Feuille de base pour module de semiconducteur, procede de fabrication de ladite feuille de base, et module de semiconducteur
EP1063699A4 (fr) * 1998-02-10 2007-07-25 Nissha Printing Feuille de base pour module de semiconducteur, procede de fabrication de ladite feuille de base, et module de semiconducteur
US8395399B2 (en) 2007-12-06 2013-03-12 Nxp B.V. Semiconductor device and wafer with a test structure and method for assessing adhesion of under-bump metallization

Also Published As

Publication number Publication date
FR2501414A1 (fr) 1982-09-10
DE3207846A1 (de) 1982-09-16
FR2501414B1 (fr) 1984-07-06

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)