GB1491692A - Allocation of storage and generation of routines in data processing system - Google Patents

Allocation of storage and generation of routines in data processing system

Info

Publication number: GB1491692A
Authority: GB; United Kingdom
Prior art keywords: entry; pointer; address; link; entries
Prior art date: 1973-11-08
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired

Application number

GB48398/74A

Other languages

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Bull HN Information Systems Italia SpA

Bull HN Information Systems Inc

Original Assignee

Honeywell Information Systems Italia SpA

Honeywell Information Systems Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1973-11-08

Filing date

1974-11-08

Publication date

1977-11-09

1974-11-08 Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA

1977-11-09 Publication of GB1491692A publication Critical patent/GB1491692A/en

Status Expired legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
- G06F9/261—Microinstruction address formation
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms

Landscapes

Engineering & Computer Science (AREA)
Software Systems (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Memory System Of A Hierarchy Structure (AREA)
Memory System (AREA)
Computer And Data Communications (AREA)
Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Executing Machine-Instructions (AREA)

GB48398/74A 1973-11-08 1974-11-08 Allocation of storage and generation of routines in data processing system Expired GB1491692A (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US41406373A	1973-11-08	1973-11-08

Publications (1)

Publication Number	Publication Date
GB1491692A true GB1491692A (en)	1977-11-09

Family

ID=23639803

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
GB48398/74A Expired GB1491692A (en)	1973-11-08	1974-11-08	Allocation of storage and generation of routines in data processing system

Country Status (11)

Country	Link
JP (1)	JPS5840273B2 (it)
BE (1)	BE821998A (it)
CA (1)	CA1027248A (it)
CH (1)	CH595662A5 (it)
DE (1)	DE2451984C2 (it)
ES (1)	ES430692A1 (it)
FR (1)	FR2251053B1 (it)
GB (1)	GB1491692A (it)
IT (1)	IT1023160B (it)
NL (1)	NL7413691A (it)
SE (1)	SE402990B (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5696337A (en) *	1979-12-28	1981-08-04	Fujitsu Ltd	Resource control system
US20140281398A1 (en) *	2013-03-16	2014-09-18	William C. Rash	Instruction emulation processors, methods, and systems

1974
- 1974-07-24 CA CA205,529A patent/CA1027248A/en not_active Expired
- 1974-09-03 JP JP49101264A patent/JPS5840273B2/ja not_active Expired
- 1974-10-04 ES ES430692A patent/ES430692A1/es not_active Expired
- 1974-10-18 NL NL7413691A patent/NL7413691A/xx not_active Application Discontinuation
- 1974-11-02 DE DE2451984A patent/DE2451984C2/de not_active Expired
- 1974-11-04 SE SE7413818A patent/SE402990B/xx unknown
- 1974-11-05 FR FR7436732A patent/FR2251053B1/fr not_active Expired
- 1974-11-05 IT IT53870/74A patent/IT1023160B/it active
- 1974-11-08 GB GB48398/74A patent/GB1491692A/en not_active Expired
- 1974-11-08 CH CH1493974A patent/CH595662A5/xx not_active IP Right Cessation
- 1974-11-08 BE BE150335A patent/BE821998A/xx not_active IP Right Cessation

Also Published As

Publication number	Publication date
FR2251053A1 (it)	1975-06-06
DE2451984A1 (de)	1975-05-15
JPS5840273B2 (ja)	1983-09-05
IT1023160B (it)	1978-05-10
SE402990B (sv)	1978-07-24
ES430692A1 (es)	1977-05-01
DE2451984C2 (de)	1984-07-26
AU7493574A (en)	1976-05-06
CH595662A5 (it)	1978-02-15
BE821998A (fr)	1975-05-09
JPS5081034A (it)	1975-07-01
CA1027248A (en)	1978-02-28
SE7413818L (it)	1975-05-09
NL7413691A (nl)	1975-05-12
FR2251053B1 (it)	1978-11-24

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Legal Events

Date	Code	Title	Description
1978-03-22	PS	Patent sealed [section 19, patents act 1949]
1986-07-09	PCNP	Patent ceased through non-payment of renewal fee