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FR3092411B1 - A system and method for testing an aircraft flight control computer. - Google Patents

A system and method for testing an aircraft flight control computer. Download PDF

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Publication number
FR3092411B1
FR3092411B1 FR1901046A FR1901046A FR3092411B1 FR 3092411 B1 FR3092411 B1 FR 3092411B1 FR 1901046 A FR1901046 A FR 1901046A FR 1901046 A FR1901046 A FR 1901046A FR 3092411 B1 FR3092411 B1 FR 3092411B1
Authority
FR
France
Prior art keywords
flight control
control computer
testing
aircraft flight
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1901046A
Other languages
French (fr)
Other versions
FR3092411A1 (en
Inventor
Arnaud Chevalier
Hacen Abdeslem
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Airbus Operations SAS
Original Assignee
Airbus Operations SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Airbus Operations SAS filed Critical Airbus Operations SAS
Priority to FR1901046A priority Critical patent/FR3092411B1/en
Publication of FR3092411A1 publication Critical patent/FR3092411A1/en
Application granted granted Critical
Publication of FR3092411B1 publication Critical patent/FR3092411B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1637—Error detection by comparing the output of redundant processing systems using additional compare functionality in one or some but not all of the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/24—Marginal checking or other specified testing methods not covered by G06F11/26, e.g. race tests
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1654—Error detection by comparing the output of redundant processing systems where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Traffic Control Systems (AREA)
  • Control Of Position, Course, Altitude, Or Attitude Of Moving Bodies (AREA)

Abstract

Système et procédé de test d’un calculateur de commande de vol d’un aéronef. Le système (10) de test d’un calculateur (12) de commande de vol d’un aéronef comprend ledit calculateur de commande de vol d’un aéronef, comprenant un module (14) agissant en mode commande et un module (16) agissant en mode surveillance, ainsi qu’un ensemble (20) de calculateurs avioniques (22, 24). Le système de test (10) comprend en outre un retardateur (26) monté en série sur une liaison (L2) entre l’un des calculateurs avioniques (24) et l’un des modules (16) du calculateur de commande de vol (12), ce retardateur étant configuré pour retarder la transmission d’une information par ledit calculateur avionique vers ledit module. Figure pour l’abrégé : Fig. 2A system and method for testing an aircraft flight control computer. The system (10) for testing an aircraft flight control computer (12) comprises said aircraft flight control computer, comprising a module (14) acting in command mode and a module (16) acting in surveillance mode, as well as a set (20) of avionics computers (22, 24). The test system (10) further comprises a retarder (26) mounted in series on a link (L2) between one of the avionics computers (24) and one of the modules (16) of the flight control computer ( 12), this delay being configured to delay the transmission of information by said avionics computer to said module. Figure for the abstract: Fig. 2

FR1901046A 2019-02-04 2019-02-04 A system and method for testing an aircraft flight control computer. Active FR3092411B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR1901046A FR3092411B1 (en) 2019-02-04 2019-02-04 A system and method for testing an aircraft flight control computer.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1901046 2019-02-04
FR1901046A FR3092411B1 (en) 2019-02-04 2019-02-04 A system and method for testing an aircraft flight control computer.

Publications (2)

Publication Number Publication Date
FR3092411A1 FR3092411A1 (en) 2020-08-07
FR3092411B1 true FR3092411B1 (en) 2021-01-22

Family

ID=67262515

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1901046A Active FR3092411B1 (en) 2019-02-04 2019-02-04 A system and method for testing an aircraft flight control computer.

Country Status (1)

Country Link
FR (1) FR3092411B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115755866A (en) * 2022-12-21 2023-03-07 杭州牧星科技有限公司 Unmanned aerial vehicle flies to control computer test system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8966355B2 (en) * 2012-02-15 2015-02-24 Infineon Technologies Ag Apparatus and method for comparing pairs of binary words
FR3028975B1 (en) * 2014-11-26 2016-12-02 Thales Sa ERROR DETECTION METHOD OF AN AIRCRAFT FLIGHT AND GUIDANCE SYSTEM AND HIGH INTEGRITY FLIGHT AND GUIDE MANAGEMENT SYSTEM
US10377470B2 (en) * 2017-07-11 2019-08-13 Bell Helicopter Textron Inc. Rotorcraft with redundant processors using state comparison

Also Published As

Publication number Publication date
FR3092411A1 (en) 2020-08-07

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