FR3085537B1 - Tranche soi et son procede de production - Google Patents
Tranche soi et son procede de production Download PDFInfo
- Publication number
- FR3085537B1 FR3085537B1 FR1909775A FR1909775A FR3085537B1 FR 3085537 B1 FR3085537 B1 FR 3085537B1 FR 1909775 A FR1909775 A FR 1909775A FR 1909775 A FR1909775 A FR 1909775A FR 3085537 B1 FR3085537 B1 FR 3085537B1
- Authority
- FR
- France
- Prior art keywords
- insulating layer
- buried insulating
- silicon
- support substrate
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/06—Joining of crystals
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/36—Carbides
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/005—Oxydation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02592—Microstructure amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Formation Of Insulating Films (AREA)
- Element Separation (AREA)
Abstract
L’invention concerne une tranche SOI 1 présentant une forte conductivité thermique. La tranche SOI 1 comporte une tranche de silicium formant substrat support (10), une couche active (21) composée de silicium monocristallin sur la tranche de silicium formant substrat support (10), et une couche isolante enterrée (30) placée entre la tranche de silicium formant substrat support (10) et la couche active (21). La couche isolante enterrée (30) comprend (i) une couche isolante de SiC (31) composée soit de SiC monocristallin, soit de SiC amorphe et (ii) une couche d’adhésion (35) composée de dioxyde de silicium. La couche d’adhésion (35) est placée dans l’une des positions suivantes : (a) sur la surface de la couche isolante enterrée (30) du côté de la couche active (21), (b) sur la surface de la couche isolante enterrée (30) du côté de la tranche de silicium formant substrat support (10), et (c) à l’intérieur de la couche isolante enterrée (30). Fig. 2
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018165750A JP7006544B2 (ja) | 2018-09-05 | 2018-09-05 | Soiウェーハ及びその製造方法 |
JP2018-165750 | 2018-09-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3085537A1 FR3085537A1 (fr) | 2020-03-06 |
FR3085537B1 true FR3085537B1 (fr) | 2023-07-28 |
Family
ID=69684247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1909775A Active FR3085537B1 (fr) | 2018-09-05 | 2019-09-05 | Tranche soi et son procede de production |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP7006544B2 (fr) |
FR (1) | FR3085537B1 (fr) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02206118A (ja) * | 1989-02-06 | 1990-08-15 | Hitachi Ltd | 半導体素子 |
JPH05152180A (ja) * | 1991-11-26 | 1993-06-18 | Hitachi Ltd | 半導体装置及び製造方法 |
JP5532527B2 (ja) | 2006-08-03 | 2014-06-25 | 株式会社デンソー | Soi基板およびその製造方法 |
JP5644096B2 (ja) | 2009-11-30 | 2014-12-24 | ソニー株式会社 | 接合基板の製造方法及び固体撮像装置の製造方法 |
JP2016092122A (ja) | 2014-10-31 | 2016-05-23 | 三井造船株式会社 | 炭化珪素基板 |
-
2018
- 2018-09-05 JP JP2018165750A patent/JP7006544B2/ja active Active
-
2019
- 2019-09-05 FR FR1909775A patent/FR3085537B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
FR3085537A1 (fr) | 2020-03-06 |
JP7006544B2 (ja) | 2022-02-10 |
JP2020038917A (ja) | 2020-03-12 |
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