FR2973159B1 - Procede de fabrication d'un substrat de base - Google Patents
Procede de fabrication d'un substrat de baseInfo
- Publication number
- FR2973159B1 FR2973159B1 FR1152353A FR1152353A FR2973159B1 FR 2973159 B1 FR2973159 B1 FR 2973159B1 FR 1152353 A FR1152353 A FR 1152353A FR 1152353 A FR1152353 A FR 1152353A FR 2973159 B1 FR2973159 B1 FR 2973159B1
- Authority
- FR
- France
- Prior art keywords
- base substrate
- manufacturing base
- manufacturing
- substrate
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02301—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment in-situ cleaning
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76262—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using selective deposition of single crystal silicon, i.e. SEG techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Recrystallisation Techniques (AREA)
- Formation Of Insulating Films (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Electrodes Of Semiconductors (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1152353A FR2973159B1 (fr) | 2011-03-22 | 2011-03-22 | Procede de fabrication d'un substrat de base |
TW101107519A TWI458020B (zh) | 2011-03-22 | 2012-03-06 | 供絕緣體上半導體類型底材所用之基底底材之製造方法 |
SG2012016770A SG184651A1 (en) | 2011-03-22 | 2012-03-09 | Method of manufacturing a base substrate for a semi-conductor on insulator type substrate |
KR1020120027527A KR101379885B1 (ko) | 2011-03-22 | 2012-03-19 | 반도체 온 절연체형 기판을 위한 베이스 기판의 제조 방법 |
CN201210074558.5A CN102693933B (zh) | 2011-03-22 | 2012-03-20 | 用于绝缘体型衬底上的半导体的基础衬底的制造方法 |
JP2012064056A JP5726796B2 (ja) | 2011-03-22 | 2012-03-21 | 絶縁体上の半導体タイプの基板のためのベース基板を製造する方法 |
US13/426,190 US8765571B2 (en) | 2011-03-22 | 2012-03-21 | Method of manufacturing a base substrate for a semi-conductor on insulator type substrate |
EP12160793A EP2503592A1 (fr) | 2011-03-22 | 2012-03-22 | Procédé de fabrication d'un substrat de base pour un substrat de type semi-conducteur sur isolant |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1152353A FR2973159B1 (fr) | 2011-03-22 | 2011-03-22 | Procede de fabrication d'un substrat de base |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2973159A1 FR2973159A1 (fr) | 2012-09-28 |
FR2973159B1 true FR2973159B1 (fr) | 2013-04-19 |
Family
ID=45841392
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1152353A Active FR2973159B1 (fr) | 2011-03-22 | 2011-03-22 | Procede de fabrication d'un substrat de base |
Country Status (8)
Country | Link |
---|---|
US (1) | US8765571B2 (fr) |
EP (1) | EP2503592A1 (fr) |
JP (1) | JP5726796B2 (fr) |
KR (1) | KR101379885B1 (fr) |
CN (1) | CN102693933B (fr) |
FR (1) | FR2973159B1 (fr) |
SG (1) | SG184651A1 (fr) |
TW (1) | TWI458020B (fr) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2987166B1 (fr) | 2012-02-16 | 2017-05-12 | Soitec Silicon On Insulator | Procede de transfert d'une couche |
CN103296013B (zh) * | 2013-05-28 | 2017-08-08 | 上海华虹宏力半导体制造有限公司 | 射频器件的形成方法 |
US8951896B2 (en) | 2013-06-28 | 2015-02-10 | International Business Machines Corporation | High linearity SOI wafer for low-distortion circuit applications |
EP3221885B1 (fr) | 2014-11-18 | 2019-10-23 | GlobalWafers Co., Ltd. | Plaquette semi-conducteur sur isolant haute résistivité et procédé de fabrication |
US10224233B2 (en) | 2014-11-18 | 2019-03-05 | Globalwafers Co., Ltd. | High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He-N2 co-implantation |
WO2016140850A1 (fr) | 2015-03-03 | 2016-09-09 | Sunedison Semiconductor Limited | Procédé pour déposer des films de silicium polycristallin de piégeage de charge sur des substrats de silicium avec une contrainte de film pouvant être maîtrisée |
WO2016149113A1 (fr) | 2015-03-17 | 2016-09-22 | Sunedison Semiconductor Limited | Couche de piégeage de charge thermiquement stable destinée à être utilisée dans la fabrication de structures semi-conducteur sur isolant |
CN107667416B (zh) | 2015-06-01 | 2021-08-31 | 环球晶圆股份有限公司 | 制造绝缘体上半导体的方法 |
CN114496732B (zh) | 2015-06-01 | 2023-03-03 | 环球晶圆股份有限公司 | 制造绝缘体上硅锗的方法 |
JP6353814B2 (ja) | 2015-06-09 | 2018-07-04 | 信越半導体株式会社 | 貼り合わせsoiウェーハの製造方法 |
CN105261586B (zh) * | 2015-08-25 | 2018-05-25 | 上海新傲科技股份有限公司 | 带有电荷陷阱和绝缘埋层衬底的制备方法 |
JP6749394B2 (ja) | 2015-11-20 | 2020-09-02 | グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. | 滑らかな半導体表面の製造方法 |
CN111201341B (zh) | 2016-06-08 | 2023-04-04 | 环球晶圆股份有限公司 | 具有经改进的机械强度的高电阻率单晶硅锭及晶片 |
US10269617B2 (en) | 2016-06-22 | 2019-04-23 | Globalwafers Co., Ltd. | High resistivity silicon-on-insulator substrate comprising an isolation region |
SG10201913373WA (en) | 2016-10-26 | 2020-03-30 | Globalwafers Co Ltd | High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency |
FR3066858B1 (fr) * | 2017-05-23 | 2019-06-21 | Soitec | Procede pour minimiser une distorsion d'un signal dans un circuit radiofrequence |
CN108987250B (zh) * | 2017-06-02 | 2021-08-17 | 上海新昇半导体科技有限公司 | 衬底及其制作方法 |
US10468486B2 (en) * | 2017-10-30 | 2019-11-05 | Taiwan Semiconductor Manufacturing Company Ltd. | SOI substrate, semiconductor device and method for manufacturing the same |
JP6834932B2 (ja) * | 2017-12-19 | 2021-02-24 | 株式会社Sumco | 貼り合わせウェーハ用の支持基板の製造方法および貼り合わせウェーハの製造方法 |
KR102463727B1 (ko) | 2018-06-08 | 2022-11-07 | 글로벌웨이퍼스 씨오., 엘티디. | 얇은 실리콘 층의 전사 방법 |
US10943813B2 (en) | 2018-07-13 | 2021-03-09 | Globalwafers Co., Ltd. | Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability |
FR3104322B1 (fr) | 2019-12-05 | 2023-02-24 | Soitec Silicon On Insulator | Procédé de formation d'un substrat de manipulation pour une structure composite ciblant des applications rf |
FR3129029B1 (fr) | 2021-11-09 | 2023-09-29 | Soitec Silicon On Insulator | Procede de preparation d’un substrat support muni d’une couche de piegeage de charges |
FR3129028B1 (fr) | 2021-11-09 | 2023-11-10 | Soitec Silicon On Insulator | Procede de preparation d’un substrat support muni d’une couche de piegeage de charges |
WO2024115411A1 (fr) | 2022-11-29 | 2024-06-06 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes |
WO2024115410A1 (fr) | 2022-11-29 | 2024-06-06 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes. |
WO2024115414A1 (fr) | 2022-11-29 | 2024-06-06 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes |
FR3146020A1 (fr) | 2023-02-20 | 2024-08-23 | Soitec | Support comprenant une couche de piégeage de charges, substrat composite comprenant un tel support et procédé de fabrication associés |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0648686B2 (ja) * | 1988-03-30 | 1994-06-22 | 新日本製鐵株式会社 | ゲッタリング能力の優れたシリコンウェーハおよびその製造方法 |
JP3076202B2 (ja) * | 1994-07-12 | 2000-08-14 | 三菱マテリアルシリコン株式会社 | Eg用ポリシリコン膜の被着方法 |
JPH10335615A (ja) * | 1997-05-22 | 1998-12-18 | Harris Corp | 半導体デバイスに関する改良 |
KR100434537B1 (ko) * | 1999-03-31 | 2004-06-05 | 삼성전자주식회사 | 다공질 실리콘 혹은 다공질 산화 실리콘을 이용한 두꺼운 희생층을 가진 다층 구조 웨이퍼 및 그 제조방법 |
JP3676958B2 (ja) * | 1999-12-28 | 2005-07-27 | 株式会社日立製作所 | 半導体集積回路装置の製造方法 |
AU2002322966A1 (en) * | 2002-03-20 | 2003-09-29 | Ecole Polytechnique Federale De Lausanne (Epfl) | Process for manufacturing mems |
FR2838865B1 (fr) | 2002-04-23 | 2005-10-14 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat avec couche utile sur support de resistivite elevee |
US7535100B2 (en) * | 2002-07-12 | 2009-05-19 | The United States Of America As Represented By The Secretary Of The Navy | Wafer bonding of thinned electronic materials and circuits to high performance substrates |
KR100524197B1 (ko) * | 2003-04-29 | 2005-10-27 | 삼성전자주식회사 | 매엽식 반도체 소자 제조장치 및 이를 이용한 게이트 전극및 콘택 전극의 연속 형성방법 |
US7112509B2 (en) * | 2003-05-09 | 2006-09-26 | Ibis Technology Corporation | Method of producing a high resistivity SIMOX silicon substrate |
EP1665367A2 (fr) * | 2003-09-26 | 2006-06-07 | Universite Catholique De Louvain | Procede de fabrication d'une structure semiconductrice multicouche a pertes ohmiques reduites |
JP2007056336A (ja) * | 2005-08-25 | 2007-03-08 | Tokyo Electron Ltd | 基板処理装置,基板処理装置の基板搬送方法,プログラム,プログラムを記録した記録媒体 |
US20070190681A1 (en) | 2006-02-13 | 2007-08-16 | Sharp Laboratories Of America, Inc. | Silicon-on-insulator near infrared active pixel sensor array |
US7598153B2 (en) * | 2006-03-31 | 2009-10-06 | Silicon Genesis Corporation | Method and structure for fabricating bonded substrate structures using thermal processing to remove oxygen species |
US20070286956A1 (en) * | 2006-04-07 | 2007-12-13 | Applied Materials, Inc. | Cluster tool for epitaxial film formation |
FR2933233B1 (fr) | 2008-06-30 | 2010-11-26 | Soitec Silicon On Insulator | Substrat de haute resistivite bon marche et procede de fabrication associe |
FR2953640B1 (fr) * | 2009-12-04 | 2012-02-10 | S O I Tec Silicon On Insulator Tech | Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante |
-
2011
- 2011-03-22 FR FR1152353A patent/FR2973159B1/fr active Active
-
2012
- 2012-03-06 TW TW101107519A patent/TWI458020B/zh active
- 2012-03-09 SG SG2012016770A patent/SG184651A1/en unknown
- 2012-03-19 KR KR1020120027527A patent/KR101379885B1/ko active Active
- 2012-03-20 CN CN201210074558.5A patent/CN102693933B/zh active Active
- 2012-03-21 JP JP2012064056A patent/JP5726796B2/ja active Active
- 2012-03-21 US US13/426,190 patent/US8765571B2/en active Active
- 2012-03-22 EP EP12160793A patent/EP2503592A1/fr not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JP5726796B2 (ja) | 2015-06-03 |
TW201239990A (en) | 2012-10-01 |
EP2503592A1 (fr) | 2012-09-26 |
KR20120107863A (ko) | 2012-10-04 |
US20120244687A1 (en) | 2012-09-27 |
FR2973159A1 (fr) | 2012-09-28 |
CN102693933A (zh) | 2012-09-26 |
KR101379885B1 (ko) | 2014-04-01 |
TWI458020B (zh) | 2014-10-21 |
US8765571B2 (en) | 2014-07-01 |
SG184651A1 (en) | 2012-10-30 |
JP2012199550A (ja) | 2012-10-18 |
CN102693933B (zh) | 2016-12-14 |
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