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FR2643192B1 - Procede de fabrication d'un dispositif semi-conducteur comprenant une electrode en metal refractaire sur un substrat semi-isolant - Google Patents

Procede de fabrication d'un dispositif semi-conducteur comprenant une electrode en metal refractaire sur un substrat semi-isolant

Info

Publication number
FR2643192B1
FR2643192B1 FR8911222A FR8911222A FR2643192B1 FR 2643192 B1 FR2643192 B1 FR 2643192B1 FR 8911222 A FR8911222 A FR 8911222A FR 8911222 A FR8911222 A FR 8911222A FR 2643192 B1 FR2643192 B1 FR 2643192B1
Authority
FR
France
Prior art keywords
semi
manufacturing
semiconductor device
device including
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR8911222A
Other languages
English (en)
Other versions
FR2643192A1 (fr
Inventor
Kohno Yasutaka
Sakai Masayuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of FR2643192A1 publication Critical patent/FR2643192A1/fr
Application granted granted Critical
Publication of FR2643192B1 publication Critical patent/FR2643192B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • H10D30/0616—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs using processes wherein the final gate is made before the completion of the source and drain regions, e.g. gate-first processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31608—Deposition of SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819—Smoothing of the dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
FR8911222A 1988-08-24 1989-08-24 Procede de fabrication d'un dispositif semi-conducteur comprenant une electrode en metal refractaire sur un substrat semi-isolant Expired - Fee Related FR2643192B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP20999488 1988-08-24
JP63325455A JPH02138750A (ja) 1988-08-24 1988-12-22 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
FR2643192A1 FR2643192A1 (fr) 1990-08-17
FR2643192B1 true FR2643192B1 (fr) 1995-11-17

Family

ID=26517794

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8911222A Expired - Fee Related FR2643192B1 (fr) 1988-08-24 1989-08-24 Procede de fabrication d'un dispositif semi-conducteur comprenant une electrode en metal refractaire sur un substrat semi-isolant

Country Status (4)

Country Link
US (1) US5322806A (fr)
JP (1) JPH02138750A (fr)
FR (1) FR2643192B1 (fr)
GB (1) GB2222308B (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5139968A (en) * 1989-03-03 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Method of producing a t-shaped gate electrode
DE69224640T2 (de) * 1991-05-17 1998-10-01 Lam Res Corp VERFAHREN ZUR BESCHICHTUNG EINES SIOx FILMES MIT REDUZIERTER INTRINSISCHER SPANNUNG UND/ODER REDUZIERTEM WASSERSTOFFGEHALT
US5304511A (en) * 1992-09-29 1994-04-19 Mitsubishi Denki Kabushiki Kaisha Production method of T-shaped gate electrode in semiconductor device
JP2783276B2 (ja) * 1995-07-04 1998-08-06 日本電気株式会社 半導体装置の製造方法
KR0170498B1 (ko) * 1995-11-21 1999-03-30 양승택 T형 게이트 전극의 형성방법
US6087254A (en) * 1996-07-16 2000-07-11 Micron Technology, Inc. Technique for elimination of pitting on silicon substrate during gate stack etch
US7041548B1 (en) * 1996-07-16 2006-05-09 Micron Technology, Inc. Methods of forming a gate stack that is void of silicon clusters within a metallic silicide film thereof
US6613673B2 (en) 1996-07-16 2003-09-02 Micron Technology, Inc. Technique for elimination of pitting on silicon substrate during gate stack etch
US7078342B1 (en) 1996-07-16 2006-07-18 Micron Technology, Inc. Method of forming a gate stack
US6544895B1 (en) * 2000-08-17 2003-04-08 Micron Technology, Inc. Methods for use of pulsed voltage in a plasma reactor
US6485572B1 (en) * 2000-08-28 2002-11-26 Micron Technology, Inc. Use of pulsed grounding source in a plasma reactor
US7521307B2 (en) * 2006-04-28 2009-04-21 International Business Machines Corporation CMOS structures and methods using self-aligned dual stressed layers

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1159012A (fr) * 1980-05-02 1983-12-20 Seitaro Matsuo Dispositif de deposition de plasma
US4356623A (en) * 1980-09-15 1982-11-02 Texas Instruments Incorporated Fabrication of submicron semiconductor devices
JPS57162349A (en) * 1981-03-30 1982-10-06 Fujitsu Ltd Forming method for multilayer wiring of semiconductor device
JPS5950567A (ja) * 1982-09-16 1984-03-23 Hitachi Ltd 電界効果トランジスタの製造方法
US4585668A (en) * 1983-02-28 1986-04-29 Michigan State University Method for treating a surface with a microwave or UHF plasma and improved apparatus
JPS6113626A (ja) * 1984-06-29 1986-01-21 Hitachi Ltd プラズマ処理装置
JPS61154046A (ja) * 1984-12-26 1986-07-12 Nec Corp 半導体装置
JPH0697660B2 (ja) * 1985-03-23 1994-11-30 日本電信電話株式会社 薄膜形成方法
JPH0658909B2 (ja) * 1985-07-15 1994-08-03 株式会社日立製作所 低温プラズマによる成膜方法及び装置
JPH0666296B2 (ja) * 1985-09-20 1994-08-24 株式会社日立製作所 プラズマ処理装置
JPS6292481A (ja) * 1985-10-18 1987-04-27 Nec Corp 半導体装置の製造方法
JPH0821594B2 (ja) * 1986-01-31 1996-03-04 日本電気株式会社 半導体装置の製造方法
JPS62274673A (ja) * 1986-05-22 1987-11-28 Mitsubishi Electric Corp 半導体装置の製造方法
JPS63122225A (ja) * 1986-11-12 1988-05-26 Fujitsu Ltd ３元以上の酸化珪素膜の成長方法
JPS63132451A (ja) * 1986-11-21 1988-06-04 Nec Corp 半導体装置の製造方法
KR910006164B1 (ko) * 1987-03-18 1991-08-16 가부시키가이샤 도시바 박막형성방법과 그 장치
JPH02103939A (ja) * 1988-10-12 1990-04-17 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
GB8918829D0 (en) 1989-09-27
US5322806A (en) 1994-06-21
GB2222308A (en) 1990-02-28
JPH02138750A (ja) 1990-05-28
FR2643192A1 (fr) 1990-08-17
GB2222308B (en) 1993-02-17

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Legal Events

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ST Notification of lapse