FR2314585A1 - Circuit electronique stratifie multicouche et procede pour sa fabrication - Google Patents

Circuit electronique stratifie multicouche et procede pour sa fabrication

Info

Publication number: FR2314585A1
Authority: FR; France
Prior art keywords: manufacturing; electronic circuit; layer laminate; laminate electronic; layer
Prior art date: 1975-06-13
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

FR7617770A

Other languages

English (en)

Other versions

FR2314585B1 (fr

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Siemens Corp

Original Assignee

Siemens Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1975-06-13

Filing date

1976-06-11

Publication date

1977-01-07

1976-06-11 Application filed by Siemens Corp filed Critical Siemens Corp

1977-01-07 Publication of FR2314585A1 publication Critical patent/FR2314585A1/fr

1979-09-28 Application granted granted Critical

1979-09-28 Publication of FR2314585B1 publication Critical patent/FR2314585B1/fr

Status Granted legal-status Critical Current

Classifications

- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
- H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks

Landscapes

Engineering & Computer Science (AREA)
Chemical & Material Sciences (AREA)
Inorganic Chemistry (AREA)
Manufacturing & Machinery (AREA)
Microelectronics & Electronic Packaging (AREA)
Production Of Multi-Layered Print Wiring Board (AREA)

FR7617770A 1975-06-13 1976-06-11 Circuit electronique stratifie multicouche et procede pour sa fabrication Granted FR2314585A1 (fr)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
DE2526553A DE2526553C3 (de)	1975-06-13	1975-06-13	Mehrlagige elektronische Schichtschaltung und Verfahren zu ihrer Herstellung

Publications (2)

Publication Number	Publication Date
FR2314585A1 true FR2314585A1 (fr)	1977-01-07
FR2314585B1 FR2314585B1 (fr)	1979-09-28

Family

ID=5949067

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
FR7617770A Granted FR2314585A1 (fr)	1975-06-13	1976-06-11	Circuit electronique stratifie multicouche et procede pour sa fabrication

Country Status (9)

Country	Link
JP (2)	JPS5210569A (fr)
AT (1)	AT359583B (fr)
CH (1)	CH604344A5 (fr)
DE (1)	DE2526553C3 (fr)
FR (1)	FR2314585A1 (fr)
GB (1)	GB1540112A (fr)
IT (1)	IT1063970B (fr)
NL (1)	NL7604158A (fr)
SE (1)	SE421852B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0107037A2 (fr) *	1982-10-22	1984-05-02	International Business Machines Corporation	Circuit imprimé multicouche et procédé de fabrication de circuits imprimés multicouches

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
GB2045540B (en) *	1978-12-28	1983-08-03	Tdk Electronics Co Ltd	Electrical inductive device
EP0062084A1 (fr) *	1981-04-06	1982-10-13	Herbert Irwin Schachter	Circuit à plusieurs couches et méthode pour fabriquer ce circuit
JPS60130883A (ja) *	1983-12-19	1985-07-12	中央銘板工業株式会社	多層印刷配線板
DE3831148C1 (fr) *	1988-09-13	1990-03-29	Robert Bosch Gmbh, 7000 Stuttgart, De
NO900229D0 (no) *	1990-01-16	1990-01-16	Micro Electronics Ame A S	Fremgangsmaate for fremstilling av miniatyrisert impedanstilpasset ledningsnett.

1975
- 1975-06-13 DE DE2526553A patent/DE2526553C3/de not_active Expired
1976
- 1976-04-14 CH CH473776A patent/CH604344A5/xx not_active IP Right Cessation
- 1976-04-20 NL NL7604158A patent/NL7604158A/xx not_active Application Discontinuation
- 1976-05-17 AT AT358776A patent/AT359583B/de not_active IP Right Cessation
- 1976-05-18 GB GB20417/76A patent/GB1540112A/en not_active Expired
- 1976-06-04 JP JP51065491A patent/JPS5210569A/ja active Pending
- 1976-06-09 IT IT24064/76A patent/IT1063970B/it active
- 1976-06-11 FR FR7617770A patent/FR2314585A1/fr active Granted
- 1976-06-11 SE SE7606715A patent/SE421852B/xx unknown
1981
- 1981-07-07 JP JP1981100259U patent/JPS5731876U/ja active Pending

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NEANT *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0107037A2 (fr) *	1982-10-22	1984-05-02	International Business Machines Corporation	Circuit imprimé multicouche et procédé de fabrication de circuits imprimés multicouches
EP0107037A3 (en) *	1982-10-22	1984-11-28	International Business Machines Corporation	Multilayer printed circuit board, and method of manufacturing multilayer printed circuit boards

Also Published As

Publication number	Publication date
ATA358776A (de)	1980-04-15
AT359583B (de)	1980-11-25
IT1063970B (it)	1985-02-18
CH604344A5 (fr)	1978-09-15
DE2526553C3 (de)	1978-06-01
FR2314585B1 (fr)	1979-09-28
DE2526553B2 (de)	1977-09-29
NL7604158A (nl)	1976-12-15
DE2526553A1 (de)	1976-12-16
JPS5731876U (fr)	1982-02-19
GB1540112A (en)	1979-02-07
JPS5210569A (en)	1977-01-26
SE7606715L (sv)	1976-12-14
SE421852B (sv)	1982-02-01

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Legal Events

Date	Code	Title	Description
1984-04-20	ST	Notification of lapse