FI944282A - Menetelmä ja piirijärjestely mikroprosessorilaitteen ja siihen kytkettyjen oheislaitteiden keskinäisen ajastuksen toteuttamiseksi - Google Patents

Menetelmä ja piirijärjestely mikroprosessorilaitteen ja siihen kytkettyjen oheislaitteiden keskinäisen ajastuksen toteuttamiseksi Download PDF

Info

Publication number: FI944282A
Authority: FI; Finland
Prior art keywords: circuit arrangement; microprocessor device; peripherals connected; mutual timing; implementing mutual
Prior art date: 1994-09-15

Application number

FI944282A

Other languages

English (en)

Swedish (sv)

Other versions

FI944282A0 (fi

FI100281B (fi

Inventor

Juhani Sademaa

Original Assignee

Nokia Telecommunications Oy

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1994-09-15

Filing date

1994-09-15

Publication date

1996-03-16

1994-09-15 Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy

1994-09-15 Priority to FI944282A priority Critical patent/FI100281B/fi

1994-09-15 Publication of FI944282A0 publication Critical patent/FI944282A0/fi

1995-09-14 Priority to EP95930546A priority patent/EP0803096B1/en

1995-09-14 Priority to AU33891/95A priority patent/AU3389195A/en

1995-09-14 Priority to PCT/FI1995/000501 priority patent/WO1996008771A1/en

1995-09-14 Priority to US08/809,484 priority patent/US5978859A/en

1995-09-14 Priority to DE69525858T priority patent/DE69525858T2/de

1996-03-16 Publication of FI944282A publication Critical patent/FI944282A/fi

1997-10-31 Application granted granted Critical

1997-10-31 Publication of FI100281B publication Critical patent/FI100281B/fi

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
- G06F13/4239—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Information Transfer Systems (AREA)

FI944282A 1994-09-15 1994-09-15 Menetelmä ja piirijärjestely mikroprosessorilaitteen ja siihen kytkett yjen oheislaitteiden keskinäisen ajastuksen toteuttamiseksi FI100281B (fi)

Priority Applications (6)

Application Number	Priority Date	Filing Date	Title
FI944282A FI100281B (fi)	1994-09-15	1994-09-15	Menetelmä ja piirijärjestely mikroprosessorilaitteen ja siihen kytkett yjen oheislaitteiden keskinäisen ajastuksen toteuttamiseksi
EP95930546A EP0803096B1 (en)	1994-09-15	1995-09-14	Implementation of timing between a microprocessor and its peripheral devices
AU33891/95A AU3389195A (en)	1994-09-15	1995-09-14	Implementation of timing between a microprocessor and its pripheral devices
PCT/FI1995/000501 WO1996008771A1 (en)	1994-09-15	1995-09-14	Implementation of timing between a microprocessor and its peripheral devices
US08/809,484 US5978859A (en)	1994-09-15	1995-09-14	Implementation of timing between a microprocessor and its peripheral devices
DE69525858T DE69525858T2 (de)	1994-09-15	1995-09-14	Synchronisationserzeugung zwischen einem mikroprozessor und dessen peripheriegerät

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
FI944282A FI100281B (fi)	1994-09-15	1994-09-15	Menetelmä ja piirijärjestely mikroprosessorilaitteen ja siihen kytkett yjen oheislaitteiden keskinäisen ajastuksen toteuttamiseksi
FI944282		1994-09-15

Publications (3)

Publication Number	Publication Date
FI944282A0 FI944282A0 (fi)	1994-09-15
FI944282A true FI944282A (fi)	1996-03-16
FI100281B FI100281B (fi)	1997-10-31

Family

ID=8541375

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
FI944282A FI100281B (fi)	1994-09-15	1994-09-15	Menetelmä ja piirijärjestely mikroprosessorilaitteen ja siihen kytkett yjen oheislaitteiden keskinäisen ajastuksen toteuttamiseksi

Country Status (6)

Country	Link
US (1)	US5978859A (fi)
EP (1)	EP0803096B1 (fi)
AU (1)	AU3389195A (fi)
DE (1)	DE69525858T2 (fi)
FI (1)	FI100281B (fi)
WO (1)	WO1996008771A1 (fi)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6324592B1 (en)	1997-02-25	2001-11-27	Keystone Aerospace	Apparatus and method for a mobile computer architecture and input/output management system
US6233636B1 (en) *	1998-12-03	2001-05-15	International Business Machines Corporation	Method and system for allowing PCI bus transactions to be performed at higher operating frequencies
DE10019239B4 (de) *	2000-04-18	2008-09-04	Fujitsu Siemens Computers Gmbh	Datenverarbeitungseinrichtung mit einer Schaltungsanordnung zur Verbindung eines ersten Kommunikationsbusses mit einem zweiten Kommunikationsbus
US8224966B2 (en) *	2004-08-24	2012-07-17	Cisco Technology, Inc.	Reproxying an unproxied connection

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
DE2045623B1 (de) *	1970-09-15	1972-04-27	Siemens Ag	Schaltungsanordnung zur Steuerung des Zugriffs eines Prozessors einer programmgesteuerten Fernmelde-, insbesondere Fernsprechvermittlungsanlage, zu deren Speicherwerk
US3973244A (en) *	1975-02-27	1976-08-03	Zentec Corporation	Microcomputer terminal system
US4303990A (en) *	1976-07-01	1981-12-01	Gulf & Western Industries, Inc.	Programmable controller using microprocessor
FR2431734A1 (fr) *	1978-07-19	1980-02-15	Clemessy Sa	Procede et installation pour l'echange d'informations entre une unite de traitement numerique et des coupleurs peripheriques
US4440986A (en) *	1979-02-21	1984-04-03	Walter L. Douglas	Microprocessor controller for simultaneously controlling a PBX and providing multiple user access for general purpose data processing
JPS58184668A (ja) *	1982-04-22	1983-10-28	Fanuc Ltd	メモリの書込み制御方式
US4547630A (en) *	1983-12-05	1985-10-15	Gte Automatic Electric Incorporated	Speech synthesized time announcement circuit
US5222226A (en) *	1988-03-18	1993-06-22	Fujitsu Limited	Single-chip microprocessor having variable memory address mapping

1994
- 1994-09-15 FI FI944282A patent/FI100281B/fi active
1995
- 1995-09-14 WO PCT/FI1995/000501 patent/WO1996008771A1/en active IP Right Grant
- 1995-09-14 AU AU33891/95A patent/AU3389195A/en not_active Abandoned
- 1995-09-14 EP EP95930546A patent/EP0803096B1/en not_active Expired - Lifetime
- 1995-09-14 DE DE69525858T patent/DE69525858T2/de not_active Expired - Fee Related
- 1995-09-14 US US08/809,484 patent/US5978859A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
US5978859A (en)	1999-11-02
DE69525858D1 (de)	2002-04-18
EP0803096B1 (en)	2002-03-13
WO1996008771A1 (en)	1996-03-21
FI944282A0 (fi)	1994-09-15
DE69525858T2 (de)	2002-09-19
FI100281B (fi)	1997-10-31
EP0803096A1 (en)	1997-10-29
AU3389195A (en)	1996-03-29

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