[go: up one dir, main page]

FI930290A0 - Anläggning för avbrottsfördelning i en flerdatorsystem - Google Patents

Anläggning för avbrottsfördelning i en flerdatorsystem

Info

Publication number
FI930290A0
FI930290A0 FI930290A FI930290A FI930290A0 FI 930290 A0 FI930290 A0 FI 930290A0 FI 930290 A FI930290 A FI 930290A FI 930290 A FI930290 A FI 930290A FI 930290 A0 FI930290 A0 FI 930290A0
Authority
FI
Finland
Prior art keywords
computer
pct
interrupt requests
computer system
mcb
Prior art date
Application number
FI930290A
Other languages
English (en)
Finnish (fi)
Other versions
FI930290A (sv
FI99055B (sv
FI99055C (sv
Inventor
Michael Gronemeyer
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of FI930290A publication Critical patent/FI930290A/sv
Publication of FI930290A0 publication Critical patent/FI930290A0/sv
Publication of FI99055B publication Critical patent/FI99055B/sv
Application granted granted Critical
Publication of FI99055C publication Critical patent/FI99055C/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1691—Temporal synchronisation or re-synchronisation of redundant processing components using a quantum
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G06F11/185—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality and the voting is itself performed redundantly
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687—Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Small-Scale Networks (AREA)
  • Catching Or Destruction (AREA)
  • Respiratory Apparatuses And Protective Means (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Selective Calling Equipment (AREA)
  • Bus Control (AREA)
FI930290A 1990-08-14 1993-01-25 Anläggning för avbrottsfördelning i en flerdatorsystem FI99055C (sv)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP90115584 1990-08-14
EP90115584 1990-08-14
PCT/EP1991/001021 WO1992003786A1 (de) 1990-08-14 1991-06-03 Einrichtung zur interruptverteilung in einem mehrrechnersystem
EP9101021 1991-06-03

Publications (4)

Publication Number Publication Date
FI930290A FI930290A (sv) 1993-01-25
FI930290A0 true FI930290A0 (sv) 1993-01-25
FI99055B FI99055B (sv) 1997-06-13
FI99055C FI99055C (sv) 1997-09-25

Family

ID=8204330

Family Applications (1)

Application Number Title Priority Date Filing Date
FI930290A FI99055C (sv) 1990-08-14 1993-01-25 Anläggning för avbrottsfördelning i en flerdatorsystem

Country Status (8)

Country Link
US (1) US5382950A (sv)
EP (1) EP0543825B1 (sv)
AT (1) ATE110478T1 (sv)
DE (1) DE59102665D1 (sv)
DK (1) DK0543825T3 (sv)
ES (1) ES2060393T3 (sv)
FI (1) FI99055C (sv)
WO (1) WO1992003786A1 (sv)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3229070B2 (ja) * 1993-06-01 2001-11-12 三菱電機株式会社 多数決回路及び制御ユニット及び多数決用半導体集積回路
DE19620622A1 (de) * 1996-05-22 1997-11-27 Siemens Ag Verfahren zur Synchronisation von Programmen auf unterschiedlichen Computern eines Verbundes
US5799022A (en) * 1996-07-01 1998-08-25 Sun Microsystems, Inc. Faulty module location in a fault tolerant computer system
US20050125582A1 (en) * 2003-12-08 2005-06-09 Tu Steven J. Methods and apparatus to dispatch interrupts in multi-processor systems
US7089072B2 (en) * 2004-05-26 2006-08-08 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor manufacturing fault detection and management system and method
KR101490327B1 (ko) 2006-12-06 2015-02-05 퓨전-아이오, 인크. 뱅크 인터리브를 이용한 솔리드-스테이트 스토리지의 명령 관리 장치, 시스템 및 방법
US20110173266A1 (en) * 2008-09-18 2011-07-14 Pioneer Corporation Image sharing controller, image sharing system, image sharing controlling method, its program, and recording medium recorded with the program
RU2665226C2 (ru) * 2016-01-21 2018-08-28 Межрегиональное общественное учреждение "Институт инженерной физики" Мажоритарный элемент "5 и более из 9"
RU2626347C1 (ru) * 2016-05-18 2017-07-26 Олег Александрович Козелков Мажоритарный модуль для отказоустойчивых систем
RU2626346C1 (ru) * 2016-05-18 2017-07-26 Олег Александрович Козелков Многофункциональный мажоритарный модуль
JP2020145356A (ja) * 2019-03-07 2020-09-10 株式会社東芝 集積回路装置
RU2716061C1 (ru) * 2019-05-21 2020-03-05 Федеральное государственное казенное военное образовательное учреждение высшего образования "Военная академия Ракетных войск стратегического назначения имени Петра Великого" МО РФ Адаптивный мажоритарный блок элементов "5 и более из 9"
RU2726646C1 (ru) * 2020-02-07 2020-07-15 ФЕДЕРАЛЬНОЕ ГОСУДАРСТВЕННОЕ КАЗЕННОЕ ВОЕННОЕ ОБРАЗОВАТЕЛЬНОЕ УЧРЕЖДЕНИЕ ВЫСШЕГО ОБРАЗОВАНИЯ "Военная академия Ракетных войск стратегического назначения имени Петра Великого" МИНИСТЕРСТВА ОБОРОНЫ РОССИЙСКОЙ ФЕДЕРАЦИИ Устройство мажоритирования с заменой

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH556576A (de) * 1973-03-28 1974-11-29 Hasler Ag Einrichtung zur synchronisierung dreier rechner.
DE2939487A1 (de) * 1979-09-28 1981-04-16 Siemens AG, 1000 Berlin und 8000 München Rechnerarchitektur auf der basis einer multi-mikrocomputerstruktur als fehlertolerantes system
DE3208573C2 (de) * 1982-03-10 1985-06-27 Standard Elektrik Lorenz Ag, 7000 Stuttgart 2 aus 3-Auswahleinrichtung für ein 3-Rechnersystem
DE3431169A1 (de) * 1984-08-24 1986-03-06 Standard Elektrik Lorenz Ag, 7000 Stuttgart Verfahren zur synchronisation mehrerer parallelarbeitender rechner
US4733353A (en) * 1985-12-13 1988-03-22 General Electric Company Frame synchronization of multiply redundant computers
DE3642851A1 (de) * 1986-12-16 1988-06-30 Bbc Brown Boveri & Cie Fehlertolerantes rechensystem und verfahren zum erkennen, lokalisieren und eliminieren von fehlerhaften einheiten in einem solchen system
US4829198A (en) * 1987-04-10 1989-05-09 International Business Machines Corporation Fault tolerant logical circuitry
US5031180A (en) * 1989-04-11 1991-07-09 Trw Inc. Triple redundant fault-tolerant register
US5233615A (en) * 1991-06-06 1993-08-03 Honeywell Inc. Interrupt driven, separately clocked, fault tolerant processor synchronization

Also Published As

Publication number Publication date
WO1992003786A1 (de) 1992-03-05
US5382950A (en) 1995-01-17
EP0543825B1 (de) 1994-08-24
FI930290A (sv) 1993-01-25
ES2060393T3 (es) 1994-11-16
DK0543825T3 (da) 1995-03-20
EP0543825A1 (de) 1993-06-02
ATE110478T1 (de) 1994-09-15
DE59102665D1 (de) 1994-09-29
FI99055B (sv) 1997-06-13
FI99055C (sv) 1997-09-25

Similar Documents

Publication Publication Date Title
FI99055B (sv) Anläggning för avbrottsfördelning i en flerdatorsystem
Jones Jr et al. Three years of in vitro fertilization at Norfolk.
BR0010602A (pt) Método e aparelho para a comutação de linha em um processador de múltiplas linhas
DE69311797D1 (de) Fehlertolerantes computersystem mit vorrichtung fuer die bearbeitung von externen ereignissen
EP0330836A3 (en) Method for multiprocessor system having self-allocating processors
BR0014031A (pt) Método para implementação de uma tabela para uma pluralidade de aplicações em execução concorrente, método para contabilizar o suplemento de tempo de processamento consumido pela resposta de uma interrupção assìncrona gerada a favor de uma dentre uma pluralidade de aplicações em execução concorrente, e método para contabilizar o suplemento de tempo de processamento consumido por um sistema operacional de computador em resposta a uma interrupção assìncrona
MY105754A (en) Tightly coupled multiprocessor instruction synchronization.
EP0344450A3 (en) Apparatus and method for implementing precise interrupts on pipelined processor with multiple functional units
GB921885A (en) Data processing system
MY100954A (en) Data processing system with cpu register to register data transfers overlapped with data transfer to and from main storage.
ATE118907T1 (de) Einrichtung zur funktionsüberwachung externer synchronisations-baugruppen in einem mehrrechnersystem.
AU5441494A (en) Automatic logical cpu assignment of physical cpus
ATE178726T1 (de) Architektur für eine rechenanlage
EP0049521A3 (en) Information processing system
JPS55944A (en) Clock switching system
DE3467646D1 (en) Method of protecting software recorded by a supplier on a portable magnetic holder
JPS5654564A (en) Multiple computer system
JPS5493340A (en) Duplex processing system
JPS5566039A (en) Composite data processing unit data processing unit
JPS56140429A (en) Advanced processing system for power supply abnormality in multiprocessor processing system
JPS6428735A (en) Interruption control system
JPS5545006A (en) Multiprocessor control system of copying machine
JPS57191771A (en) Job processing system
JPS6426944A (en) Debugging device for computer system
JPS6459558A (en) Data processing system

Legal Events

Date Code Title Description
BB Publication of examined application
MM Patent lapsed