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EP2326592A2 - Encapsulage, système micro-électromécanique et procédé d'encapsulage - Google Patents

Encapsulage, système micro-électromécanique et procédé d'encapsulage

Info

Publication number
EP2326592A2
EP2326592A2 EP09780584A EP09780584A EP2326592A2 EP 2326592 A2 EP2326592 A2 EP 2326592A2 EP 09780584 A EP09780584 A EP 09780584A EP 09780584 A EP09780584 A EP 09780584A EP 2326592 A2 EP2326592 A2 EP 2326592A2
Authority
EP
European Patent Office
Prior art keywords
film
semiconductor substrate
encapsulation
layer
component structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09780584A
Other languages
German (de)
English (en)
Inventor
Peter Rothacher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2326592A2 publication Critical patent/EP2326592A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0035—Packages or encapsulation for maintaining a controlled atmosphere inside of the chamber containing the MEMS
    • B81B7/0041—Packages or encapsulation for maintaining a controlled atmosphere inside of the chamber containing the MEMS maintaining a controlled atmosphere with techniques not provided for in B81B7/0038
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/09—Packages
    • B81B2207/091—Arrangements for connecting external electrical signals to mechanical structures inside the package
    • B81B2207/094—Feed-through, via
    • B81B2207/095—Feed-through, via through the lid
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/01—Packaging MEMS
    • B81C2203/0109—Bonding an individual cap on the substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/01—Packaging MEMS
    • B81C2203/0172—Seals
    • B81C2203/019—Seals characterised by the material or arrangement of seals between parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS

Definitions

  • the invention relates to an encapsulation according to the preamble of claim 1, a micro-electro-mechanical system (MEMS) according to claim 11 and a method for encapsulating a sensitive component structure on a semiconductor substrate according to claim 12.
  • MEMS micro-electro-mechanical system
  • Inertial sensors such as acceleration sensors or yaw rate sensors
  • KOH-etched silicon caps the caps being fixed by means of a seal-glass connection to the semiconductor substrate having the sensitive component structure.
  • Another established method for encapsulating sensitive device structures on semiconductor substrates is anodic bonding of three-dimensionally patterned glass wafers.
  • structured silicon wafers are fixed as encapsulation with different bonding methods on semiconductor substrates. All the aforementioned methods have in common that a cost-intensive, three-dimensionally structured cap made of silicon or glass is used.
  • the well-known encapsulation comprises a A frame structure surrounding a component structure of a cured reaction resin and a planar, the frame structure covering and with this a cavity forming cap, consisting of a flat (two-dimensional) plastic film and a hardened reaction resin layer arranged above.
  • a disadvantage of the known encapsulation is its complex manufacturing process using an auxiliary film to be applied first and then to be removed again.
  • US 2002/0121701 A1 describes an encapsulation method for encapsulating a non-MEMS wafer, wherein to encapsulate the semiconductor substrate, it is coated with an initially liquid polymer layer.
  • the known encapsulation is not suitable for MEMS due to the lack of cavities.
  • the invention has for its object to propose an alternative, simple and inexpensive encapsulation for a mechanical component structure on a semiconductor substrate. Furthermore, the object is to provide a MEMS with at least one such encapsulation and a manufacturing method for producing an encapsulated component structure.
  • the invention is based on the idea of using a film comprising at least one polymer layer instead of a costly silicon wafer for encapsulating a sensitive mechanical component structure of a MEMS.
  • the film is to be formed and / or arranged such that it covers the mechanical component structure at a distance.
  • photolithographic steps and PVD (Physical Vapor Deposition) steps as used in KOH etched silicon caps, may be used come, be waived.
  • a trained according to the concept of the invention encapsulation is characterized by at least one, the film passing through contact.
  • a, in particular three-dimensionally structured, preferably having a plurality of cavities, film is already used in the wafer stage in the production of MEMS, thus a plurality of sensitive, mechanical component structures of a plurality of MEMS simultaneously in one to encapsulate the so-called wafer level process.
  • the component structure is a component of an inertial sensor, in particular an acceleration sensor, or a yaw rate sensor, a microphone or a pressure sensor.
  • the proposed encapsulation is due to the significantly reduced manufacturing costs optimal for consumer inertial sensors for use in handheld devices, so-called handhelds, such as mobile phones, Pocket PCs, etc.
  • a trained according to the concept of the invention encapsulation has great potentials in terms of thicknesses - and size reduction in comparison with the known from the prior art encapsulation.
  • the film has a dimensional stability at the temperatures occurring during the bonding of the film.
  • the film has a dimensional stability at the temperatures occurring during the bonding of the film.
  • Heat distortion temperature at temperatures of about 230 ° C still be guaranteed.
  • the film should be at least largely dimensionally stable with advantage.
  • the film as possible low expansion coefficient, in order to avoid an inadmissible deformation of the encapsulation and thus of the MEMS in subsequent use, even with strong temperature fluctuations.
  • the expansion coefficient is less than 20 ppm / K, most preferably less than 17 ppm / K, more preferably less than 10 ppm / K.
  • the polymer layer of the film which is preferably in the form of a multilayer film, very particularly preferably the entire film, behaves isotropically with respect to its coefficient of expansion in the x and y directions. For this purpose, the polymer layer and / or the entire film can be biaxially stretched.
  • Polymer layer of the film of liquid crystal polymer (LCP) consists or at least comprises this compound.
  • Liquid crystalline polymer has in the melt
  • Reaction resin as used in the encapsulation of the prior art.
  • LCP low-density polyethylene
  • PEEK polyetheretherketone
  • PEEK polyetheretherketone
  • PES polyvenylene sulfide
  • PAS polyarylsulfone
  • the at least one cavity can be introduced, for example, by injection molding, stamping, in particular injection-compression molding, thermoforming, deep drawing or casting. During the casting this will be
  • Foil polymer poured into a mold and then cured thermally or by UV irradiation.
  • the cavity can also be closed by a two-dimensionally shaped film, in which case a spacer (frame), in particular galvanically constructed, has to be provided between the semiconductor substrate and the film.
  • a spacer in particular galvanically constructed
  • This framework can be realized simultaneously with the electroplating of the vias, if necessary, in particular by established punching, drilling, photolithography / etching and / or laser drilling processes.
  • the film to ensure sufficient hermidity of the film with respect to moisture and / or gas, in particular oxygen at least one metal layer.
  • the metal layer is preferably formed from ductile copper. It is, however Additionally or alternatively, a variety of other metals such as nickel, aluminum, stainless steel, etc. can be used as a metal layer (s).
  • the metal should be selected to have high ductility (elongation at break), a low coefficient of expansion, preferably less than 17 ppm / K, and a melting point well above 280 ° C.
  • a metal layer possibly directly contacting another bonding layer, is provided for encapsulation with the semiconductor substrate, preferably with a metallization of the semiconductor substrate to be able to bond in a simplified manner.
  • a thermocompression bonding method is advantageously used for bonding, wherein it is particularly preferred to match the bonding system, ie all layers involved in the soil and the pressure used, so that bonding temperatures below 280 ° C., preferably around 260 ° C., can be realized.
  • SLID solid-liquid-inter-diffusion soldering process
  • Metallization semiconductor substrate
  • the SLID bonding technique is characterized by depositing a layer of low melting metal, such as tin, between upper and lower layers of higher melting metal, such as copper, and melting at low temperatures. The melting at higher temperatures metal now diffuses into the upper and the lower layer, forming a higher melting alloy and solidifies. With further bonding / soldering processes, a re-melting of the connection is thus reliably prevented.
  • the film thickness is less than 200 ⁇ m. Most preferably, the film thickness is less than 180 ⁇ m, most preferably less than 160 ⁇ m. Preferably, the film thickness is about 120 ⁇ m or below.
  • the stiffening layer preferably made of metal, very particularly preferably of electrodeposited copper.
  • the stiffening layer can be realized as a sandwich layer (for example: Cu-Ni-Cu).
  • stiffening layer it is possible to stiffen the film by a corresponding three-dimensional shaping.
  • a curvature and / or at least one waveform and / or a polygonal sawtooth shape and / or at least one contoured, preferably polygonal contoured, indentation (bead) can be realized in the direction of the semiconductor substrate.
  • a stop is to be understood as a small-area elevation projecting in the direction of the component structure, which prevents excessive deflection of the component structure or adhesion of the component structure to the foil lid.
  • At least one rewiring plane in addition to at least one through-contact in the foil, at least one rewiring plane, in particular made of electrically conductive metal, is integrated over the at least two terminal regions of the semiconductor substrate and / or two external contacts can be electrically connected to each other.
  • the invention also leads to a MEMS (microelectromechanical system) with a previously described encapsulation which has at least one polymer layer and at least one through-contact penetrating the polymer layer.
  • MEMS microelectromechanical system
  • the invention leads to a method for encapsulating a sensitive mechanical component structure on a semiconductor substrate with the steps: providing at least one, preferably having a cavity, film having at least one polymer layer and at least one via; Relatively positioning the film (relative) to the semiconductor substrate and bonding the film to the semiconductor substrate or a coating, preferably a bonding frame, in particular a metallization, of the semiconductor substrate.
  • a coating preferably a bonding frame, in particular a metallization
  • a film which is preferred in terms of its areal extent, at least approximately, corresponding to the wafer areal extent, is positioned relative to the wafer, more precisely to the component structures provided on the wafer, whereupon the film is bonded to the wafer.
  • FIG. 1 shows a first embodiment of an encapsulated mechanical structure with a two-dimensional
  • Fig. 2 shows a second, alternative embodiment of an encapsulation with a three-dimensionally structured film.
  • a MEMS 1 micro-electro-mechanical system
  • the MEMS 1 comprises a semiconductor substrate 2 with a sensitive, mechanical component structure 3 formed thereon, which is formed from semiconductor material.
  • the component structure 3 is protected by an encapsulation 4 from mechanical and other environmental influences, such as temperature and humidity, as well as gas.
  • the encapsulation 4 comprises a film 5 formed as a multilayer film.
  • the film 5 is formed in two dimensions and forms, together with one on the Semiconductor substrate 2 provided, designed as a bonding frame, spacer 6 a cavity 7, which gives the device structure 3 sufficient freedom of movement.
  • the film 5 comprises a polymer layer 8, in the illustrated embodiment of LCP.
  • the polymer layer 8 is coated on both flat sides with a first metal layer 9.
  • This is formed from a copper foil laminated on the polymer layer and serves to optimize the hermiticity of the cavity 7 closed by the foil 5.
  • the first metal layers 9 are in each case in turn a further, namely second, metal layer 10, which is formed in the embodiment shown from galvanically reinforced copper.
  • the film 5 on the side facing the semiconductor substrate 2 is connected directly to the semiconductor substrate 2 via a bonding layer 11.
  • On the side facing away from the semiconductor substrate 2 side of the film 5 are located on the second metal layer 10 in electrically isolated regions solder balls 12 for a flip-chip application.
  • solder resist 13 on the side of the foil 5 facing away from the semiconductor substrate 2, which is applied partly on the second metal layer 10 and partly directly on the polymer layer 8.
  • the direct contacting of the polymer layer 8 with solder resist 13 results from a structuring of the first and the second metal layer 9, 10 for the production of electrically isolated regions.
  • spacers 14 are provided on the first metal layer 9, which limit a deflection movement of the mechanical component structure 3.
  • the polymer layer 8 of the film 5 is penetrated by through contacts 15 which extend perpendicular to the semiconductor substrate 2 and are each formed from galvanically reinforced copper.
  • the vias 15 directly connect the metal layers 9, 10 on both sides of the polymer layer 8 with each other and in electrically isolated areas.
  • the semiconductor substrate 2 or electrical and / or electronically effective regions or elements of the semiconductor substrate 2, not shown, are electrically connected to a respective solder ball 12.
  • FIG. 2 shows an alternatively constructed MEMS.
  • the semiconductor substrate 2 with its sensitive, mechanical component structure 3.
  • a film 5 realized as a multilayer film is fixedly connected to the semiconductor substrate 2 while forming a cavity 7.
  • the film 5 is shaped in three dimensions, for example, by thermoforming or injection molding.
  • the film 5 comprises a polymer layer 8 which is provided on both flat sides with a first metal layer 9.
  • the first metal layer 9 is fixed directly to the semiconductor substrate 2 via a bonding layer 11. Also in the embodiment of FIG.
  • the polymer layer 8 is penetrated by two perpendicular to the semiconductor substrate 2 extending through contacts 15, each having a solder ball 12 electrically connected to the
  • the semiconductor substrate 2 or not shown electrical and / or electronic regions or elements of the semiconductor substrate 2 are electrically conductively connected via the electrically conductive bonding layer 11 with the first metal layer 9 contacted by the through contacts 15 ,
  • the regions of the first metal layer 9 contacted by the through contacts 15 are electrically insulated from one another by a corresponding structuring of the first metal layer 9, both on the side facing the semiconductor substrate 2 and on the opposite side.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)
  • Pressure Sensors (AREA)
  • Measuring Fluid Pressure (AREA)

Abstract

L'invention concerne un encapsulage (4) d'une structure de composant mécanique sensible (3) sur un substrat à semi-conducteurs (2), présentant une pellicule (5) recouvrant la structure de composant (3), la pellicule contenant au moins une couche polymère (8). Au moins une cavité (7) est créée entre la structure de composant (3) et la pellicule (5). Selon l'invention, la pellicule (5) est traversée par au moins un contact traversant (15).
EP09780584A 2008-09-15 2009-07-15 Encapsulage, système micro-électromécanique et procédé d'encapsulage Withdrawn EP2326592A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102008042106A DE102008042106A1 (de) 2008-09-15 2008-09-15 Verkapselung, MEMS sowie Verfahren zum Verkapseln
PCT/EP2009/059009 WO2010028884A2 (fr) 2008-09-15 2009-07-15 Encapsulage, système micro-électromécanique et procédé d'encapsulage

Publications (1)

Publication Number Publication Date
EP2326592A2 true EP2326592A2 (fr) 2011-06-01

Family

ID=41667652

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09780584A Withdrawn EP2326592A2 (fr) 2008-09-15 2009-07-15 Encapsulage, système micro-électromécanique et procédé d'encapsulage

Country Status (5)

Country Link
US (1) US8680665B2 (fr)
EP (1) EP2326592A2 (fr)
DE (1) DE102008042106A1 (fr)
TW (1) TW201018640A (fr)
WO (1) WO2010028884A2 (fr)

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DE102008054415A1 (de) * 2008-12-09 2010-06-10 Robert Bosch Gmbh Anordnung zweier Substrate mit einer SLID-Bondverbindung und Verfahren zur Herstellung einer solchen Anordnung
DE102010040370B4 (de) * 2010-09-08 2016-10-06 Robert Bosch Gmbh MEMS-Mikrofon-Package
US9365416B2 (en) 2011-08-15 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for motion sensor
DE102011112476A1 (de) * 2011-09-05 2013-03-07 Epcos Ag Bauelement und Verfahren zum Herstellen eines Bauelements
DE102011119610A1 (de) 2011-11-29 2013-05-29 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur Herstellung strukturierter optischer Komponenten
US8853801B2 (en) 2012-04-19 2014-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. MEMS devices and methods of forming the same
US8736045B1 (en) * 2012-11-02 2014-05-27 Raytheon Company Integrated bondline spacers for wafer level packaged circuit devices
DE102012111001A1 (de) * 2012-11-15 2014-05-15 Endress + Hauser Gmbh + Co. Kg Dichtring und Druckmessaufnehmer mit mindestens einem solchen Dichtring
DE102012224424A1 (de) * 2012-12-27 2014-07-17 Robert Bosch Gmbh Sensorsystem und Abdeckvorrichtung für ein Sensorsystem
DE102016112200A1 (de) * 2016-07-04 2018-01-04 Endress+Hauser Gmbh+Co. Kg Druckaufnehmer
DE102016112198A1 (de) * 2016-07-04 2018-01-04 Endress+Hauser Gmbh+Co. Kg Druckaufnehmer
CN113443602B (zh) * 2021-06-02 2023-12-08 中国科学院地质与地球物理研究所 微机电系统芯片晶圆级封装结构及其制造工艺

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Also Published As

Publication number Publication date
WO2010028884A2 (fr) 2010-03-18
DE102008042106A1 (de) 2010-03-18
WO2010028884A3 (fr) 2010-12-23
TW201018640A (en) 2010-05-16
US8680665B2 (en) 2014-03-25
US20110180887A1 (en) 2011-07-28

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