[go: up one dir, main page]

EP1662794A1 - Video-codierungs-einrichtung, video-codierungs-steuerverfahren und video-codierungs-steuerprogramm - Google Patents

Video-codierungs-einrichtung, video-codierungs-steuerverfahren und video-codierungs-steuerprogramm Download PDF

Info

Publication number
EP1662794A1
EP1662794A1 EP04772897A EP04772897A EP1662794A1 EP 1662794 A1 EP1662794 A1 EP 1662794A1 EP 04772897 A EP04772897 A EP 04772897A EP 04772897 A EP04772897 A EP 04772897A EP 1662794 A1 EP1662794 A1 EP 1662794A1
Authority
EP
European Patent Office
Prior art keywords
coding
processing
frame
video
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04772897A
Other languages
English (en)
French (fr)
Other versions
EP1662794A4 (de
Inventor
Ikuo C/O Sony Corporation Tsukagoshi
Shinji c/o Sony Corporation Takada
Koichi c/o Sony Corporation GOTO
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of EP1662794A1 publication Critical patent/EP1662794A1/de
Publication of EP1662794A4 publication Critical patent/EP1662794A4/de
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/12—Selection from among a plurality of transforms or standards, e.g. selection between discrete cosine transform [DCT] and sub-band transform or selection between H.263 and H.264
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/127—Prioritisation of hardware or computational resources
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/156—Availability of hardware or computational resources, e.g. encoding based on power-saving criteria
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/172—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a picture, frame or field

Definitions

  • the present invention relates to a video coding apparatus, a method of controlling video coding and a program of controlling video coding and is suitably applicable to a video coding apparatus of implementing software coding.
  • such a software codec is advantageous for its capability of easily resolving internationally standardized compressively coding system or other various compressively coding method such as MPEG (Moving Picture Experts Group) 1/2/4 and JPEG 2000 and the like only by changing a video processing program.
  • MPEG Motion Picture Experts Group
  • JPEG 2000 Joint Photographic Experts Group 2000
  • Patent Document 1 Japanese Patent Laid-Open No. 2003-61097
  • a CPU processes video coding processing (video coding thread or process) and audio coding processing (audio coding thread or process) alternately in a time-sharing fashion.
  • video coding processing video coding thread or process
  • audio coding processing audio coding thread or process
  • its delay or lack is apt to be perceived by users, and therefore, in general, audio coding thread undergoes processing preferentially. For example, audio covering one frame undergoes processing during one frame period (1/30 second) and thereafter one frame of video undergoes processing.
  • Figure 8 shows a processing state of software encoding, and video data as well as audio data inputted from outside are tentatively stored in video input buffer as well as audio input buffer respectively.
  • the CPU at first executes audio coding thread and reads from audio input buffer, compressively codes and thereafter outputs audio data covering one frame. Subsequently, the CPU executes video coding thread, reads from video input buffer, compressively codes and thereafter outputs one frame of video data. Thus, the CPU proceeds with coding audio data as well as video data sequentially on a frame period basis in a time-sharing fashion.
  • processing time thereof does not change much, but in contrast, in compressively coding processing on video, processing time thereof changes dramatically in accordance with the level of complication on input video (picture or motion and the like) intended to undergo coding.
  • processing time is short on video that are abundant in comparatively flat parts and less abundant in movement and, in contrast, processing time increases on video including pictures that are complicated and movements taking place far, such as sports broadcasting, that undergoes panning and zoom at an moderate speed. Due to this increase in processing time, there is a case where it becomes impossible to complete coding processing within one frame period. Such processing delay is called overrun.
  • the N-th frame is extremely complicated and coding is regarded to have failed in completion of coding within one frame period (occurrence of an overrun).
  • completion, by the CPU, of coding processing on the N-th frame subject to occurrence of an overrun will end in cutting into the time to code the N+1-th frame.
  • switching of respective coding threads on audio is normally implemented by context switching by an OS (Operating System) .
  • this frame period is a period to process the N+1-th frame originally, but the frame subject to occurrence of an overrun has undergone processing, the N+1-th frame cannot undergo processing. Therefore, the CPU skips coding processing on the relevant N+1-th frame to implement coding processing from the next N+2-th frame.
  • the present invention has been attained in consideration of the above described points and is intended to propose a video coding apparatus that is simple in configuration and can avoid video display quality deterioration due to an overrun of video coding processing, a method of controlling video coding and a program of controlling video coding.
  • the present invention is designed to provide a video coding apparatus with coding means for bringing video into coding processing on a frame basis with a first coding processing method; processing time detecting means for detecting coding actual processing time required for coding processing on a frame; delay calculating means for calculating processing delay time of coding processing on the frame based on predetermined coding predicted processing time given to coding processing and coding actual processing time; and coding load controlling means for, in a case where processing delay time on a frame is greater than or equal to a predetermined threshold value, instructing coding means to implement coding processing on a subsequent frame with a second coding processing method bearing coding processing load lower than in the first coding processing method.
  • controlling to reduce coding load on the subsequent frame makes it possible to shorten frame processing time after occurrence of an overrun so as to recover from the overrun and to prevent a frame skip due to occurrence of an overrun and avoid video display quality deterioration.
  • the present invention has been designed to, when an accumulated value of processing delay time on a plurality of frames in succession is greater than or equal to a predetermined threshold value, implement coding processing on a subsequent frame to the relevant plurality of frames in succession with a third coding processing method bearing coding processing load lower than in the second coding processing method.
  • the present invention can realize a video coding apparatus, a method of controlling video coding and a program of controlling video coding that can control coding load on a subsequent frame to reduce in accordance with occurrence of delay in video coding processing; thereby, shorten processing time of frames after occurrence of an overrun to recover from the overrun; and prevent a frame skip due to occurrence of an overrun and avoid video display quality deterioration.
  • reference numeral 1 holistically denotes a signal processing apparatus as a video coding apparatus according to the present invention, and a local memory 3, a signal input/output portion 4 and a network interface 5 are connected to a CPU 2 that controls the relevant signal processing apparatus 1 integrally.
  • the CPU 2 is directly connected to the local memory 3 with a rapid local bus.
  • the CPU 2 is designed to read and execute a codec program stored in ROM not shown in the drawing and thereby process coding as well as decoding on video as well as audio signals with software.
  • the signal processing apparatus 1 brings analog video signals and analog audio signals inputted from outside into digital conversion with an A/D (Analog/Digital) converter 4A of the signal input/output portion 4 at the time of coding video and audio, generates digital video data and digital audio data (hereinafter abbreviated to video data and audio data) and tentatively stores them in the local memory 3.
  • A/D Analog/Digital
  • the CPU 2 sequentially reads video data and audio data stored in the localmemory 3, and compressively codes them in an internationally standardized compression system such as MPEG 1/2/4 and the like, for example, or in the other various video/audio compression system in accordance with the codec program having been described above and generates coded video data and coded audio data.
  • an internationally standardized compression system such as MPEG 1/2/4 and the like, for example, or in the other various video/audio compression system in accordance with the codec program having been described above and generates coded video data and coded audio data.
  • the CPU 2 tentatively stores these coded video data and coded audio data in the local memory 3 and thereafter sequentially reads out and supplies them to the network interface 5.
  • the network interface 5 processes the coded video data and the coded audio data to form packets (packetize) according to a predetermined format to transmit them to external memory media or appliances at the destination of transmission.
  • the signal processing apparatus 1 brings packetized coded video data and coded audio data supplied from outside storage media and appliances at the source of transmission into recovery (depacketization) with a network interface 5 at the time of decoding video and audio and tentatively stores them in the local memory 3.
  • the CPU 2 as coding means sequentially reads compressed video data and compressed audio data stored in the local memory 3 and decodes them in accordance with the codec program having been described above to generate video data and audio data.
  • a D/A (Digital/Analog) converter 4B of the signal input/output portion 4 brings video data and audio data into analog conversion to generate analog video signals and analog audio signals, and outputs them to outside.
  • the signal processing apparatus 1 executes coding processing and decoding processing onto video signals and audio signals with a software codec.
  • the video data and the audio data supplied from the A/D converter 4A (in Figure 1) of the signal input/output portion 4 are respectively stored in video input buffer 3A and audio input buffer 3B of the local memory 3.
  • a video input buffer controller 10A in the codec program executed by the CPU 2 always monitors the video input buffer 3A, and when video data covering one frame are accumulated in the relevant video input buffer 3A having a size covering two frames, transmits a start command to the video coding thread 11A in the codec program in accordance with them, and causes it to transfer the video data covering one frame from the video input buffer 3A to the video coding thread 11A.
  • the video coding thread 11A reads out video data covering one frame from the video input buffer 3A in accordance with the start command supplied from the video input buffer controller 10A, and compressively codes them to output to a video stream output buffer 3C of the local memory 3 and transmits feedback message as finalization cue back to the video input buffer controller 10A to finalize the thread.
  • an audio input buffer controller 10B in the codec program always monitors the audio input buffer 3B, and when audio data covering one frame are accumulated in the relevant audio input buffer 3B, transmits a start command to the audio coding thread 11B in the codec program in accordance with them, and causes it to transfer the audio data covering one frame from the audio input buffer 3B to the audio coding thread 11B.
  • the audio coding thread 11B reads out audio data covering one frame from the audio input buffer 3B in accordance with the start command supplied from the audio input buffer controller 10B, and compressively codes them to output to an audio stream output buffer 3D of the local memory 3 and transmits feedback message as finalization cue back to the audio input buffer controller 10B to finalize the thread.
  • the audio coding thread 11B is processed in priority to the video coding thread 11A.
  • a packetizer 5A of the network interface 5 reads out, packetizes and outputs coding video data and coding audio data from the video stream output buffer 3C and the audio stream output buffer 3D.
  • a depacketizer 5B of the network interface 5 extracts the coded video data and the coded audio data from the packets supplied from outside to store them in a video stream input buffer 3E of the local memory 3 and an audio stream input buffer 3F.
  • a video stream input buffer controller 10C in the codec program executed by the CPU 2 always monitors the video stream input buffer 3E, and when coded video data covering one access unit are accumulated in the relevant video stream input buffer 3E, transmits a start command to the video decoding thread 12A in the codec program executed by the CPU 2, and causes it to transfer the coded video data covering one access unit from the video stream input buffer 3E to the video decoding thread 12A.
  • the video decoding thread 12A reads out coded video data covering one access unit from the video stream input buffer 3E in accordance with the start command supplied from the video stream input buffer controller 10C, and decodes them to output to a video output buffer 3G of the local memory 3 and transmits feedback message as finalization cue back to the video stream input buffer controller 10C to finalize the thread.
  • an audio stream input buffer controller 10D in the codec program always monitors the audio stream input buffer 3F, and when coded audio data covering one access unit are accumulated in the relevant audio stream input buffer 3F, transmits a start command to the audio decoding thread 12B in the codec program in accordance with them, and causes it to transfer the coded audio data covering one access unit from the audio stream input buffer 3F to the audio decoding thread 12B.
  • the audio decoding thread 12B reads out coded audio data covering one access unit from the audio stream input buffer 3F in accordance with the start command supplied from the audio stream input buffer controller 10D, and decodes them to output to an audio output buffer 3H of the local memory 3 and transmits feedback message as finalization cue back to the audio stream input buffer controller 10D to finalize the thread.
  • this signal processing apparatus 1 is designed to prioritize the audio coding thread, at the time of coding and to alternately execute the audio coding thread and the video coding thread respectively covering one frame during one frame period to implement coding processing.
  • this signal processing apparatus 1 is designed, in the case where coding delay (overrun) has taken place in video coding processing, to change the thread execution order and reduce loads of video coding processing, and thereby recover from an overrun without implementing a coding skip (hereinafter to be referred to as overrun recovery).
  • the CPU 2 as processing time detecting means obtains time information in starting timing and ending timing of the video coding thread from a system time clock (not shown in the drawing), and calculates coding actual processing time per one frame from time difference between this starting timing and ending timing. Moreover, the CPU 2 as delay calculating means calculates processing delay time subject to subtraction of coding predicted processing time predicted in advance from this coding actual processing time.
  • the CPU 2 as coding load controlling means regards this processing delay time occasionally being larger than "0" as occurrence of an overrun and executes overrun recovery.
  • the CPU 2 immediately starts coding processing on the N+1-th frame.
  • the CPU 2 as coding load controlling means applies, to this N+1-th frame, a coding processing method bearing load lower than normal coding processing.
  • This coding processing method bearing load lower than normal will be called recovery encoding mode 1.
  • a normal coding processing method will be called normal encoding.
  • Figure 4 and Figure 5 show processing diagrams of normal encoding and recovery encoding mode 1.
  • the CPU 2 makes a search range of motion vector in prediction coding narrower than in normal encoding, and thereby cuts processing cycles of motion vector searching to reduce processing load, and thereby shortens coding processing time per frame.
  • the CPU 2 applies normal encoding to the subsequent N+2-th frame and onward to implement processing.
  • the CPU 2 starts coding processing on the next N+2-th frame.
  • the CPU 2 as coding load controlling means applies, to this N+2-th frame, a coding processing method bearing processing load much lower than the recovery encoding mode 1.
  • This coding processing method will be called recovery encoding mode 2.
  • the CPU 2 halts a series of feedback processing system of revitalizing a frame by inverse quantization, inverse transform coding and motion compensation as in a processing diagram shown in Figure 6.
  • This feedback processing system is a process of restructuring a reference frame onto frame memory in order to predict the next frame.
  • the CPU 2 halts this feedback system in the recovery encoding mode 2 and thereby further shortens coding processing time compared with the mode 1.
  • the CPU 2 is designed to recover surely from an overrun within 3 frame periods from occurrence of an overrun by applying a mode 2 bearing further lower processing load to the subsequent frame in the case where application of the recovery encoding mode 1 failed in recovery from overrun.
  • the CPU 2 codes the subsequent frame as I picture (intra-coding picture) undergoing no motion prediction, and restructures a GOP (Group Of Picture) with this frame as a starting point.
  • the CPU 2 obtains coding thread ending timing on directly previous video frame and coding thread starting timing on the current video frame directly from an OS (Operation System) or hardware and stores them respectively. And the CPU 2 derives difference between the starting time and then ending time, that is already in storage, on the directly previous frame and thereby calculates processing delay time TN required for coding of the directly previous frame and adds the relevant TN to the overrun accumulated processing time and moves to the step SP2.
  • accumulated processing delay time is set to "0" at the processing starting time.
  • the CPU 2 determines presence or absence of occurrence of an overrun from the calculated accumulated processing delay time and a value of an overrun counter.
  • step SP2 in the case where a value derived by dividing the accumulated processing delay time with the overrun counter value is smaller than target time TGT (TarGet Time) given as video coding thread at the system starting time, this indicates that no overrun has occurred, and at this time, the CPU 2 moves to the step SP3 so as to code this frame with normal encoding to reset the accumulated processing delay time to "0" and simultaneously reset the overrun counter to "1" and returns to the step SP1.
  • TGT TuGet Time
  • step SP2 in the case where a value derived by dividing the accumulated processing delay time with the overrun counter value is larger than target time TGT (TarGet Time) given as video coding thread at the system starting time, this indicates that an overrun has occurred, and at this time, the CPU 2 moves to the step SP4 so as to add "1" to the value of the overrun counter for counting the number of frames where overruns have occurred, and moves to the next step SP5.
  • TGT TuGet Time
  • the CPU 2 determines the number of frames having undergone an overrun based on a count value of the overrun counter.
  • step SP5 in the case where the number of frame having undergone an overrun is determined to be once, the CPU 2 moves to the step SP6, applies the recovery encoding mode 1 to the subsequent frame to execute coding and returns to the step SP1.
  • step SP5 in the case where the number of frame having undergone an overrun is determined not to be once, the CPU 2 moves to the step SP7, applies the recovery encoding mode 2 to the subsequent frame to execute coding, and moreover designates coding in the I picture to the further subsequent frame and restructures the GOP to return to the step SP1.
  • this signal processing apparatus 1 prioritizes the audio coding thread and alternately executes the audio coding thread and the video coding thread respectively covering one frame during one frame period to proceed with coding on video and audio.
  • the signal processing apparatus 1 detects occurrence of an overrun in the video coding thread, then in accordance herewith, immediately starts coding the next frame subsequent to the frame subject to occurrence of the relevant overrun. At this time, the signal processing apparatus 1 applies the recovery encoding mode 1 bearing light processing load to the next frame and thereby tries to shorten coding processing time per frame to recover from the overrun.
  • the signal processing apparatus 1 applies, to the further subsequent frame, the recovery encoding mode 2 bearing further lighter processing load, and thereby can surely recover from an overrun within a finite frame period from occurrence of an overrun (for example, within 3 frame periods).
  • the signal processing apparatus 1 can thus avoid a frame skip due to an overrun, and therefore can reduce processing capacity and clock frequency and the like of the CPU 2 and the peripheries and can reduce the configuration of a system in its entirety and power consumption.
  • the signal processing apparatus 1 reduces coding processing load on subsequent frames in accordance with occurrence of an overrun, and thereby can avoid video display quality deterioration due to a frame skip.
  • the above described embodiment has been designed to, at first, apply the recovery encoding mode 1 with a search range of motion vectors has been narrowed in accordance with occurrence of an overrun, and in case of failure in recovery from the overrun despite this, further apply, to the subsequent frame, the mode 2 bearing lighter processing load and thereby enable recovery from an overrun within 3 frame periods from occurrence of the overrun, but this recovery period will not be limited to 3 frame periods.
  • applying the mode 1 a plurality of time in succession or applying the mode 2 immediately after occurrence of an overrun and the like use of a variety of patterns enables reduction of video coding processing load at on and after occurrence of an overrun.
  • the above described embodiment has been designed to use two types of recovery encoding, that is, the mode 1 with a search range of motion vectors having been narrowed and the mode 2 with omission of reference frame restructuring processing for interframe prediction, nevertheless the present invention will not be limited hereto, but the other various kinds of coding processing subject to reduction of processing load may be combined for use.
  • the present invention will not be limited hereto but may be applied to a signal coding apparatus having only the coding function or only the decoding function.
  • the video coding apparatus, the method of controlling video coding and the program of controlling video coding of the present invention are applicable to applications such as , for example, real time distribution or reception, through the Internet, of moving pictures digitalized contents or analog video signals subject to digitalization having undergone compressively coding; real time distribution and reception under domestic or limited network environments; and video recorder such as time shifting (PVR: Personal Video Recording).
  • applications such as , for example, real time distribution or reception, through the Internet, of moving pictures digitalized contents or analog video signals subject to digitalization having undergone compressively coding; real time distribution and reception under domestic or limited network environments; and video recorder such as time shifting (PVR: Personal Video Recording).

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Discrete Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
EP04772897A 2003-09-02 2004-09-02 Video-codierungs-einrichtung, video-codierungs-steuerverfahren und video-codierungs-steuerprogramm Withdrawn EP1662794A4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003310638A JP3802521B2 (ja) 2003-09-02 2003-09-02 符号化装置、符号化制御方法及び符号化制御プログラム
PCT/JP2004/013083 WO2005025226A1 (ja) 2003-09-02 2004-09-02 映像符号化装置、映像符号化制御方法及び映像符号化制御プログラム

Publications (2)

Publication Number Publication Date
EP1662794A1 true EP1662794A1 (de) 2006-05-31
EP1662794A4 EP1662794A4 (de) 2012-07-25

Family

ID=34269653

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04772897A Withdrawn EP1662794A4 (de) 2003-09-02 2004-09-02 Video-codierungs-einrichtung, video-codierungs-steuerverfahren und video-codierungs-steuerprogramm

Country Status (7)

Country Link
US (1) US8665966B2 (de)
EP (1) EP1662794A4 (de)
JP (1) JP3802521B2 (de)
KR (1) KR101121613B1 (de)
CN (1) CN1860792B (de)
TW (1) TWI249958B (de)
WO (1) WO2005025226A1 (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010003674A1 (de) 2008-07-09 2010-01-14 Interroll Holding Ag Rollenbahn mit profilschiene
CN101394554B (zh) * 2008-09-28 2010-06-09 湖北科创高新网络视频股份有限公司 一种自适应跳帧方法和装置
EP3258690A1 (de) * 2016-06-15 2017-12-20 Fujitsu Limited Bildcodierungsvorrichtung, bildcodierungsverfahren und auf einem speichermedium gespeichertes bildcodierungsprogramm

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8711923B2 (en) * 2002-12-10 2014-04-29 Ol2, Inc. System and method for selecting a video encoding format based on feedback data
JP4623650B2 (ja) * 2005-09-06 2011-02-02 パナソニック株式会社 動画像符号化装置，動画像符号化方法
CN100466736C (zh) * 2005-12-30 2009-03-04 杭州华三通信技术有限公司 运动图像编码控制方法及编码装置
JP2007195117A (ja) * 2006-01-23 2007-08-02 Toshiba Corp 動画像復号装置
JP2007251553A (ja) * 2006-03-15 2007-09-27 Matsushita Electric Ind Co Ltd リアルタイム処理装置及びその方法
JP2008092107A (ja) * 2006-09-29 2008-04-17 Toshiba Corp 情報処理装置及び音声／映像データ再生方法
CN100463525C (zh) * 2006-12-11 2009-02-18 浙江大学 计算复杂度可动态调整的视频编码方法和装置
JP2008216472A (ja) * 2007-03-01 2008-09-18 Matsushita Electric Ind Co Ltd 音声復号化装置及び音声復号化システム
JP5652066B2 (ja) * 2010-09-03 2015-01-14 ヤマハ株式会社 動画圧縮制御装置、動画記録装置及び動画記録再生装置
CA2911756C (en) * 2013-05-09 2023-06-27 Sunnybrook Research Institute Systems and methods for providing visual feedback of touch panel input during magnetic resonance imaging
CN103402086B (zh) * 2013-07-22 2017-02-15 华为技术有限公司 一种用于视频编码系统的性能控制方法及编码器
US9397683B2 (en) * 2014-08-05 2016-07-19 Intel Corporation Reduced digital audio sampling rates in digital audio processing chain
CN105898371A (zh) * 2015-12-07 2016-08-24 乐视云计算有限公司 实时转码的实时控制方法及装置
CN112040235B (zh) * 2020-11-04 2021-03-16 北京金山云网络技术有限公司 视频资源的编码方法和装置，视频资源的解码方法和装置
CN113038139B (zh) * 2021-03-25 2023-05-12 贵州电网有限责任公司 一种应用于机巡图片上传的图像压缩方法
CN113613071B (zh) * 2021-07-30 2023-10-20 上海商汤临港智能科技有限公司 一种图像处理方法、装置、计算机设备和存储介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020025001A1 (en) * 2000-05-11 2002-02-28 Ismaeil Ismaeil R. Method and apparatus for video coding
EP1503595A2 (de) * 2003-07-31 2005-02-02 Seiko Epson Corporation System zur Videokodierung mit Echtzeitadaption der Komplexität

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69031145T2 (de) * 1989-05-12 1998-03-26 Nippon Electric Co Video-Übertragungssystem mit einer adaptiven Bild-zu-Bild-Prädiktionscodierung
US5818969A (en) * 1995-05-12 1998-10-06 Intel Corporation Intelligent start for motion estimation search
JPH10200900A (ja) 1997-01-10 1998-07-31 Nippon Telegr & Teleph Corp <Ntt> 符号化映像の高画質メディア同期再生方法及び装置
JP3588970B2 (ja) * 1997-04-30 2004-11-17 ソニー株式会社 信号符号化方法、信号符号化装置、信号記録媒体及び信号伝送方法
JPH1118083A (ja) * 1997-06-25 1999-01-22 Sony Corp ディジタル信号符号化方法及び装置、信号記録媒体並びに信号伝送方法
JP3407287B2 (ja) * 1997-12-22 2003-05-19 日本電気株式会社 符号化復号システム
JP3185763B2 (ja) 1998-07-13 2001-07-11 日本電気株式会社 動画像符号化装置
JP3184175B2 (ja) 1999-03-05 2001-07-09 日本電気アイシーマイコンシステム株式会社 復号化装置
JP2001346216A (ja) 2000-06-06 2001-12-14 Toshiba Corp 動画像圧縮方法および情報処理装置
JP2001352471A (ja) * 2000-06-07 2001-12-21 Toshiba Corp ビデオカメラ装置
EP1267464B1 (de) * 2001-06-11 2005-08-24 ABB Schweiz AG Isolator für ein elektrisches Verschienungssystem sowie ein Isolatorsystem mit solchen Isolatoren
JP2003061097A (ja) 2001-08-09 2003-02-28 Sony Corp 画像符号化装置および方法、記録媒体、並びにプログラム
JP4151374B2 (ja) 2002-03-29 2008-09-17 セイコーエプソン株式会社 動画像符号化装置および動画像符号化方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020025001A1 (en) * 2000-05-11 2002-02-28 Ismaeil Ismaeil R. Method and apparatus for video coding
EP1503595A2 (de) * 2003-07-31 2005-02-02 Seiko Epson Corporation System zur Videokodierung mit Echtzeitadaption der Komplexität

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
AHMAD I ET AL: "Video compression with parallel processing", PARALLEL COMPUTING, ELSEVIER PUBLISHERS, AMSTERDAM, NL, vol. 28, no. 7-8, 1 August 2002 (2002-08-01), pages 1039-1078, XP004375033, ISSN: 0167-8191, DOI: 10.1016/S0167-8191(02)00100-X *
RICHARDSON I E G: "Video codec design, PASSAGE", VIDEO CODEC DESIGN DEVELOPING IMAGE AND VIDEO COMPRESSION SYSTEMS, XX, XX, 1 January 2002 (2002-01-01), pages 126-133, XP002372853, *
See also references of WO2005025226A1 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010003674A1 (de) 2008-07-09 2010-01-14 Interroll Holding Ag Rollenbahn mit profilschiene
CN101394554B (zh) * 2008-09-28 2010-06-09 湖北科创高新网络视频股份有限公司 一种自适应跳帧方法和装置
EP3258690A1 (de) * 2016-06-15 2017-12-20 Fujitsu Limited Bildcodierungsvorrichtung, bildcodierungsverfahren und auf einem speichermedium gespeichertes bildcodierungsprogramm

Also Published As

Publication number Publication date
TW200515820A (en) 2005-05-01
WO2005025226A1 (ja) 2005-03-17
EP1662794A4 (de) 2012-07-25
CN1860792A (zh) 2006-11-08
JP2005080123A (ja) 2005-03-24
KR20060131725A (ko) 2006-12-20
CN1860792B (zh) 2010-05-12
US8665966B2 (en) 2014-03-04
TWI249958B (en) 2006-02-21
US20070014355A1 (en) 2007-01-18
KR101121613B1 (ko) 2012-04-16
JP3802521B2 (ja) 2006-07-26

Similar Documents

Publication Publication Date Title
EP1662794A1 (de) Video-codierungs-einrichtung, video-codierungs-steuerverfahren und video-codierungs-steuerprogramm
JP4519082B2 (ja) 情報処理方法、動画サムネイル表示方法、復号化装置、および情報処理装置
US20060114995A1 (en) Method and system for high speed video encoding using parallel encoders
JP2000353099A (ja) アクティブ・パイプラインにおける流れ制御方法
US9100653B2 (en) Memory transfer controller and method of transfer control of video line data and macroblock data
JP2658832B2 (ja) 動画像復号制御装置
US7693008B2 (en) Video reproduction apparatus, video reproduction method, and video reproduction process program
EP2219382A1 (de) Bildkodierer, videokamera, integrierte schaltung und bildkodierungsverfahren
KR20030015234A (ko) 차단 태스크로부터 예산을 회수하기 위한 시스템 및 방법
WO2010134238A1 (ja) 映像記録装置
US7751687B2 (en) Data processing apparatus, data processing method, data processing system, program, and storage medium
KR100726695B1 (ko) 디지털 신호 처리 장치 및 방법과 제공 매체
JP2009100206A (ja) 画像符号化データ復号化装置
JP4591549B2 (ja) 再生処理装置、および再生処理方法、並びにプログラム
US6898242B2 (en) Moving picture high-speed coder and moving picture high-speed coding method
JP2007150569A (ja) 画像復号装置、および画像復号方法
EP2487910B1 (de) Bildkodiervorrichtung und bildkodierverfahren
EP1911285A2 (de) Verfahren zur übertragung eines vorkodierten videoinhalts
JP4449694B2 (ja) 動画像予測符号化装置
WO2016036285A1 (en) Video stream encoding using a central processing unit and a graphical processing unit
JP2001320653A (ja) 画像復号装置及び画像復号方法
Blanch et al. Runtime Scheduling for Video Decoding on Heterogeneous Architectures.
JP2006246384A (ja) デコードプログラム、デコード方法およびデコーダ

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20060301

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE ES FR GB IT

DAX Request for extension of the european patent (deleted)
RBV Designated contracting states (corrected)

Designated state(s): DE ES FR GB IT

A4 Supplementary search report drawn up and despatched

Effective date: 20120627

RIC1 Information provided on ipc code assigned before grant

Ipc: H04N 7/26 20060101ALI20120621BHEP

Ipc: H04N 7/24 20110101AFI20120621BHEP

Ipc: H03M 7/30 20060101ALI20120621BHEP

17Q First examination report despatched

Effective date: 20120914

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20160401