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DE69019438D1 - MOS-Typ-Halbleiterspeicheranordnung. - Google Patents

MOS-Typ-Halbleiterspeicheranordnung.

Info

Publication number
DE69019438D1
DE69019438D1 DE69019438T DE69019438T DE69019438D1 DE 69019438 D1 DE69019438 D1 DE 69019438D1 DE 69019438 T DE69019438 T DE 69019438T DE 69019438 T DE69019438 T DE 69019438T DE 69019438 D1 DE69019438 D1 DE 69019438D1
Authority
DE
Germany
Prior art keywords
memory device
type semiconductor
semiconductor memory
mos type
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69019438T
Other languages
English (en)
Other versions
DE69019438T2 (de
Inventor
Yoshinori Matsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69019438D1 publication Critical patent/DE69019438D1/de
Publication of DE69019438T2 publication Critical patent/DE69019438T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Memories (AREA)
DE69019438T 1989-08-30 1990-08-30 MOS-Typ-Halbleiterspeicheranordnung. Expired - Fee Related DE69019438T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1226080A JP2737293B2 (ja) 1989-08-30 1989-08-30 Mos型半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69019438D1 true DE69019438D1 (de) 1995-06-22
DE69019438T2 DE69019438T2 (de) 1996-01-04

Family

ID=16839509

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69019438T Expired - Fee Related DE69019438T2 (de) 1989-08-30 1990-08-30 MOS-Typ-Halbleiterspeicheranordnung.

Country Status (4)

Country Link
US (1) US5113374A (de)
EP (1) EP0415408B1 (de)
JP (1) JP2737293B2 (de)
DE (1) DE69019438T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04225182A (ja) * 1990-12-26 1992-08-14 Toshiba Corp 半導体記憶装置
JPH056675A (ja) * 1991-06-27 1993-01-14 Nec Corp スタテイツク型半導体メモリ装置
JP2870320B2 (ja) * 1992-09-29 1999-03-17 日本電気株式会社 半導体メモリ回路
JP2842181B2 (ja) * 1993-11-04 1998-12-24 日本電気株式会社 半導体メモリ装置
JP3337564B2 (ja) * 1994-09-16 2002-10-21 松下電器産業株式会社 半導体記憶装置
US5491663A (en) * 1994-11-30 1996-02-13 Sgs-Thomson Microelectronics, Inc. Pre-charged slave latch with parallel previous state memory
JP3068426B2 (ja) * 1994-12-21 2000-07-24 日本電気株式会社 半導体記憶装置
JP3631277B2 (ja) * 1995-01-27 2005-03-23 株式会社日立製作所 メモリモジュール
DE19823956A1 (de) * 1998-05-28 1999-12-02 Siemens Ag Anordnung zur Übersprechdämpfung in Wortleitungen von DRAM-Schaltungen
JP2000243089A (ja) * 1999-02-19 2000-09-08 Fujitsu Ltd デコーダ回路及びデコード方法
JP2011040161A (ja) * 2000-03-24 2011-02-24 Renesas Electronics Corp 半導体記憶装置
WO2004077444A1 (ja) 2003-02-27 2004-09-10 Fujitsu Limited 半導体記憶装置及びそのリフレッシュ方法
JP2005174426A (ja) * 2003-12-09 2005-06-30 Micron Technology Inc 選択可能メモリワード線の不活性化
KR100845774B1 (ko) * 2006-10-13 2008-07-14 주식회사 하이닉스반도체 반도체 메모리 장치 및 이를 이용한 전압 제어 방법
US20090307891A1 (en) * 2008-06-17 2009-12-17 Ge-Hitachi Nuclear Energy Americas Llc Method and apparatus for remotely inspecting and/or treating welds, pipes, vessels and/or other components used in reactor coolant systems or other process applications

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6027115B2 (ja) * 1977-10-19 1985-06-27 株式会社日立製作所 Ram半導体集積回路
JPS56143587A (en) * 1980-03-26 1981-11-09 Fujitsu Ltd Static type memory circuit
US4539661A (en) * 1982-06-30 1985-09-03 Fujitsu Limited Static-type semiconductor memory device
JPS6113497A (ja) * 1984-06-29 1986-01-21 Fujitsu Ltd 半導体記憶装置
JPS61194695A (ja) * 1985-02-22 1986-08-29 Nippon Telegr & Teleph Corp <Ntt> ワ−ド線クランプ回路
JPS6212996A (ja) * 1985-07-10 1987-01-21 Mitsubishi Electric Corp 半導体記憶装置
US4691302A (en) * 1985-09-04 1987-09-01 Siemens Aktiengesellschaft Circuit arrangement comprising a matrix-shaped memory arrangement for variably adjustable delay of digital signals
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置

Also Published As

Publication number Publication date
DE69019438T2 (de) 1996-01-04
EP0415408A3 (en) 1993-05-05
US5113374A (en) 1992-05-12
EP0415408A2 (de) 1991-03-06
EP0415408B1 (de) 1995-05-17
JP2737293B2 (ja) 1998-04-08
JPH0388195A (ja) 1991-04-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee