[go: up one dir, main page]

DE60118339D1 - Vorspannungsabschaltung zur verbrauchsminderung in pll - Google Patents

Vorspannungsabschaltung zur verbrauchsminderung in pll

Info

Publication number
DE60118339D1
DE60118339D1 DE60118339T DE60118339T DE60118339D1 DE 60118339 D1 DE60118339 D1 DE 60118339D1 DE 60118339 T DE60118339 T DE 60118339T DE 60118339 T DE60118339 T DE 60118339T DE 60118339 D1 DE60118339 D1 DE 60118339D1
Authority
DE
Germany
Prior art keywords
phase
locked loop
signal edge
switch
bias current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60118339T
Other languages
English (en)
Inventor
Klemmer Nikolaus
L White
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ericsson Inc
Original Assignee
Ericsson Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Inc filed Critical Ericsson Inc
Application granted granted Critical
Publication of DE60118339D1 publication Critical patent/DE60118339D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895—Details of the current generators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. Transmission Power Control [TPC] or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0261—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
    • H04W52/0274—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level by switching on or off the equipment or parts thereof
    • H04W52/028—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level by switching on or off the equipment or parts thereof switching on or off only a part of the equipment circuit blocks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Transceivers (AREA)
  • Superheterodyne Receivers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Dc-Dc Converters (AREA)
  • Electronic Switches (AREA)
DE60118339T 2000-01-11 2001-01-02 Vorspannungsabschaltung zur verbrauchsminderung in pll Expired - Lifetime DE60118339D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/481,461 US6265947B1 (en) 2000-01-11 2000-01-11 Power conserving phase-locked loop and method
PCT/US2001/000064 WO2001052418A1 (en) 2000-01-11 2001-01-02 Bias disconnection for power saving in pll

Publications (1)

Publication Number Publication Date
DE60118339D1 true DE60118339D1 (de) 2006-05-18

Family

ID=23912030

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60118339T Expired - Lifetime DE60118339D1 (de) 2000-01-11 2001-01-02 Vorspannungsabschaltung zur verbrauchsminderung in pll

Country Status (7)

Country Link
US (1) US6265947B1 (de)
EP (1) EP1250760B1 (de)
JP (1) JP4607410B2 (de)
AT (1) ATE322102T1 (de)
AU (1) AU2001227546A1 (de)
DE (1) DE60118339D1 (de)
WO (1) WO2001052418A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6473478B1 (en) * 1998-05-14 2002-10-29 Texas Instruments Incorporated Digital phase-locked loop with phase optimal frequency estimation
JP4557342B2 (ja) * 2000-01-13 2010-10-06 富士通セミコンダクター株式会社 半導体装置
JP2002290233A (ja) * 2001-03-27 2002-10-04 Fujitsu Ltd Ｐｌｌ回路のモード切替方法及びｐｌｌ回路のモード制御回路
JP2003037485A (ja) * 2001-07-24 2003-02-07 Mitsubishi Electric Corp クロック発生回路
US7151915B2 (en) * 2001-09-26 2006-12-19 Nokia Corporation Dual mode voltage controlled oscillator having controllable bias modes and power consumption
US6429734B1 (en) 2001-12-19 2002-08-06 Neoaxiom Corporation Differential active loop filter for phase locked loop circuits
JP4288178B2 (ja) * 2002-02-01 2009-07-01 エヌエックスピー ビー ヴィ 低減されたクロックジッタを備える位相ロックループ
US6988218B2 (en) * 2002-02-11 2006-01-17 Micron Technology, Inc. System and method for power saving delay locked loop control by selectively locking delay interval
US20030189463A1 (en) * 2002-04-09 2003-10-09 Walker Brett C. Current saving technique for charge pump based phase locked loops
FI113817B (fi) * 2002-05-27 2004-06-15 Nokia Corp Parannettu piirijärjestely vaihelukoksi, vaihelukon toteuttava integroitupiiri, vaihelukkoa hyödyntävä menetelmä ja solukkoverkon päätelaite
US7170813B2 (en) * 2004-12-16 2007-01-30 Infineon Technologies Ag Memory circuit receivers activated by enable circuit
KR100707230B1 (ko) 2005-04-06 2007-04-13 재단법인서울대학교산학협력재단 Ｃｄｒ 회로 및 ｐｌｌ 회로
JP2007150423A (ja) * 2005-11-24 2007-06-14 Sharp Corp デジタル復調装置、デジタル受信装置、デジタル復調装置の制御方法、デジタル復調装置の制御プログラム、及び、この制御プログラムを記録した記録媒体
US9423814B2 (en) * 2010-03-16 2016-08-23 Macronix International Co., Ltd. Apparatus of supplying power while maintaining its output power signal and method therefor
JP5618936B2 (ja) * 2011-07-27 2014-11-05 三菱電機株式会社 位相周波数比較回路
JP5751101B2 (ja) * 2011-09-05 2015-07-22 富士通セミコンダクター株式会社 Ｐｌｌ回路
US9291443B2 (en) * 2013-03-07 2016-03-22 Rosemount Tank Radar Ab FMCW radar level gauge with lock state control
JP6483099B2 (ja) 2013-11-08 2019-03-13 インテル コーポレイション チャージポンプの電力を低減する装置
US9893875B2 (en) 2016-05-23 2018-02-13 Qualcomm Incorporated Phase continuity technique for frequency synthesis
EP3279619B1 (de) * 2016-08-01 2020-02-12 VEGA Grieshaber KG Radarfüllstandmessgerät
KR102128044B1 (ko) * 2018-12-26 2020-06-29 포항공과대학교 산학협력단 폐루프 클럭 전송을 이용한 차량용 고속 통신 시스템

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5315270A (en) * 1992-08-28 1994-05-24 At&T Bell Laboratories Phase-locked loop system with compensation for data-transition-dependent variations in loop gain
JPH06141253A (ja) 1992-10-23 1994-05-20 Toshiba Corp 映像検波回路
US5351015A (en) 1993-02-03 1994-09-27 Silicon Systems, Inc. Time based data separator zone change sequence
US5362990A (en) * 1993-06-02 1994-11-08 Motorola, Inc. Charge pump with a programmable pump current and system
US5394444A (en) * 1993-07-12 1995-02-28 Motorola, Inc. Lock detect circuit for detecting a lock condition in a phase locked loop and method therefor
JPH0730416A (ja) * 1993-07-13 1995-01-31 Mitsubishi Electric Corp Ｐｌｌ回路
US5359297A (en) 1993-10-28 1994-10-25 Motorola, Inc. VCO power-up circuit for PLL and method thereof
JP2845185B2 (ja) * 1995-11-29 1999-01-13 日本電気株式会社 Ｐｌｌ回路
JP3338748B2 (ja) * 1996-01-30 2002-10-28 日本電気株式会社 Ｐｌｌ周波数シンセサイザ
US5699020A (en) * 1996-04-11 1997-12-16 Altera Corporation Phase latched differential charge pump circuit and method
JP2914297B2 (ja) 1996-05-29 1999-06-28 日本電気株式会社 Ｐｌｌ周波数シンセサイザ
JPH10190451A (ja) * 1996-12-26 1998-07-21 Sony Corp チャージポンプ回路
JP3367381B2 (ja) 1997-05-21 2003-01-14 ヤマハ株式会社 位相ロックループ回路
JP3119205B2 (ja) * 1997-07-18 2000-12-18 日本電気株式会社 Ｐｌｌ回路
JPH11234126A (ja) * 1998-02-17 1999-08-27 Toshiba Corp 周波数シンセサイザ及びフェーズロックドループ装置
JP4075164B2 (ja) * 1998-11-16 2008-04-16 松下電器産業株式会社 チャージポンプ

Also Published As

Publication number Publication date
US6265947B1 (en) 2001-07-24
AU2001227546A1 (en) 2001-07-24
WO2001052418A1 (en) 2001-07-19
JP2003529246A (ja) 2003-09-30
ATE322102T1 (de) 2006-04-15
EP1250760A1 (de) 2002-10-23
JP4607410B2 (ja) 2011-01-05
EP1250760B1 (de) 2006-03-29

Similar Documents

Publication Publication Date Title
DE60118339D1 (de) Vorspannungsabschaltung zur verbrauchsminderung in pll
US6002273A (en) Linear low noise phase-frequency detector
AU2001256482A1 (en) Electronic pulse generator and oscillator
GB0127537D0 (en) A communication semiconductor integrated circuit device and a wireless communication system
AU2003287086A8 (en) Low noise switching voltage regulator
TW200503394A (en) DC/DC converter
US20030122531A1 (en) Switched mode power supply device adapted for low current drains, and cellular phone equipped with such a device
WO2008036542A1 (en) Oscillator with power-saving bias circuit
DE60100896D1 (de) Phasenregelschleife mit gebrochenem teilverhältnis
ATE211325T1 (de) Modifizierter phasenregelkreis dritter ordnung
TW200608710A (en) Charge pump circuit having switches
DE60102238D1 (de) Phasenverriegelungsschaltung
US20030189463A1 (en) Current saving technique for charge pump based phase locked loops
JPH05191375A (ja) スペクトラム拡散方式受信装置
TW200627803A (en) Charge pump circuits
WO2001065708A3 (en) Architecture for cordless telephones
ATE396542T1 (de) Schaltungen zur funkkommunikation
TW200629734A (en) Frequency synthesizer, and the charging pump circuit using the same
Lai et al. Cross-coupled Divide-by-4 Differential Injection-Locked Frequency Divider with LC tank
DE60112499D1 (de) Synthetisierer mit gebrochenem Teilverhältnis und Kompensation des Phasenjitters
JP2001127599A (ja) 基準クロック生成回路および携帯機
JP2000341118A (ja) 周波数シンセサイザ
KR20020090752A (ko) 앰프스 모드 폰의 수신대기 시 전류소모 감소회로
JP2003243931A (ja) 発振器
Yang et al. A New Dynamic D-Flip-flop for Charge-Sharing and Glitch Reduction

Legal Events

Date Code Title Description
8332 No legal effect for de