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DE3878320D1 - Statischer ram-speicher. - Google Patents

Statischer ram-speicher.

Info

Publication number
DE3878320D1
DE3878320D1 DE8888305509T DE3878320T DE3878320D1 DE 3878320 D1 DE3878320 D1 DE 3878320D1 DE 8888305509 T DE8888305509 T DE 8888305509T DE 3878320 T DE3878320 T DE 3878320T DE 3878320 D1 DE3878320 D1 DE 3878320D1
Authority
DE
Germany
Prior art keywords
static ram
static
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8888305509T
Other languages
English (en)
Other versions
DE3878320T2 (de
Inventor
Hiroaki Eva-Green-Kats Okuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Application granted granted Critical
Publication of DE3878320D1 publication Critical patent/DE3878320D1/de
Publication of DE3878320T2 publication Critical patent/DE3878320T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/416—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
DE8888305509T 1987-06-22 1988-06-16 Statischer ram-speicher. Expired - Lifetime DE3878320T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62154745A JPH0812756B2 (ja) 1987-06-22 1987-06-22 スタチックｒａｍ回路

Publications (2)

Publication Number Publication Date
DE3878320D1 true DE3878320D1 (de) 1993-03-25
DE3878320T2 DE3878320T2 (de) 1993-05-27

Family

ID=15590983

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888305509T Expired - Lifetime DE3878320T2 (de) 1987-06-22 1988-06-16 Statischer ram-speicher.

Country Status (5)

Country Link
US (1) US4947379A (de)
EP (1) EP0296760B1 (de)
JP (1) JPH0812756B2 (de)
KR (1) KR910009439B1 (de)
DE (1) DE3878320T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2527050B2 (ja) * 1989-10-27 1996-08-21 日本電気株式会社 半導体メモリ用センスアンプ回路
JP2925600B2 (ja) * 1989-11-07 1999-07-28 富士通株式会社 半導体記憶装置
US5327394A (en) * 1992-02-04 1994-07-05 Micron Technology, Inc. Timing and control circuit for a static RAM responsive to an address transition pulse
JPH05325569A (ja) * 1992-05-27 1993-12-10 Toshiba Corp 半導体記憶装置
US5349566A (en) * 1993-05-19 1994-09-20 Micron Semiconductor, Inc. Memory device with pulse circuit for timing data output, and method for outputting data
KR0141933B1 (ko) * 1994-10-20 1998-07-15 문정환 저전력의 스테이틱 랜덤 억세스 메모리장치
KR0136668B1 (ko) * 1995-02-16 1998-05-15 문정환 메모리의 펄스 발생회로
JPH08293198A (ja) * 1995-04-21 1996-11-05 Nec Ic Microcomput Syst Ltd 半導体記憶装置
JPH09282889A (ja) * 1996-04-09 1997-10-31 Toshiba Corp 半導体装置
KR100218307B1 (ko) * 1996-07-01 1999-09-01 구본준 반도체 메모리소자의 칼럼디코딩회로
KR100253282B1 (ko) * 1997-04-01 2000-05-01 김영환 메모리소자의소모전력자동감소회로
SE514107C2 (sv) * 1999-05-05 2001-01-08 Valmet Karlstad Ab Arrangemang för positionering av en värmare vid en vals och en pressanordning med ett sådant arrangemang
US7000065B2 (en) * 2002-01-02 2006-02-14 Intel Corporation Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
KR100439839B1 (ko) * 2002-05-31 2004-07-12 주식회사 한일농원 닭고기 육포의 제조방법
US20040128416A1 (en) * 2002-12-11 2004-07-01 Tsvika Kurts Apparatus and method for address bus power control
US7152167B2 (en) * 2002-12-11 2006-12-19 Intel Corporation Apparatus and method for data bus power control
KR100642759B1 (ko) * 2005-01-28 2006-11-10 삼성전자주식회사 선택적 리프레쉬가 가능한 반도체 메모리 디바이스
KR100761848B1 (ko) * 2006-06-09 2007-09-28 삼성전자주식회사 반도체 장치에서의 데이터 출력장치 및 방법
US8279659B2 (en) * 2009-11-12 2012-10-02 Qualcomm Incorporated System and method of operating a memory device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169383A (ja) * 1982-03-30 1983-10-05 Fujitsu Ltd 半導体記憶装置
JPS5954093A (ja) * 1982-09-21 1984-03-28 Toshiba Corp 半導体記憶装置
JPS5963094A (ja) * 1982-10-04 1984-04-10 Fujitsu Ltd メモリ装置
JPS60154709A (ja) * 1984-01-25 1985-08-14 Toshiba Corp クロツク信号発生回路
JPS60254485A (ja) * 1984-05-31 1985-12-16 Nec Corp スタテイツク型半導体記憶装置
US4712194A (en) * 1984-06-08 1987-12-08 Matsushita Electric Industrial Co., Ltd. Static random access memory
JPS6124091A (ja) * 1984-07-12 1986-02-01 Nec Corp メモリ回路
US4728820A (en) * 1986-08-28 1988-03-01 Harris Corporation Logic state transition detection circuit for CMOS devices

Also Published As

Publication number Publication date
EP0296760A2 (de) 1988-12-28
EP0296760B1 (de) 1993-02-10
JPH0812756B2 (ja) 1996-02-07
KR910009439B1 (ko) 1991-11-16
KR890001091A (ko) 1989-03-18
EP0296760A3 (en) 1990-11-28
DE3878320T2 (de) 1993-05-27
JPS63318000A (ja) 1988-12-26
US4947379A (en) 1990-08-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., KADOMA,