DE3851099D1 - Erweiterbarer Schreib- und Lesespeicher mit Vielfach-Ein-Ausgabe-Einheit. - Google Patents

Erweiterbarer Schreib- und Lesespeicher mit Vielfach-Ein-Ausgabe-Einheit.

Info

Publication number: DE3851099D1
Authority: DE; Germany
Prior art keywords: expandable; read; output unit; multiple input; write memory
Prior art date: 1987-07-02
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE3851099T

Other languages

English (en)

Other versions

DE3851099T2 (de

Inventor

Daniel Chang

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

National Semiconductor Corp

Original Assignee

National Semiconductor Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1987-07-02

Filing date

1988-06-30

Publication date

1994-09-22

1988-06-30 Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp

1994-09-22 Publication of DE3851099D1 publication Critical patent/DE3851099D1/de

1995-03-23 Application granted granted Critical

1995-03-23 Publication of DE3851099T2 publication Critical patent/DE3851099T2/de

2008-07-01 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Static Random-Access Memory (AREA)

DE3851099T 1987-07-02 1988-06-30 Erweiterbarer Schreib- und Lesespeicher mit Vielfach-Ein-Ausgabe-Einheit. Expired - Fee Related DE3851099T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US07/069,155 US4817051A (en)	1987-07-02	1987-07-02	Expandable multi-port random access memory

Publications (2)

Publication Number	Publication Date
DE3851099D1 true DE3851099D1 (de)	1994-09-22
DE3851099T2 DE3851099T2 (de)	1995-03-23

Family

ID=22087110

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE3851099T Expired - Fee Related DE3851099T2 (de)	1987-07-02	1988-06-30	Erweiterbarer Schreib- und Lesespeicher mit Vielfach-Ein-Ausgabe-Einheit.

Country Status (5)

Country	Link
US (1)	US4817051A (de)
EP (1)	EP0297571B1 (de)
JP (1)	JPH0198184A (de)
CA (1)	CA1301322C (de)
DE (1)	DE3851099T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5003475A (en) *	1988-11-25	1991-03-26	Picker International, Inc.	Medical imaging system including means to increase data transfer speeds by simultaneously transferring data from latches to registers and from registers to latches
US5091881A (en) *	1989-06-13	1992-02-25	Atmel Corporation	Multiple port memory including merged bipolar transistors
US5235543A (en) *	1989-12-29	1993-08-10	Intel Corporation	Dual port static memory with one cycle read-modify-write
US5142540A (en) *	1990-03-13	1992-08-25	Glasser Lance A	Multipart memory apparatus with error detection
US5189640A (en) *	1990-03-27	1993-02-23	National Semiconductor Corporation	High speed, multi-port memory cell utilizable in a BICMOS memory array
JPH0485788A (ja) *	1990-07-27	1992-03-18	Toshiba Corp	多ポートキャッシュメモリ
US5926412A (en) *	1992-02-09	1999-07-20	Raytheon Company	Ferroelectric memory structure
US5343428A (en) *	1992-10-05	1994-08-30	Motorola Inc.	Memory having a latching BICMOS sense amplifier
US5422998A (en) *	1993-11-15	1995-06-06	Margolin; Jed	Video memory with flash fill
EP1050885B1 (de)	1999-05-03	2005-02-02	STMicroelectronics S.A.	Ein Mehrport-Speicher
US6639866B2 (en) *	2000-11-03	2003-10-28	Broadcom Corporation	Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
US6496432B2 (en)	2000-12-08	2002-12-17	International Business Machines Corporation	Method and apparatus for testing a write function of a dual-port static memory cell
US20040091255A1 (en) *	2002-11-11	2004-05-13	Eastman Kodak Company	Camera flash circuit with adjustable flash illumination intensity
US7594089B2 (en) *	2003-08-28	2009-09-22	Mips Technologies, Inc.	Smart memory based synchronization controller for a multi-threaded multiprocessor SoC
US7849297B2 (en) *	2003-08-28	2010-12-07	Mips Technologies, Inc.	Software emulation of directed exceptions in a multithreading processor
US7711931B2 (en) *	2003-08-28	2010-05-04	Mips Technologies, Inc.	Synchronized storage providing multiple synchronization semantics
US9032404B2 (en) *	2003-08-28	2015-05-12	Mips Technologies, Inc.	Preemptive multitasking employing software emulation of directed exceptions in a multithreading processor
US7610473B2 (en) *	2003-08-28	2009-10-27	Mips Technologies, Inc.	Apparatus, method, and instruction for initiation of concurrent instruction streams in a multithreading microprocessor
US20050050305A1 (en) *	2003-08-28	2005-03-03	Kissell Kevin D.	Integrated mechanism for suspension and deallocation of computational threads of execution in a processor
US7870553B2 (en) *	2003-08-28	2011-01-11	Mips Technologies, Inc.	Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts
US7836450B2 (en) *	2003-08-28	2010-11-16	Mips Technologies, Inc.	Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts
US7376954B2 (en) *	2003-08-28	2008-05-20	Mips Technologies, Inc.	Mechanisms for assuring quality of service for programs executing on a multithreaded processor
US7418585B2 (en) *	2003-08-28	2008-08-26	Mips Technologies, Inc.	Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts
US7366032B1 (en) *	2005-11-21	2008-04-29	Advanced Micro Devices, Inc.	Multi-ported register cell with randomly accessible history

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4125877A (en) *	1976-11-26	1978-11-14	Motorola, Inc.	Dual port random access memory storage cell
EP0052669B1 (de) *	1980-11-26	1985-03-27	Ibm Deutschland Gmbh	Mehrfach adressierbarer hochintegrierter Halbleiterspeicher
US4623990A (en) *	1984-10-31	1986-11-18	Advanced Micro Devices, Inc.	Dual-port read/write RAM with single array

1987
- 1987-07-02 US US07/069,155 patent/US4817051A/en not_active Expired - Lifetime
1988
- 1988-06-30 DE DE3851099T patent/DE3851099T2/de not_active Expired - Fee Related
- 1988-06-30 CA CA000570918A patent/CA1301322C/en not_active Expired - Fee Related
- 1988-06-30 EP EP88110443A patent/EP0297571B1/de not_active Expired - Lifetime
- 1988-07-01 JP JP63162783A patent/JPH0198184A/ja active Pending

Also Published As

Publication number	Publication date
EP0297571B1 (de)	1994-08-17
JPH0198184A (ja)	1989-04-17
EP0297571A2 (de)	1989-01-04
EP0297571A3 (de)	1991-03-13
CA1301322C (en)	1992-05-19
DE3851099T2 (de)	1995-03-23
US4817051A (en)	1989-03-28

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Legal Events

Date	Code	Title	Description
1995-09-14	8364	No opposition during term of opposition
1999-08-12	8339	Ceased/non-payment of the annual fee