DE3789826D1 - MOS-Halbleiteranordnung und Herstellungsverfahren. - Google Patents

MOS-Halbleiteranordnung und Herstellungsverfahren.

Info

Publication number: DE3789826D1
Authority: DE; Germany
Prior art keywords: manufacturing; semiconductor device; mos semiconductor; mos; semiconductor
Prior art date: 1986-03-28
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE3789826T

Other languages

English (en)

Other versions

DE3789826T2 (de

Inventor

Koji C O Patent Divisio Shirai

Ken C O Patent Divisi Kawamura

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Toshiba Corp

Original Assignee

Toshiba Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-03-28

Filing date

1987-03-25

Publication date

1994-06-23

1987-03-25 Application filed by Toshiba Corp filed Critical Toshiba Corp

1994-06-23 Application granted granted Critical

1994-06-23 Publication of DE3789826D1 publication Critical patent/DE3789826D1/de

1994-09-22 Publication of DE3789826T2 publication Critical patent/DE3789826T2/de

2007-03-26 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0128—Manufacturing their channels
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0135—Manufacturing their gate conductors
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0144—Manufacturing their gate insulating layers
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0181—Manufacturing their gate insulating layers
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/031—Diffusion at an edge
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/082—Ion implantation FETs/COMs

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Condensed Matter Physics & Semiconductors (AREA)
General Physics & Mathematics (AREA)
Manufacturing & Machinery (AREA)
Computer Hardware Design (AREA)
Microelectronics & Electronic Packaging (AREA)
Power Engineering (AREA)
Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Insulated Gate Type Field-Effect Transistor (AREA)

DE3789826T 1986-03-28 1987-03-25 MOS-Halbleiteranordnung und Herstellungsverfahren. Expired - Lifetime DE3789826T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP61068702A JPH0812918B2 (ja)	1986-03-28	1986-03-28	半導体装置の製造方法

Publications (2)

Publication Number	Publication Date
DE3789826D1 true DE3789826D1 (de)	1994-06-23
DE3789826T2 DE3789826T2 (de)	1994-09-22

Family

ID=13381361

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE3789826T Expired - Lifetime DE3789826T2 (de)	1986-03-28	1987-03-25	MOS-Halbleiteranordnung und Herstellungsverfahren.

Country Status (5)

Country	Link
US (2)	US4878096A (de)
EP (1)	EP0242623B1 (de)
JP (1)	JPH0812918B2 (de)
KR (1)	KR900003831B1 (de)
DE (1)	DE3789826T2 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5374840A (en) *	1989-04-25	1994-12-20	Matsushita Electronics Corporation	Semiconductor device with isolated transistors
US5238860A (en) *	1987-07-10	1993-08-24	Kabushiki Kaisha Toshiba	Semiconductor device having different impurity concentration wells
JPH01125971A (ja) *	1987-11-11	1989-05-18	Seiko Instr & Electron Ltd	Ｃ−ｍｉｓ型半導体装置とその製造方法
JPH01194349A (ja) *	1988-01-29	1989-08-04	Toshiba Corp	半導体装置
US4998156A (en) *	1988-03-25	1991-03-05	General Electric Company	Structure for a complementary-symmetry COMFET pair
US5262846A (en) *	1988-11-14	1993-11-16	Texas Instruments Incorporated	Contact-free floating-gate memory array with silicided buried bitlines and with single-step-defined floating gates
GB8907898D0 (en)	1989-04-07	1989-05-24	Inmos Ltd	Semiconductor devices and fabrication thereof
GB2237445B (en) *	1989-10-04	1994-01-12	Seagate Microelectron Ltd	A semiconductor device fabrication process
US5057446A (en) *	1990-08-06	1991-10-15	Texas Instruments Incorporated	Method of making an EEPROM with improved capacitive coupling between control gate and floating gate
US5273926A (en) *	1991-06-27	1993-12-28	Texas Instruments Incorporated	Method of making flash EEPROM or merged FAMOS cell without alignment sensitivity
JP3226053B2 (ja) *	1992-06-03	2001-11-05	富士電機株式会社	半導体装置の製造方法
US5446300A (en) *	1992-11-04	1995-08-29	North American Philips Corporation	Semiconductor device configuration with multiple HV-LDMOS transistors and a floating well circuit
JPH06314773A (ja) *	1993-03-03	1994-11-08	Nec Corp	半導体装置
JPH08172139A (ja) *	1994-12-19	1996-07-02	Sony Corp	半導体装置製造方法
DE19526183C1 (de) *	1995-07-18	1996-09-12	Siemens Ag	Verfahren zur Herstellung von mindestens zwei Transistoren in einem Halbleiterkörper
KR980006533A (ko) *	1996-06-28	1998-03-30	김주용	반도체 장치 및 그 제조방법
TW506119B (en) *	1998-05-25	2002-10-11	United Microelectronics Corp	Manufacturing method of well
US6069048A (en) *	1998-09-30	2000-05-30	Lsi Logic Corporation	Reduction of silicon defect induced failures as a result of implants in CMOS and other integrated circuits
KR100407683B1 (ko) *	2000-06-27	2003-12-01	주식회사 하이닉스반도체	반도체 소자의 콘택 플러그 형성 방법
JP2003324159A (ja) *	2002-04-26	2003-11-14	Ricoh Co Ltd	半導体装置
JP4437388B2 (ja) *	2003-02-06	2010-03-24	株式会社リコー	半導体装置
US7122876B2 (en) *	2004-08-11	2006-10-17	Taiwan Semiconductor Manufacturing Company, Ltd.	Isolation-region configuration for integrated-circuit transistor
US7544558B2 (en) *	2006-03-13	2009-06-09	Bcd Semiconductor Manufacturing Limited	Method for integrating DMOS into sub-micron CMOS process
RU2497229C2 (ru) *	2011-12-07	2013-10-27	Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования Кабардино-Балкарский государственный университет им. Х.М. Бербекова	Способ изготовления полупроводникового прибора
US8941188B2 (en)	2012-03-26	2015-01-27	Infineon Technologies Austria Ag	Semiconductor arrangement with a superjunction transistor and a further device integrated in a common semiconductor body
US9324762B1 (en) *	2015-03-26	2016-04-26	Himax Imaging Limited	Process of forming a semiconductor device
TWI585960B (zh) *	2015-03-27	2017-06-01	恆景科技股份有限公司	形成半導體元件及影像感測器的製程
US11069777B1 (en) *	2020-06-09	2021-07-20	Monolithic Power Systems, Inc.	Manufacturing method of self-aligned DMOS body pickup

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4214359A (en) *	1978-12-07	1980-07-29	Bell Telephone Laboratories, Incorporated	MOS Devices having buried terminal zones under local oxide regions
US4403395A (en) *	1979-02-15	1983-09-13	Texas Instruments Incorporated	Monolithic integration of logic, control and high voltage interface circuitry
JPS55160443A (en) *	1979-05-22	1980-12-13	Semiconductor Res Found	Manufacture of semiconductor integrated circuit device
US4344081A (en) *	1980-04-14	1982-08-10	Supertex, Inc.	Combined DMOS and a vertical bipolar transistor device and fabrication method therefor
JPS57149775A (en) *	1981-03-11	1982-09-16	Fujitsu Ltd	Manufacture of semiconductor device
JPS59215766A (ja) *	1983-05-24	1984-12-05	Seiko Instr & Electronics Ltd	Ｍｏｓ集積回路装置
BE897139A (nl) *	1983-06-27	1983-12-27	Bell Telephone Mfg Cy Nov	Proces voor het maken van een halfgeleider-inrichting en inrichting hierdoor verkregen
US4609413A (en) *	1983-11-18	1986-09-02	Motorola, Inc.	Method for manufacturing and epitaxially isolated semiconductor utilizing etch and refill technique
JPS60161658A (ja) *	1984-02-01	1985-08-23	Hitachi Micro Comput Eng Ltd	半導体集積回路装置
JPH0618255B2 (ja) *	1984-04-04	1994-03-09	株式会社東芝	半導体装置
US4626882A (en) *	1984-07-18	1986-12-02	International Business Machines Corporation	Twin diode overvoltage protection structure
FR2571178B1 (fr) *	1984-09-28	1986-11-21	Thomson Csf	Structure de circuit integre comportant des transistors cmos a tenue en tension elevee, et son procede de fabrication
IT1213234B (it) *	1984-10-25	1989-12-14	Sgs Thomson Microelectronics	Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos.
JPS62130552A (ja) *	1985-12-02	1987-06-12	Mitsubishi Electric Corp	半導体集積回路装置
JPH05215277A (ja) *	1991-03-28	1993-08-24	Nippon Steel Corp	形状記憶合金製パイプ用継手とその製造方法
JPH05267580A (ja) *	1992-03-24	1993-10-15	Fuji Electric Co Ltd	半導体装置

1986
- 1986-03-28 JP JP61068702A patent/JPH0812918B2/ja not_active Expired - Lifetime
1987
- 1987-03-18 US US07/027,406 patent/US4878096A/en not_active Expired - Lifetime
- 1987-03-25 DE DE3789826T patent/DE3789826T2/de not_active Expired - Lifetime
- 1987-03-25 EP EP87104400A patent/EP0242623B1/de not_active Expired - Lifetime
- 1987-03-28 KR KR1019870002911A patent/KR900003831B1/ko not_active IP Right Cessation
1989
- 1989-09-26 US US07/413,006 patent/US5108944A/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
KR900003831B1 (ko)	1990-06-02
EP0242623A2 (de)	1987-10-28
US5108944A (en)	1992-04-28
JPH0812918B2 (ja)	1996-02-07
KR870009477A (ko)	1987-10-27
EP0242623B1 (de)	1994-05-18
EP0242623A3 (en)	1988-05-04
US4878096A (en)	1989-10-31
DE3789826T2 (de)	1994-09-22
JPS62226667A (ja)	1987-10-05

Publication	Publication Date	Title
DE3789826D1 (de)	1994-06-23	MOS-Halbleiteranordnung und Herstellungsverfahren.
KR870011686A (ko)	1987-12-26	반도체장치 및 그 제조방법
DE3786031D1 (de)	1993-07-08	Duennschicht-halbleiterbauelement und sein herstellungsverfahren.
KR880701023A (ko)	1988-04-13	반도체 장치 제조 방법
KR890700922A (ko)	1989-04-28	반도체 장치와 그 제조방법
KR880013254A (ko)	1988-11-30	반도체장치 및 그 제조방법
KR880004552A (ko)	1988-06-04	반도체장치 제조방법
KR910008793A (ko)	1991-05-31	반도체장치 및 그 제조방법
DE3687795D1 (de)	1993-03-25	Halbleiterbehandlungsvorrichtung.
DE3782367D1 (de)	1992-12-03	Mos-halbleiterschaltung.
KR860001495A (ko)	1986-02-26	반도체장치 및 그 제조방법
DE3678816D1 (de)	1991-05-23	Anzeigevorrichtung und herstellungsverfahren.
DE68928448D1 (de)	1998-01-02	Halbleitervorrichtung und Herstellungsverfahren
KR860006844A (ko)	1986-09-15	반도체장치 및 그 제조방법
KR880701457A (ko)	1988-07-27	반도체 장치 제조 방법
KR890004403A (ko)	1989-04-21	반도체 장치 및 제조방법
DE3788978D1 (de)	1994-03-17	Halbleiterbildsensor und Herstellungsverfahren dafür.
DE3686310D1 (de)	1992-09-10	Dielektrisch isoliertes integriertes halbleiterbauelement und herstellungsverfahren.
KR890004398A (ko)	1989-04-21	반도체장치 및 그의 제조방법
KR870008394A (ko)	1987-09-26	반도체장치 및 그 제조방법
KR880701968A (ko)	1988-11-07	반도체장치 및 그 제조방법
KR880002275A (ko)	1988-04-30	종형 mos 반도체장치
KR900015301A (ko)	1990-10-26	반도체장치 및 그 제조방법
KR900015310A (ko)	1990-10-26	반도체장치와 그 제조방법
EP0262370A3 (en)	1990-03-14	Semiconductor device comprising a mos transistor, and method of making the same

Legal Events

Date	Code	Title	Description
1995-06-14	8364	No opposition during term of opposition
1999-04-29	8320	Willingness to grant licences declared (paragraph 23)