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DE3770841D1 - Pufferschaltung fuer integrierte schaltung. - Google Patents

Pufferschaltung fuer integrierte schaltung.

Info

Publication number
DE3770841D1
DE3770841D1 DE8787300143T DE3770841T DE3770841D1 DE 3770841 D1 DE3770841 D1 DE 3770841D1 DE 8787300143 T DE8787300143 T DE 8787300143T DE 3770841 T DE3770841 T DE 3770841T DE 3770841 D1 DE3770841 D1 DE 3770841D1
Authority
DE
Germany
Prior art keywords
circuit
buffer
integrated circuit
integrated
buffer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8787300143T
Other languages
English (en)
Inventor
Haruki Toda
Naokazu Miyawaki
Hiroyuki Koinuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3770841D1 publication Critical patent/DE3770841D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H03K19/09443Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00315Modifications for increasing the reliability for protection in field-effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/02Shaping pulses by amplifying
    • H03K5/023Shaping pulses by amplifying using field effect transistors

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
DE8787300143T 1986-01-08 1987-01-08 Pufferschaltung fuer integrierte schaltung. Expired - Lifetime DE3770841D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61001609A JPS62159917A (ja) 1986-01-08 1986-01-08 集積回路におけるインバ−タ回路

Publications (1)

Publication Number Publication Date
DE3770841D1 true DE3770841D1 (de) 1991-07-25

Family

ID=11506241

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787300143T Expired - Lifetime DE3770841D1 (de) 1986-01-08 1987-01-08 Pufferschaltung fuer integrierte schaltung.

Country Status (5)

Country Link
US (1) US4754170A (de)
EP (1) EP0237139B1 (de)
JP (1) JPS62159917A (de)
KR (1) KR900008439B1 (de)
DE (1) DE3770841D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63234623A (ja) * 1987-03-23 1988-09-29 Toshiba Corp 半導体集積回路
US4791521A (en) * 1987-04-07 1988-12-13 Western Digital Corporation Method and apparatus for reducing transient noise by premagnetization of parasitic inductance
JPH01113993A (ja) * 1987-10-28 1989-05-02 Toshiba Corp 半導体集積回路
KR910004735B1 (ko) * 1988-07-18 1991-07-10 삼성전자 주식회사 데이타 출력용 버퍼회로
US4982108A (en) * 1988-08-02 1991-01-01 Motorola, Inc. Low current CMOS translator circuit
US5023472A (en) * 1988-09-09 1991-06-11 Texas Instruments Incorporated Capacitor-driven signal transmission circuit
US5198699A (en) * 1988-09-09 1993-03-30 Texas Instruments Incorporated Capacitor-driven signal transmission circuit
JPH0666674B2 (ja) * 1988-11-21 1994-08-24 株式会社東芝 半導体集積回路の出力回路
US4982120A (en) * 1989-07-03 1991-01-01 Dell Corporate Services Corporation Power supply decoupling mechanism for integrated circuits
US5041741A (en) * 1990-09-14 1991-08-20 Ncr Corporation Transient immune input buffer
JPH04146650A (ja) * 1990-10-08 1992-05-20 Mitsubishi Electric Corp 半導体集積回路装置
JP2617239B2 (ja) * 1990-11-07 1997-06-04 シャープ株式会社 ディジタル集積回路
JPH04317219A (ja) * 1991-04-17 1992-11-09 Mitsubishi Electric Corp 出力回路
EP0596637A1 (de) * 1992-11-02 1994-05-11 STMicroelectronics, Inc. Eingangspufferschaltung
US5440258A (en) * 1994-02-08 1995-08-08 International Business Machines Corporation Off-chip driver with voltage regulated predrive
US6057702A (en) * 1995-08-24 2000-05-02 Nec Corporation Bus driver
US5703501A (en) * 1995-11-27 1997-12-30 Advanced Micro Devices, Inc. Apparatus and method for precharging a bus to an intermediate level
JPH10326131A (ja) * 1997-05-26 1998-12-08 Nec Corp バスドライバ
US6137316A (en) * 1998-06-09 2000-10-24 Siemens Aktiengesellschaft Integrated circuit with improved off chip drivers
JP2997241B1 (ja) * 1998-07-17 2000-01-11 株式会社半導体理工学研究センター 低スイッチング雑音論理回路
JP2010103837A (ja) * 2008-10-24 2010-05-06 Nec Electronics Corp 半導体装置
US10879899B2 (en) * 2017-08-15 2020-12-29 Realtek Semiconductor Corp. Clock buffer and method thereof

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3914702A (en) * 1973-06-01 1975-10-21 Rca Corp Complementary field-effect transistor amplifier
US4023122A (en) * 1975-01-28 1977-05-10 Nippon Electric Company, Ltd. Signal generating circuit
JPS5268304A (en) * 1975-12-05 1977-06-07 Fujitsu Ltd Transistor circuit
US4274014A (en) * 1978-12-01 1981-06-16 Rca Corporation Switched current source for current limiting complementary symmetry inverter
US4275313A (en) * 1979-04-09 1981-06-23 Bell Telephone Laboratories, Incorporated Current limiting output circuit with output feedback
US4398106A (en) * 1980-12-19 1983-08-09 International Business Machines Corporation On-chip Delta-I noise clamping circuit
JPS57106228A (en) * 1980-12-24 1982-07-02 Fujitsu Ltd Semiconductor circuit
US4394588A (en) * 1980-12-30 1983-07-19 International Business Machines Corporation Controllable di/dt push/pull driver
DE3168838D1 (en) * 1981-01-30 1985-03-28 Ibm Deutschland Monolithic integrated push-pull driver circuit
JPS583328A (ja) * 1981-06-29 1983-01-10 Fujitsu Ltd 基板電圧発生回路
JPS583183A (ja) * 1981-06-30 1983-01-08 Fujitsu Ltd 半導体装置の出力回路
JPS58133038A (ja) * 1982-02-03 1983-08-08 Nec Corp インバ−タ回路
JPS595488A (ja) * 1982-07-01 1984-01-12 Fujitsu Ltd 半導体装置
US4516123A (en) * 1982-12-27 1985-05-07 At&T Bell Laboratories Integrated circuit including logic array with distributed ground connections
JPS59212027A (ja) * 1983-05-18 1984-11-30 Toshiba Corp 半導体集積回路の出力回路
JPS6030152A (ja) * 1983-07-28 1985-02-15 Toshiba Corp 集積回路
US4584491A (en) * 1984-01-12 1986-04-22 Motorola, Inc. TTL to CMOS input buffer circuit for minimizing power consumption
US4567378A (en) * 1984-06-13 1986-01-28 International Business Machines Corporation Driver circuit for controlling signal rise and fall in field effect transistor processors
US4609834A (en) * 1984-12-24 1986-09-02 Burroughs Corporation Integrated logic circuit incorporating a module which generates a control signal that cancels switching noise

Also Published As

Publication number Publication date
KR870007509A (ko) 1987-08-19
US4754170A (en) 1988-06-28
KR900008439B1 (ko) 1990-11-20
EP0237139B1 (de) 1991-06-19
JPS62159917A (ja) 1987-07-15
EP0237139A1 (de) 1987-09-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee