CN207083064U - A kind of reading circuit of non-refrigerating infrared focal plane - Google Patents
A kind of reading circuit of non-refrigerating infrared focal plane Download PDFInfo
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- CN207083064U CN207083064U CN201720671229.7U CN201720671229U CN207083064U CN 207083064 U CN207083064 U CN 207083064U CN 201720671229 U CN201720671229 U CN 201720671229U CN 207083064 U CN207083064 U CN 207083064U
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- SULYVXZZUMRQAX-NSHDSACASA-N (5s)-5-[(1,2-oxazol-3-ylamino)methyl]-3-[2,3,5-trifluoro-4-(4-oxo-2,3-dihydropyridin-1-yl)phenyl]-1,3-oxazolidin-2-one Chemical compound C([C@H]1CN(C(O1)=O)C=1C=C(C(=C(F)C=1F)N1C=CC(=O)CC1)F)NC=1C=CON=1 SULYVXZZUMRQAX-NSHDSACASA-N 0.000 description 1
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Abstract
The utility model discloses a kind of reading circuit of non-refrigerating infrared focal plane.The reading circuit includes first integral unit, second integral unit, discharge switch, gating module and gain amplification module；The input of the gain amplification module connects the output end of the gating module, the first integral unit, second integral unit and discharge switch are in parallel, its common input end connects the output end of gain amplification module, first output end of the output end of first integral unit as the reading circuit, the second output end of the output end of second integral unit as the reading circuit.The utility model is due to having used two integral units, two integral units enable in two adjacent row cycles, alternately integration and output, in the case of equal array size and equal frame frequency, the time of integration adjustable extent of reading circuit adds more than 30%.
Description
Technical field
The utility model belongs to infrared imaging system field, more particularly, to a kind of reading of non-refrigerating infrared focal plane
Go out circuit.
Background technology
Non-refrigerate infrared focal plane array seeker can work at normal temperatures, without refrigeration plant, and with light weight, body
The small, long lifespan of product, cost are low, small power consumption, start the advantages that fast and stability is good, meet civilian infrared system and part is military
Infrared system to infrared detector there is an urgent need to.This technology is thus set to have obtained quick development and be widely applied.And
Reading circuit (ROIC) is one of critical component of un-cooled infrared focal plane array, and its major function is to infrared detector
The small-signal of sensing is pre-processed and (such as integrates, amplifies, filtering, sampling/holding) and the parallel/serial row of array signal turns
Change.
The reading circuit of prior art uses capacitive feedback mutual conductance structure for amplifying (CTIA, Capacitance
Transimpedance Amplifier), including pre-amplification circuit and sampling hold circuit, if Fig. 1 is with the structure
The SH circuits based on switching capacity, current signal lint put by the first electric capacity C1 and first integral amplifier A1 first
Greatly, then voltage signal is converted to by the second electric capacity C2 and second integral amplifier.The reading circuit is by uncooled ir
The all of focal plane array detector are listed in a row cycle while sample output, and during row cycle time × line number=every frame
M- frame blanking time, and the time that a row cycle includes the time of scanning integration and sampling is kept.With switch S1, S2
With the change of S3 sequential, electric capacity C2 through overdischarge, signal conversion (current signal lint is converted into voltage signal Vout) with
And sampling keeps (output voltage signal Vout), so as to complete a row cycle.With the increasing of un-cooled infrared focal plane array
Greatly, line number also increases naturally；The row cycle of reading circuit must be reduced, to avoid frame frequency from being affected.And due to a row week
The time adjustable extent that interim sampling is kept is smaller, it is necessary to which the row cycle could be reduced by compressing the time of integration, and work as sampled signal
When more faint, the time of integration too short accuracy that thermal noise can be caused to increase, influence reading circuit.
The content of the invention
For the disadvantages described above or Improvement requirement of prior art, the utility model provides a kind of non-refrigerating infrared focal plane
Reading circuit, its object is to increase the adjustable extent of the time of integration, thus solve in the case of weak output signal, integrate
It is excessive that thermal noise is exported caused by time deficiency.
To achieve the above object, according to one side of the present utility model, there is provided a kind of reading circuit, including the first product
Subdivision, second integral unit, discharge switch, gating module and gain amplification module；
The input of the gain amplification module connects the output end of the gating module, the first integral unit, the
Two integral units and discharge switch are in parallel, and its common input end connects the output end of gain amplification module, first integral unit
First output end of the output end as the reading circuit, the output end of second integral unit as the reading circuit
Two output ends.
Preferably, the integral unit includes integrating capacitor, first switch and second switch, and the of the first switch
Input of the one end as the integral unit, the second end connect the input of integrating capacitor, the output end of the integrating capacitor
Connect the first end of second switch, the output end of the second end of the second switch as the integral unit.
As it is further preferred that the reading circuit also includes switching matrix, the output end difference of the switching matrix
Connect first switch, second switch and discharge switch.
Preferably, the gating module include the first gating unit, the second gating unit ... and M gating units, institute
State i-th input of the input as the gating module of the i-th gating unit, output end of the output end as gating module,
I-th output end of the gating matrix connects the control terminal of the i-th gating unit；Wherein, M be outside infrared focus plane columns, i
For 1~M arbitrary integer.
As it is further preferred that i-th gating unit is managed for mos, the grid of the mos pipes is as the described i-th choosing
The control terminal of logical unit, the input of the source electrodes of the mos pipes as i-th gating unit, the drain electrode conduct of the mos pipes
The output end of i-th gating unit.
According to another aspect of the present utility model, a kind of reading circuit is additionally provided, including first switch, second open
Close, the 3rd switch, the 4th switch, the 5th switch, the 6th switch, the 7th switch, the 8th switch, the 9th switch, first integral electricity
Hold, second integral electric capacity and inverting amplifier；
The first end of first switch, the 7th switch first end, the 9th switch first end and inverting amplifier it is defeated
Enter end to be connected, the output end at the second end of second switch, the second end of the 8th switch and inverting amplifier is connected；
The first end at the second end of first switch, the first end of the 5th switch and first integral electric capacity is connected；First product
The first end at the second end of electric capacity, the first end of second switch and the 6th switch is divided to be connected；
The first end at the second end of the 7th switch, the first end of the 3rd switch and second integral electric capacity is connected；Second product
The first end at the second end of electric capacity, the first end of the 4th switch and the 8th switch is divided to be connected；
First output end of second end as the reading circuit of 5th switch, described in the second end of the 3rd switch is used as
Second end of the second output end of reading circuit, the second end of the 4th switch and the 6th switch is connected, and collectively as described
3rd output end of reading circuit.
Preferably, in addition to switching matrix, the first output end of the switching matrix connect the control terminal of the 9th switch, institute
State control terminal, the control terminal of second switch, the control terminal of the 3rd switch of the second output end connection first switch of switching matrix
And the 4th switch control terminal, the switching matrix the 3rd output end connection the 5th switch control terminal, the 6th switch
The control terminal of control terminal, the control terminal of the 7th switch and the 8th switch.
Preferably, in addition to gating matrix, the first gating unit, the second gating unit ... and M gating units, institute
The i-th output end for stating gating matrix connects the control terminal of the i-th gating unit, described in the input of i-th gating unit is used as
I-th input of gating module, output end connect the input of inverting amplifier, the i-th output end of the gating matrix jointly
Connect the control terminal of the i-th gating unit；Wherein, M is the columns of outside infrared focus plane, and i is 1~M arbitrary integer.
As it is further preferred that also including p-type metal-oxide-semiconductor, the drain electrode of the p-type metal-oxide-semiconductor connects the defeated of inverting amplifier
Enter end, N-type metal-oxide-semiconductor is also associated between i-th gating unit and inverting amplifier, the drain electrode connection of N-type metal-oxide-semiconductor is anti-
The input of phase amplifier, the source electrode of N-type metal-oxide-semiconductor connect the output end of the i-th gating unit.
In general, by the contemplated above technical scheme of the utility model compared with prior art, due to using
Two integral units so that two integral units can be in two adjacent row cycles, and alternately integration is with exporting, equal
In the case of array size and equal frame frequency, the time of integration adjustable extent of reading circuit adds more than 30%.
Brief description of the drawings
Fig. 1 is prior art reading circuit structure schematic diagram；
Fig. 2 is that 1 pair of capacitance integral of embodiment samples column unit circuit diagram；
Fig. 3 is the circuit working timing figure of embodiment 1.
Embodiment
In order that the purpose of this utility model, technical scheme and advantage are more clearly understood, below in conjunction with accompanying drawing and implementation
Example, the utility model is further elaborated.It should be appreciated that specific embodiment described herein is only explaining
The utility model, it is not used to limit the utility model.In addition, institute in each embodiment of the utility model disclosed below
As long as the technical characteristic being related to does not form conflict each other, can is mutually combined.
One side of the present utility model, there is provided a kind of reading circuit, including first integral unit, second integral list
Member, discharge switch, gating module and gain amplification module；
The input of the gain amplification module connects the output end of the gating module, the first integral unit, the
Two integral units and discharge switch are in parallel, and its common input end connects the output end of gain amplification module, first integral unit
First output end of the output end as the reading circuit, the output end of second integral unit as the reading circuit
Two output ends；
The gating module is used to gate sampled signal of the non-refrigerating infrared focal plane in same a line, and mould is amplified in the gain
Block is used to amplify the sampled signal, and the first integral unit and second integral unit were used within same a line cycle, handed over
For being integrated and being exported to sampled signal, the discharge switch is used to put first integral unit and second integral unit
Electricity and signal replacement.
The first integral unit and second integral unit include integrating capacitor, first switch and second switch,
Input of the first end of the first switch as the integral unit, the second end connects the input of integrating capacitor, described
The first end of the output end connection second switch of integrating capacitor, the second end of the second switch is as the defeated of the integral unit
Go out end；
Integrating capacitor is used to integrate sampled signal, is converted to voltage signal, and first switch is used to switch integration electricity
Hold the connection status between gain amplification module, second switch is used to switch between integrating capacitor and outside analog-digital converter
Connection status；The reading circuit also includes switching matrix, the output end of switching matrix connect respectively first switch, second switch with
And discharge switch, state is cut-off between first switch, second switch and discharge switch for switching, makes first integral unit
And the integrating capacitor of second integral unit switches in electric discharge, integration and output state.
Gating module include the first gating unit, the second gating unit ... and M gating units, i-th gating are single
I-th input of the input of member as the gating module, output end of the output end as gating module, the gating matrix
The i-th output end connect the i-th gating unit control terminal；Wherein, M is the columns of outside infrared focus plane, and i is any of 1~M
Integer；When the i-th gating unit is mos pipes, the control terminal of the grids of the mos pipes as i-th gating unit is described
Input of the source electrode of mos pipes as i-th gating unit, the drain electrode of the mos pipes is as the defeated of i-th gating unit
Go out end；From the gate input control signal of mos pipes when, reading circuit can obtain the signal of corresponding infrared focus plane respective column.
Embodiment 1
Fig. 2 is the reading circuit of a certain row of a non-refrigerating infrared focal plane, and for non-refrigerating infrared focal plane, often row is shared
Same reading circuit, and each row possess independent reading circuit；The reading circuit includes first switch S1, second switch
S2, the 3rd switch S3, the 4th switch S4, the 5th switch S5, the 6th switch S6, the 7th switch S7, the 8th switch S8, the 9th switch
S9, effectively first resistance Ra, blind element resistance Rb, p-type metal-oxide-semiconductor M1, N-type metal-oxide-semiconductor M2 and M row gating switch mos pipes (N-type MOS
Pipe) MR1 ... MRX-1, MRX, MRX+1 ... MRM, M are line number, and X is 2~M-2 arbitrary integer, first integral electric capacity C1, the
Two integrating capacitor C2, the first electric capacity C1 first end connection first switch S1 first end and the first end of the 5th switch, the 5th
First voltage output end VA1 of second end of switch as reading circuit, for connecting the first analog-digital converter ADC1 of outside,
Second electric capacity C2 first end the 3rd switchs S3 first end and the first end of the 7th switch, and the second end of the 3rd switch is as reading
Go out the second voltage output end VA2 of circuit, for connecting the second analog-digital converter ADC2 of outside, the first analog-digital converter and the
Two analog-digital converters may be the same or different, and when both are same analog-digital converter, a change-over period of analog-digital converter needs
It is less than a row cycle, and when both are different analog-digital converters, a change-over period of analog-digital converter needs to be less than
Two row cycles.
First electric capacity C1 the second end connection second switch and the first end of the 6th switch, the second end connection of the second electric capacity
First electricity of second end of the first end of the 4th switch and the 8th switch, the 6th switch and the 4th switch collectively as reading circuit
Input VREF is pressed, for connecting the first bias voltage source；The second end and the of the switch of the second end connection the 7th of first switch
The first end of nine switches, the second end of the 9th switch, second switch and the 8th switch are connected.
Second voltage input end VBUS of the integral amplifier A anode as reading circuit, for connecting the second biasing
Voltage source, the tertiary voltage input of p-type mos pipes M1 grid end VB2 as reading circuit, for connecting the 3rd bias voltage
Source, the 4th voltage input end of N-type mos pipes M2 grid end VN1 as reading circuit, for connecting the 4th bias voltage source, the
One grid end signal voltage end VS<1>To M grid end signal voltages end VS<M>, as the row selects signal control terminal of the reading circuit,
Fiveth voltage input end VB1 of the blind element resistance Rb first end as the reading circuit, for connecting the 5th bias voltage source,
A is integral amplifier, and first integral electric capacity C1 is identical with second integral electric capacity C2.
The source of blind element resistance Rb the second end connection p-type mos pipes, the leakage of p-type mos pipes M1 drain electrode connection N-type mos pipes
Pole and the first input end of integral amplifier, N-type mos pipes M2 source electrode connect the first gating switch Mos pipes to M gating switches
The drain electrode of mos pipes, the V of the grids of the first gating switch Mos pipes to M gating switch mos pipes as the reading circuit<1>Electricity
Pressure~V<M>Voltage input end, for connecting digital controlled signal, and detector resistance Ra can be with the infra-red radiation being subject to
It is different and change, the electric current Ia for flowing through itself is changed.Because Ib is the electric current that flows through blind element Rb, integration current Iint=
Ib-Ia, and integral voltage Δ Vint=Iint × Tint/C1, Tint are the time of integration, electric capacity output voltage is VA1=VREF+
Δ Vint, therefore, output voltage can also change with the difference of infra-red radiation.
In addition, the reading circuit also includes control device, and connection first switch is used for the control terminal of the 9th switch
The shut-off of controlling switch；Fig. 3 is the control sequential of this reading circuit control device, and its medium wave peak represents to close, and trough represents disconnected
Open；Wherein, the control signal for switching S1, S2, S3 and S4 is RS1, and S5, S6, S7 and S8 control signal is RS2, S9 control
Signal is RST, and VS<1>~VS<M>Represent the control signal of row gating.
, will first in effective member under consistent state (radiation value of i.e. all effectively members is all equal) when circuit works
Circuit is adjusted to poised state, the regulation and control sequential of the on off state of adjustment state with reference to figure 3 so that its in the i-th i periods,
VA2=VREF, in the i-th v periods, VA1=VREF；Even if electric capacity C1/C2 output end voltages VA1/VA2 is equal to the first output end
The ADC connected on VA1 and the second output end VA2 reference offset voltage, now reference offset voltage meet formula VREF
(Ia=(VB1-VB2-Vthp)/Ra=(VN1-Vthn)/Rb=Ib, wherein, Vthp represents the first mos pipes M1 threshold voltage,
Vthn represents the 2nd mos pipes M2 threshold voltage), now Iint is equal to zero.When effective member is in running order, circuit work
For sequential as shown in figure 3, RST is reset signal, circuit carries out integral reset operation, RS1 and RS2 in each row cycle as integration
Sampled signal, RS1 and RS2 opposite in phase, VS<1>、VS<2>……VS<M>For M row gating switch mos pipes MR1~MRM's
Grid end signal voltage, VS<X-1>For the row selects signal of X -1, VS<X>For X row selects signal, VS<X+1>Select and believe for the row of X+1
Number, work as VS<X>When choosing X row for high level, switch S1, S2, S3 and S4 closure, switch S5, S6, S7 and S8 open circuit, open
After pass S9 resets terminate, electric capacity C1 realizes the integration to the effectively first raying variable-current of X row, and electric capacity C2 is realized to X -1
The output of capable integral voltage, and output voltage is VA2；Work as VS<X+1>When choosing the row of X+1 for high level, switch S5,
S6, S7 and S8 are closed, switch S1, S2, S3 and S4 open circuit, switch S9 resets terminate after, electric capacity C1 is by product that lastrow is X row
Component voltage exports, and output voltage is VA1, and it is the effectively first raying variable-current of the row of X+1 to current line that electric capacity C2, which realizes,
Integration, so repeatedly blocked operation, until a frame all exports.
Exemplified by X row X row and the sampling of the row of X -1, in the i-th period, switch S1, S2, S3, S4, S9 closure, switch
S5, S6, S7, S8 disconnect, the first electric capacity C1 both ends short circuit dischange, and electric capacity C2 realizes the output to the row of X -1, and output voltage is
VA2=VREF+ Δs vint；In the i-th i periods, switch S1, S2, S3, S4 are remained closed, and switch S5, S6, S7, S8, S9 disconnect, electricity
Road integrates to electric capacity C1, and C1 both ends generation integral voltage Δ Vint=Iint × Tint/C1, electric capacity C2 continue to N-1
Capable output；In the i-th ii periods, switch S1, S2, S3, S4 are opened, and switch S5, S6, S7, S8, S9 closure, circuit is to electric capacity C2
Resetted, electric capacity C2 both end voltages are equal, and electric capacity C1 realizes the output to Nth row, output voltage VA1, VA1=VREF+
Δvint.At the i-th iii moment, switch S1, S2, S3, S4 are stayed open, and switch S5, S6, S7, S8 are remained closed, and S9 is opened, electricity
Road integrates to electric capacity C2, and C2 both ends generation integral voltage Δ Vint=Iint × Tint/C2, electric capacity C1 continue to Nth row
Output.Δ vint is different according to the radiation that effectively first Ra receives in each array and is worth different.
As shown in figure 3, due to using row alternately integration/sampling holding structure, in the situation that frame frequency is constant, the utility model
The maximum adjustable extent of the time of integration of circuit is row cycle time to subtract row resetting time, add prior art
20%~30%.It make use of row cycle time to be used to integrate to greatest extent, signal can be exported to extraction to greatest extent, improve
Circuit efficiency.
As it will be easily appreciated by one skilled in the art that preferred embodiment of the present utility model is the foregoing is only, not
To limit the utility model, any modification of all made within spirit of the present utility model and principle, equivalent substitution and change
Enter, should be included within the scope of protection of the utility model.
Claims (9)
1. a kind of reading circuit, it is characterised in that including first integral unit, second integral unit, discharge switch, gating module
And gain amplification module；
The input of the gain amplification module connects the output end of the gating module, the first integral unit, the second product
Subdivision and discharge switch are in parallel, and its common input end connects the output end of gain amplification module, first integral unit it is defeated
Go out first output end of the end as the reading circuit, the output end of second integral unit is second defeated as the reading circuit
Go out end.
2. reading circuit as claimed in claim 1, it is characterised in that the integral unit includes integrating capacitor, first switch
And second switch, the input of the first end of the first switch as the integral unit, the second end connection integrating capacitor
Input, the integrating capacitor output end connection second switch first end, the second end of the second switch is as institute
State the output end of integral unit.
3. reading circuit as claimed in claim 2, it is characterised in that also including switching matrix, the output of the switching matrix
End connects first switch, second switch and discharge switch respectively.
4. reading circuit as claimed in claim 1, it is characterised in that the gating module includes the first gating unit, second
Gating unit ... and M gating units, the input of i-th gating unit input as the i-th of the gating module
End, output end of the output end as gating module, the i-th output end of the gating matrix connect the control terminal of the i-th gating unit；
Wherein, M is the columns of outside infrared focus plane, and i is 1~M arbitrary integer.
5. reading circuit as claimed in claim 4, it is characterised in that i-th gating unit is managed for mos, the mos pipes
Control terminal of the grid as i-th gating unit, the input of the source electrodes of the mos pipes as i-th gating unit, institute
State output end of the drain electrode of mos pipes as i-th gating unit.
6. a kind of reading circuit, it is characterised in that opened including first switch, second switch, third switch, the 4th switch, the 5th
Pass, the 6th switch, the 7th switch, the 8th switch, the 9th switch, first integral electric capacity, second integral electric capacity and anti-phase amplification
Device；
The first end of first switch, the 7th switch first end, the 9th switch first end and inverting amplifier input
It is connected, the output end at the second end of second switch, the second end of the 8th switch and inverting amplifier is connected；
The first end at the second end of first switch, the first end of the 5th switch and first integral electric capacity is connected；First integral electricity
The first end of the second end, the first end of second switch and the 6th switch that hold is connected；
The first end at the second end of the 7th switch, the first end of the 3rd switch and second integral electric capacity is connected；Second integral electricity
The first end of the second end, the first end of the 4th switch and the 8th switch that hold is connected；
First output end of second end of the 5th switch as the reading circuit, the second end of the 3rd switch is as the reading
Second end of the second output end of circuit, the second end of the 4th switch and the 6th switch is connected, and collectively as the reading
3rd output end of circuit.
7. reading circuit as claimed in claim 6, it is characterised in that also including switching matrix, the first of the switching matrix
The control terminal of the switch of output end connection the 9th, the control terminal of the second output end connection first switch of the switching matrix, second
The control terminal of the control terminal of switch, the control terminal of the 3rd switch and the 4th switch, the 3rd output end of the switching matrix connect
Connect control terminal, the control terminal of the 6th switch, the control terminal of the 7th switch and the 8th control terminal switched of the 5th switch.
8. reading circuit as claimed in claim 6, it is characterised in that also include gating matrix, the first gating unit, the second choosing
Logical unit ... and M gating units, the i-th output end of the gating matrix connects the control terminal of the i-th gating unit, described
I-th input of the input of i-th gating unit as the gating module, output end connect the input of inverting amplifier jointly
End；Wherein, M is the columns of outside infrared focus plane, and i is 1~M arbitrary integer.
9. reading circuit as claimed in claim 8, it is characterised in that also including p-type metal-oxide-semiconductor, the drain electrode of the p-type metal-oxide-semiconductor
The input of inverting amplifier is connected, N-type metal-oxide-semiconductor, N are also associated between i-th gating unit and inverting amplifier
The input of the drain electrode connection inverting amplifier of type metal-oxide-semiconductor, the source electrode of N-type metal-oxide-semiconductor connect the output end of the i-th gating unit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720671229.7U CN207083064U (en) | 2017-06-09 | 2017-06-09 | A kind of reading circuit of non-refrigerating infrared focal plane |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720671229.7U CN207083064U (en) | 2017-06-09 | 2017-06-09 | A kind of reading circuit of non-refrigerating infrared focal plane |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110677133A (en) * | 2019-09-11 | 2020-01-10 | 北京爱尔微科技有限公司 | Integral type self-adaptive baseline restoration circuit |
| CN114172517A (en) * | 2021-08-18 | 2022-03-11 | 北京大学 | Infrared reading circuit and analog-to-digital converter |
-
2017
- 2017-06-09 CN CN201720671229.7U patent/CN207083064U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110677133A (en) * | 2019-09-11 | 2020-01-10 | 北京爱尔微科技有限公司 | Integral type self-adaptive baseline restoration circuit |
| CN110677133B (en) * | 2019-09-11 | 2023-03-28 | 北京爱尔微科技有限公司 | Integral type self-adaptive baseline restoration circuit |
| CN114172517A (en) * | 2021-08-18 | 2022-03-11 | 北京大学 | Infrared reading circuit and analog-to-digital converter |
| CN114172517B (en) * | 2021-08-18 | 2024-05-28 | 北京大学 | Infrared reading circuit and analog-to-digital converter |
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