CN202601619U - Thin film transistor, array substrate and display - Google Patents
Thin film transistor, array substrate and display Download PDFInfo
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- CN202601619U CN202601619U CN 201220007606 CN201220007606U CN202601619U CN 202601619 U CN202601619 U CN 202601619U CN 201220007606 CN201220007606 CN 201220007606 CN 201220007606 U CN201220007606 U CN 201220007606U CN 202601619 U CN202601619 U CN 202601619U
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Abstract
The embodiments of the utility model, which belong to the display manufacturing field, relate to a thin film transistor (TFT), an array substrate and a display, thereby improving on-state currents of the TFT, reducing off-state currents of the TFT and increasing the threshold voltage stability of the TFT. The TFT comprises a first grid electrode, an active region, a second grid electrode, a source electrode and a drain electrode, wherein the second grid electrode, the source electrode and the drain electrode are arranged on the same layer; a first insulating layer is formed between the first grid electrode and the active layer; and a second insulating layer is formed between the source electrode, the drain electrode and the active layer. Besides, the source electrode and the drain electrode respectively pass through a first via hole and a second via hole on the second insulating layer and then are contacted with the active layer. The first grid electrode and the second grid electrode are opposite to the active layer; and the first grid electrode and the second grid electrode are electrically connected through a third via hole penetrating the first insulating layer and the second insulating layer. According to the utility model, the TFT can be applied to the display manufacturing field.
Description
Technical Field
The utility model relates to a display field of making especially relates to a thin film transistor, array substrate and display.
Background
In an active matrix display, a TFT (Thin Film Transistor) for controlling each pixel is provided for each pixel, and thus each pixel can be independently controlled by a driver circuit without causing influence of crosstalk or the like on other pixels. The thin film transistor includes at least a gate electrode, a source electrode, and a drain electrode, and a gate insulating layer and an active layer.
At present, the active layer of the TFT is mostly made of amorphous silicon or polysilicon semiconductor material. The TFT using amorphous silicon as an active layer has a low on-state current due to its characteristic limitations (e.g., mobility, on-state current, etc.), and is difficult to be used in applications requiring a large current and a fast response, such as organic light emitting displays and displays having a large size, high resolution, and high refresh rate. The TFT using polysilicon as an active layer has characteristics superior to those of amorphous silicon, and can be used for an organic light emitting display; however, it is difficult to prepare a panel having a medium or large size due to its poor uniformity. In addition, the problem of uneven characteristics of polycrystalline silicon is solved by adding a compensation circuit, the number of thin film transistors and capacitors in pixels is increased, the number of masks and manufacturing difficulty are increased, and yield is reduced.
In summary, in the above-described technical solutions, the inventors have found that the TFT manufactured by the prior art has a problem that the switching ratio of the control current (on-state current of the TFT and off-state current of the TFT) of the TFT is not easily controlled, and the stability of the threshold voltage is poor.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a TFT, array substrate and display can improve TFT's on-state current, reduce TFT's off-state current, increase TFT's threshold voltage stability.
In order to achieve the above object, the embodiments of the present invention adopt the following technical solutions:
in one aspect, an embodiment of the present invention provides a thin film transistor, including: the transistor comprises a first grid electrode, an active layer, a second grid electrode, a source electrode and a drain electrode, wherein the second grid electrode, the source electrode and the drain electrode are arranged on the same layer; wherein,
the source electrode and the drain electrode are respectively contacted with the active layer through a first via hole and a second via hole on the second insulating layer; the first grid and the second grid are opposite to the active layer, and are electrically connected through a third through hole penetrating through the first insulating layer and the second insulating layer.
In one aspect, an embodiment of the present invention provides an array substrate, including: the pixel unit is defined by a scanning line, a data line and a pixel unit;
at least a pixel electrode and the thin film transistor are formed in the pixel unit; and the drain electrode of the thin film transistor is electrically connected with the pixel electrode.
In one aspect, an embodiment of the present invention provides a display, including: the array substrate and the color film substrate are arranged oppositely, and liquid crystal is filled between the two substrates; wherein, the array substrate includes: the pixel unit is defined by a scanning line, a data line and a pixel unit;
at least a pixel electrode and the thin film transistor are formed in the pixel unit; and the drain electrode of the thin film transistor is electrically connected with the pixel electrode.
In one aspect, an embodiment of the present invention provides an array substrate, including: the pixel structure comprises scanning lines and data lines which are vertical to each other, power supply lines which are parallel to the data lines, and pixel units defined by the scanning lines and the data lines; at least a switch thin film transistor and a drive thin film transistor are formed in the pixel unit; the grid electrode of the switch thin film transistor is electrically connected with the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device;
the switch thin film transistor and/or the driving thin film transistor are/is the thin film transistor.
In one aspect, an embodiment of the present invention provides a display, including: the pixel structure comprises scanning lines and data lines which are vertical to each other, power supply lines which are parallel to the data lines, and pixel units defined by the scanning lines and the data lines; an anode of at least a switching thin film transistor, a driving thin film transistor and an organic light emitting device is formed in the pixel unit; wherein the organic light emitting device includes: the grid electrode of the switch thin film transistor is electrically connected with the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device;
the switch thin film transistor and/or the driving thin film transistor are/is the thin film transistor.
An embodiment of the utility model provides a thin film transistor, array substrate and display, through adopting oxide semiconductor as TFT's active layer, adopt the structure that sets up a grid respectively from top to bottom at the active layer, improved TFT's on-state current, reduced TFT's off-state current, increase TFT's threshold voltage stability under the condition that does not increase process flow, and then increased the product yield.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of a top view structure of a thin film transistor according to an embodiment of the present invention;
fig. 2A is a schematic sectional view of a-a direction of a thin film transistor according to an embodiment of the present invention;
fig. 2B is a schematic sectional view of a thin film transistor according to an embodiment of the present invention from direction B-B;
fig. 3A to fig. 6B are schematic diagrams illustrating a manufacturing process of a thin film transistor according to an embodiment of the present invention;
fig. 7 is a schematic top perspective structural view of a thin film transistor according to a second embodiment of the present invention;
fig. 8A is a schematic sectional view of an a-a direction of a thin film transistor according to an embodiment of the present invention;
fig. 8B is a schematic sectional view of a thin film transistor according to an embodiment of the present invention from B-B.
Reference numerals:
100-substrate base plate, 101-first insulating layer, 102-second insulating layer, 103-active layer,
11a 1-first gate, 11a2 second gate, 11 b-source, 11 c-drain,
211-first via, 212-second via, 213-third via.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The first embodiment is as follows:
an embodiment of the utility model provides a thin film transistor, refer to fig. 1, fig. 2A, fig. 2B, include: a first gate 11a1, an active layer 103, and a second gate 11a2, a source 11b, and a drain 11c disposed in the same layer, wherein a first insulating layer 101 is formed between the first gate 11a1 and the active layer 103, and a second insulating layer 102 is formed between the source 11b, the drain 11c, and the active layer 12; the source electrode 11b and the drain electrode 11c are respectively in contact with the active layer 12 through a first via hole 211 and a second via hole 212 on the second insulating layer 102; the first gate 11a1 and the second gate 11a2 are both located opposite to the active layer 103, and the first gate 11a1 and the second gate 11a2 are electrically connected through a third via 213 penetrating through the first insulating layer 101 and the second insulating layer 102.
The structure of the thin film transistor is generally formed on a base substrate 100.
It should be noted that, in all embodiments of the present invention, the first gate 11a1 and the second gate 11a2, the source 11b and the drain 11c disposed on the same layer are respectively formed by patterning two metal films; according to the order of depositing metal films on the manufacturing process, the metal film deposited firstly is called as a bottom metal film, and the metal film deposited later is called as a top metal film.
Specifically, in the present embodiment, the first gate 11a1 is a pattern formed by a patterning process on a bottom metal film; and the second gate electrode 11a2, the source electrode 11b, and the drain electrode 11c disposed in the same layer are patterned by a patterning process of the top metal film.
An embodiment of the utility model provides a thin film transistor adopts the structure that sets up a grid respectively from top to bottom at the active layer, just so can improve TFT's on-state current, reduce TFT's off-state current, increase TFT's threshold voltage stability under the condition that does not increase process flow, and then increased the product yield.
Specifically, in the on-state of the single-gate TFT, carriers are attracted by an electric field generated by the gate electrode and are substantially concentrated at an interface between the active layer and the gate insulating layer and at a side close to the gate electrode in the active layer; in the off state, carriers are repelled by the gate electric field, and a trace of carriers remain near the active layer interface away from the gate. In operation of the TFT having the upper and lower dual gate structures, carriers are attracted or repelled by electric fields generated by the upper and lower gate electrodes, and are not concentrated at the interface of the active layer but tend to be distributed more uniformly. Therefore, the electrical properties of the double gate TFT, such as on-state, off-state current, threshold voltage, etc., are less affected by the interface of the active layer than the single gate TFT. Generally, compared with the interface, the active layer has fewer internal defects, the uniformity is easier to control, and the active layer is not easily influenced by the external environment and the subsequent process. Therefore, the double gate TFT has better electrical properties such as high switching ratio and stability, etc. than the single gate TFT.
Further, the thin film transistor may further include: a third insulating layer (none of fig. 1, 2A, and 2B) covering the second gate electrode 11a2, the source electrode 11B, and the drain electrode 11c provided at the same layer; the third insulating layer may function to protect the second gate electrode 11a2, the source electrode 11b, and the drain electrode 11c formed of the top metal film.
In all embodiments of the present invention, the material of the active layer 103 may be a commonly used non-oxide semiconductor material, such as silicon, amorphous silicon, or polysilicon; in the embodiment of the present invention, it is preferable that the material of the active layer 103 is an oxide semiconductor. Still more preferably, the material of the active layer is an oxide semiconductor containing at least one metal of indium, gallium, and zinc.
The characteristics of the thin film transistor using an oxide semiconductor as an active layer are superior to those of the thin film transistor using a non-oxide semiconductor as an active layer. For example, an oxide semiconductor enhances characteristics such as mobility, on-state current, switching characteristics, and the like of a thin film transistor, compared to amorphous silicon. Compared with polysilicon, oxide semiconductor has better uniformity, does not need to increase a compensation circuit, and has advantages in the number of masks and manufacturing difficulty, so that the oxide semiconductor also has advantages in manufacturing large-size displays. And the oxide semiconductor film can be prepared by methods such as sputtering and the like, additional equipment is not needed, and the method has the advantage of cost.
In all embodiments of the present invention, the material of the first insulating layer and the second insulating layer may be silicon oxide, silicon nitride, or silicon oxynitride. In an embodiment of the present invention, the thicknesses of the first insulating layer and the second insulating layer are the same or different.
If the two insulating layers are made of the same material and have the same thickness, the current carriers are uniformly distributed in the active layer. If the two insulating layers are made of the same material and have different thicknesses, the distribution of carriers in the active layer during the operation of the TFT will tend to be closer to the interface of the active layer on the side of the thinner insulating layer. Therefore, by adjusting the thickness of the two insulating layers, carriers can be selectively passed through a more stable interface (i.e., the interface of the active layer near the thinner insulating layer side) according to the process conditions, resulting in more stable electrical properties.
Of course, if a third insulating layer is further included in the thin film transistor, the material of the third insulating layer may also be silicon oxide, silicon nitride, or silicon oxynitride.
The embodiment of the utility model provides a still provide the manufacturing approach to above-mentioned thin film transistor, include:
s101, referring to fig. 3A and 3B, fabricating a bottom metal film on a substrate, and forming a first gate 11a1 through a first patterning process;
specifically, a magnetron sputtering method may be used to prepare a bottom metal film on a substrate. The material of the underlying metal film may be any metal such as molybdenum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, or a combination of these materials may be used.
The patterning process in all embodiments of the present invention may include: and coating photoresist on the film to be patterned, and forming a required pattern by using a mask plate through the processes of exposure, development, etching, stripping and the like.
S102, referring to fig. 4A and 4B, forming a first insulating layer 101 covering the first gate 11a 1;
specifically, a first insulating layer which can be deposited by a chemical vapor deposition method; the material of the first insulating layer is usually silicon nitride, and silicon oxide, silicon oxynitride, or the like can be used. Of course, the first insulating layer here is also functionally the gate insulating layer of the first gate electrode.
S103, referring to fig. 5A and 5B, fabricating a semiconductor thin film, and forming an active layer 103 through a second patterning process;
specifically, the semiconductor thin film may be deposited by a sputtering method or a chemical vapor deposition method.
Among these, the material of the semiconductor thin film is preferably an oxide semiconductor, and more preferably, may be an oxide semiconductor containing at least one metal of indium, gallium, and zinc.
S104, referring to fig. 6A and 6B, fabricating the second insulating layer 102 covering the active layer 103, and forming a first via hole 211 and a second via hole 212 on the second insulating layer 102 by a third patterning process to expose the active layer 103; and a third via hole 213 is formed through the first and second insulating layers 102 and 103 to expose the first gate electrode 11a 1;
specifically, after the second insulating layer is coated with the photoresist, the substrate may be exposed and developed by using a common mask plate, the photoresist above the first via hole, the photoresist above the second via hole, and the photoresist above the third via hole may be removed, and the positions where the first via hole, the second via hole, and the third via hole are formed may be etched for different durations or for different grays to form the first via hole, the second via hole, and the third via hole.
The material of the second insulating layer is usually silicon nitride, and silicon oxide, silicon oxynitride, or the like can be used.
S105, manufacturing a top metal film covering the second insulating layer 102, and forming a second gate 11a2, a source 11b and a drain 11c through a fourth patterning process; the second gate 11a2 is electrically connected to the first gate 11a1 through the third via hole 213, and the source 11b and the drain 11c are in contact with the active layer 103 through the first via hole 211 and the second via hole 212, respectively.
Specifically, a top metal film may be prepared over the second insulating layer using a magnetron sputtering method. The top metal film is usually made of molybdenum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, or a combination thereof. Through one patterning process, referring to fig. 2A and 2B, a second gate, a source, and a drain are formed. Since the second gate electrode, the source electrode and the drain electrode are manufactured through the same patterning process, a separate process flow is not required.
The method can further comprise the following steps:
and S106, manufacturing a third insulating layer covering the second gate 11a2, the source 11b and the drain 11c to play a role of protection.
Specifically, a third insulating layer which can be deposited by a chemical vapor deposition method; the material of the third insulating layer is usually silicon nitride, and silicon oxide, silicon oxynitride, or the like can be used.
The thin film transistor can be applied to the field of liquid crystal display.
The embodiment of the utility model provides a still provide an array substrate of the structure of using above-mentioned thin film transistor, this array substrate specifically is LCD (liquid crystal display) array substrate, include: the liquid crystal display panel comprises a substrate base plate, wherein scanning lines and data lines which are vertical to each other and pixel units limited by the scanning lines and the data lines are formed on the substrate base plate; at least a pixel electrode and the thin film transistor are formed in the pixel unit; the drain electrode of the thin film transistor is electrically connected with the pixel electrode.
The embodiment of the utility model also provides a display of the structure of using above-mentioned thin film transistor, this display can be the liquid crystal display panel specifically or the liquid crystal display after encapsulating the liquid crystal display panel; the liquid crystal display includes: the array substrate and the color film substrate are arranged oppositely, and liquid crystal is filled between the two substrates; the array substrate includes: the liquid crystal display panel comprises a substrate base plate, wherein scanning lines and data lines which are vertical to each other and pixel units limited by the scanning lines and the data lines are formed on the substrate base plate; at least a pixel electrode and the thin film transistor are formed in the pixel unit; the drain electrode of the thin film transistor is electrically connected with the pixel electrode, and the drain electrode and the pixel electrode can be directly connected according to the prior art.
The thin film transistor can also be applied to the field of organic light emitting display.
The embodiment of the utility model provides an array substrate who still provides an above-mentioned thin film transistor of application, it is specific, this array substrate is OLED (organic light emitting device) array substrate, include: the pixel structure comprises a substrate, a scanning line, a data line, a power line and a pixel unit, wherein the scanning line and the data line are perpendicular to each other on the substrate; at least a switch thin film transistor and a drive thin film transistor are formed in the pixel unit; the grid electrode of the switch thin film transistor is electrically connected with the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device; the switching thin film transistor and/or the driving thin film transistor are/is the thin film transistor.
The embodiment of the utility model provides a still provide a display of using above-mentioned thin film transistor, it is concrete, this display is OLED display, and this OLED display includes: the liquid crystal display panel comprises a substrate, a plurality of pixel units and a plurality of pixel units, wherein the substrate is provided with a scanning line and a data line which are vertical to each other, a power line which is parallel to the data line and the pixel units which are limited by the scanning line and the data line; at least a switch thin film transistor, a driving thin film transistor and an organic light emitting device are formed in the pixel unit; wherein the organic light emitting device includes: the anode, the cathode and the organic functional layer are electrically connected with the grid electrode of the switch thin film transistor and the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device; the switching thin film transistor and/or the driving thin film transistor are/is the thin film transistor.
Specifically, if the organic light emitting device in the OLED display can only emit white light, the OLED display including the OLED array substrate may further include a color film substrate having three color pixel structures of red, blue, and green. If the organic light emitting device in the OLED display can emit light of one color of red, blue or green, the OLED display including the OLED array substrate may include the OLED array substrate and the light emitting display device, and may also include a transparent substrate to protect the layer structure on the OLED array substrate and the structure of the light emitting display device.
An embodiment of the utility model provides a thin film transistor, array substrate and display, through adopting oxide semiconductor as TFT's active layer, adopt the structure that sets up a grid respectively from top to bottom at the active layer, improved TFT's on-state current, reduced TFT's off-state current, increase TFT's threshold voltage stability under the condition that does not increase process flow, and then increased the product yield.
Example two:
an embodiment of the present invention provides a thin film transistor, refer to fig. 7, fig. 8A, fig. 8B, include: a first gate 11a1, an active layer 103, and a second gate 11a2, a source 11b, and a drain 11c disposed in the same layer, wherein a first insulating layer 101 is formed between the first gate 11a1 and the active layer 103, and a second insulating layer 102 is formed between the source 11b, the drain 11c, and the active layer 103; the source electrode 11b and the drain electrode 11c are respectively in contact with the active layer 103 through a first via hole 211 and a second via hole 212 on the second insulating layer 102; the first gate 11a1 and the second gate 11a2 are both located opposite to the active layer 103, and the first gate 11a1 and the second gate 11a2 are electrically connected through a third via 213 penetrating through the first insulating layer 101 and the second insulating layer 102.
The structure of the thin film transistor is generally formed on a base substrate 100.
Specifically, in the present embodiment, the first gate 11a1 is a pattern formed by a top metal film through a patterning process; and the second gate electrode 11a2, the source electrode 11b, and the drain electrode 11c disposed on the same layer are patterned by a patterning process of the bottom metal film.
An embodiment of the utility model provides a thin film transistor adopts the structure that sets up a grid respectively from top to bottom at the active layer, has improved TFT's on-state current, has reduced TFT's off-state current, has increased TFT's threshold voltage stability under the condition that does not increase process flow, and then has increased the product yield.
Specifically, in the on-state of the single-gate TFT, carriers are attracted by an electric field generated by the gate electrode and are substantially concentrated at an interface between the active layer and the gate insulating layer and at a side close to the gate electrode in the active layer; in the off state, carriers are repelled by the gate electric field, and a trace of carriers remain near the active layer interface away from the gate. In operation of the TFT having the upper and lower dual gate structures, carriers are attracted or repelled by electric fields generated by the upper and lower gate electrodes, and are not concentrated at the interface of the active layer but tend to be distributed more uniformly. Therefore, the electrical properties of the double gate TFT, such as on-state, off-state current, threshold voltage, etc., are less affected by the interface of the active layer than the single gate TFT. Generally, compared with the interface, the active layer has fewer internal defects, the uniformity is easier to control, and the active layer is not easily influenced by the external environment and the subsequent process. Therefore, the double gate TFT has better electrical properties such as high switching ratio and stability, etc. than the single gate TFT.
Further, the thin film transistor may further include: a third insulating layer (not identified in fig. 7, 8A, 8B) covering the first gate electrode 11a 1; the third insulating layer may function to protect the first gate electrode 11a1 formed of the top metal film.
In all embodiments of the present invention, the material of the active layer 103 may be a commonly used non-oxide semiconductor material, such as silicon, amorphous silicon, or polysilicon; in the embodiment of the present invention, it is preferable that the material of the active layer 103 is an oxide semiconductor. Still more preferably, the material of the active layer is an oxide semiconductor containing at least one metal of indium, gallium, and zinc.
The characteristics of the thin film transistor using an oxide semiconductor as an active layer are superior to those of the thin film transistor using a non-oxide semiconductor as an active layer. For example, an oxide semiconductor enhances characteristics such as mobility, on-state current, switching characteristics, and the like of a thin film transistor, compared to amorphous silicon. Compared with polysilicon, oxide semiconductor has better uniformity, does not need to increase a compensation circuit, and has advantages in the number of masks and manufacturing difficulty, so that the oxide semiconductor also has advantages in manufacturing large-size displays. And the oxide semiconductor film can be prepared by methods such as sputtering and the like, additional equipment is not needed, and the method has the advantage of cost.
In all embodiments of the present invention, the material of the first insulating layer and the second insulating layer may be silicon oxide, silicon nitride or silicon oxynitride.
If the two insulating layers are made of the same material and have the same thickness, the current carriers are uniformly distributed in the active layer. If the two insulating layers are made of the same material and have different thicknesses, the distribution of carriers in the active layer during the operation of the TFT will tend to be closer to the interface of the active layer on the side of the thinner insulating layer. Therefore, by adjusting the thickness of the two insulating layers, carriers can be selectively passed through a more stable interface (i.e., the interface of the active layer near the thinner insulating layer side) according to the process conditions, resulting in more stable electrical properties.
Of course, if a third insulating layer is further included in the thin film transistor, the material of the third insulating layer may also be silicon oxide, silicon nitride, or silicon oxynitride.
The embodiment of the present invention further provides a method for manufacturing the thin film transistor shown in fig. 7, 8A and 8B, including:
s201, manufacturing a bottom metal film on the substrate 100, and forming a second gate 11a2, a source 11b and a drain 11c through a first patterning process;
s202, fabricating a second insulating layer 102 covering the second gate 11a2, the source 11b and the drain 11c, and forming a first via hole 211 and a second via hole 212 on the second insulating layer 102 through a second patterning process to expose the source 11b and the drain 11c at the first via hole 211 and the second via hole 212, respectively;
s203, manufacturing a semiconductor film covering the second insulating layer 102, and forming an active layer through a third composition process; wherein the source electrode 11b and the drain electrode 11c are in contact with the active layer 103 through a first via hole 211 and a second via hole 212, respectively;
s204, fabricating the first insulating layer 101 covering the active layer 103, and forming a third via hole 213 penetrating the first insulating layer 101 and the second insulating layer 102 through a fourth patterning process to expose the second gate electrode 11a 2;
s205, manufacturing a top layer metal film covering the first insulating layer 101, and forming a first gate 11a1 through a fifth patterning process; the first gate 11a1 and the second gate 11a2 are electrically connected through the third via 213.
The method can further comprise the following steps:
s206, a third insulating layer is formed to cover the first gate 11a1, so as to protect the first gate 11a 1.
It should be noted that, in the manufacturing method of the thin film transistor provided in the embodiment of the present invention, the materials used in each layer and the preparation method can refer to the manufacturing method in the first embodiment, and are not described again in this embodiment.
The thin film transistors shown in fig. 7, 8A, and 8B can be applied to the field of liquid crystal display.
The embodiment of the utility model provides a still provide an array substrate who uses above-mentioned thin film transistor's structure, this array substrate specifically is LCD array substrate, include: the liquid crystal display panel comprises a substrate base plate, wherein scanning lines and data lines which are vertical to each other and pixel units limited by the scanning lines and the data lines are formed on the substrate base plate; at least a pixel electrode and the thin film transistor are formed in the pixel unit; the drain electrode of the thin film transistor is electrically connected with the pixel electrode.
The embodiment of the utility model provides a display of the structure of above-mentioned thin film transistor is still provided to the application, and specifically, this display can be liquid crystal display device, for example liquid crystal display panel, LCD TV, cell-phone, liquid crystal display etc. and it includes various membrane base plate and the array substrate in above-mentioned embodiment; besides the liquid crystal display device, the display may also be other types of display devices, such as an e-reader and the like, which do not include a color film substrate, but include the array substrate in the above embodiments. The display can be a liquid crystal display panel or a liquid crystal display formed by packaging the liquid crystal display panel; the liquid crystal display includes: the array substrate and the color film substrate are arranged oppositely, and liquid crystal is filled between the two substrates; wherein, the array substrate includes: the liquid crystal display panel comprises a substrate base plate, wherein scanning lines and data lines which are vertical to each other and pixel units limited by the scanning lines and the data lines are formed on the substrate base plate; at least a pixel electrode and the thin film transistor are formed in the pixel unit; the drain electrode of the thin film transistor is electrically connected with the pixel electrode, and the drain electrode and the pixel electrode can be directly connected according to the prior art. Further, a scanning driving unit and a data driving unit may be further included in a non-pixel unit region of the display. The scanning driving unit is electrically connected with the scanning line and used for providing scanning signals for the display of the pixel unit; the data driving unit is electrically connected with the data line and used for providing data signals for the display of the pixel unit. The non-pixel region may further include a connection line between the scan driving unit and the scan line, and a connection line between the data driving unit and the data line.
The thin film transistors shown in fig. 7, 8A, and 8B can also be applied to the field of organic light emitting displays.
The embodiment of the utility model provides a still provide an array substrate who uses above-mentioned thin film transistor, this array substrate is OLED array substrate, include: the pixel unit comprises a scanning line, a data line, a power line and a pixel unit, wherein the scanning line and the data line are perpendicular to each other on a substrate, the power line is parallel to the data line, and the pixel unit is limited by the scanning line and the data line; at least a switch thin film transistor and a drive thin film transistor are formed in the pixel unit; the grid electrode of the switch thin film transistor is electrically connected with the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device; the switching thin film transistor and/or the driving thin film transistor are/is the thin film transistor.
The embodiment of the utility model provides a still provide a display of using above-mentioned thin film transistor, it is specific, this display is OLED (organic light emitting device) display, and this OLED display includes: the liquid crystal display panel comprises a substrate, a plurality of pixel units and a plurality of pixel units, wherein the substrate is provided with a scanning line and a data line which are vertical to each other, a power line which is parallel to the data line and the pixel units which are limited by the scanning line and the data line; at least a switch thin film transistor, a driving thin film transistor and an organic light emitting device are formed in the pixel unit; wherein the organic light emitting device includes: the anode, the cathode and the organic functional layer are electrically connected with the grid electrode of the switch thin film transistor and the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device; the switching thin film transistor and/or the driving thin film transistor are/is the thin film transistor. Further, the non-pixel unit area of the display may further include a scan driving unit and a data driving unit, and may further include a power module for supplying power to the organic light emitting device. The scanning driving unit is electrically connected with the scanning line and used for providing scanning signals for the display of the pixel unit; the data driving unit is electrically connected with the data line and used for providing data signals for the display of the pixel unit. The non-pixel region may further include a connection line between the scan driving unit and the scan line, a connection line between the data driving unit and the data line, and a connection line between the power module and the power line.
Specifically, if the organic light emitting device in the OLED display can only emit white light, the OLED display including the OLED array substrate may further include a color film substrate having three color pixel structures of red, blue, and green. If the organic light emitting device in the OLED display can emit light of one color of red, blue or green, the OLED display including the OLED array substrate may include the OLED array substrate and the light emitting display device, and may also include a transparent substrate to protect the layer structure on the OLED array substrate and the structure of the light emitting display device.
An embodiment of the utility model provides a thin film transistor, array substrate and display, through adopting oxide semiconductor as TFT's active layer, adopt the structure that sets up a grid respectively from top to bottom at the active layer, improved TFT's on-state current, reduced TFT's off-state current, increase TFT's threshold voltage stability under the condition that does not increase process flow, and then increased the product yield.
The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and all should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (9)
1. A thin film transistor, comprising: the transistor comprises a first grid electrode, an active layer, a second grid electrode, a source electrode and a drain electrode, wherein the second grid electrode, the source electrode and the drain electrode are arranged on the same layer; wherein,
the source electrode and the drain electrode are respectively contacted with the active layer through a first via hole and a second via hole on the second insulating layer; the first grid and the second grid are opposite to the active layer, and are electrically connected through a third through hole penetrating through the first insulating layer and the second insulating layer.
2. The thin film transistor of claim 1, wherein the first gate electrode is a pattern formed by a patterning process on a bottom metal film; and the second grid electrode, the source electrode and the drain electrode which are arranged on the same layer are patterns formed by the top layer metal film through a composition process.
3. The thin film transistor of claim 1, wherein the first gate electrode is a pattern formed by a top metal film through a patterning process; and the second grid electrode, the source electrode and the drain electrode which are arranged on the same layer are patterns formed by the bottom metal film through a composition process.
4. The thin film transistor according to claim 1, wherein thicknesses of the first insulating layer and the second insulating layer are the same or different.
5. The thin film transistor according to any one of claims 1 to 4, wherein a material of the active layer is an oxide semiconductor.
6. An array substrate, comprising: the pixel unit is defined by a scanning line, a data line and a pixel unit; it is characterized in that the preparation method is characterized in that,
forming at least a pixel electrode and the thin film transistor according to any one of claims 1 to 5 in the pixel unit; and the drain electrode of the thin film transistor is electrically connected with the pixel electrode.
7. A display, comprising: the array substrate and the color film substrate are arranged oppositely, and liquid crystal is filled between the two substrates; wherein, the array substrate includes: the pixel unit is defined by a scanning line, a data line and a pixel unit; it is characterized in that the preparation method is characterized in that,
forming at least a pixel electrode and the thin film transistor according to any one of claims 1 to 5 in the pixel unit; and the drain electrode of the thin film transistor is electrically connected with the pixel electrode.
8. An array substrate, comprising: the pixel structure comprises scanning lines and data lines which are vertical to each other, power supply lines which are parallel to the data lines, and pixel units defined by the scanning lines and the data lines; at least a switch thin film transistor and a drive thin film transistor are formed in the pixel unit; the grid electrode of the switch thin film transistor is electrically connected with the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device; it is characterized in that the preparation method is characterized in that,
the switching thin film transistor and/or the driving thin film transistor is the thin film transistor according to any one of claims 1 to 5.
9. A display, comprising: the pixel structure comprises scanning lines and data lines which are vertical to each other, power supply lines which are parallel to the data lines, and pixel units defined by the scanning lines and the data lines; at least a switch thin film transistor, a driving thin film transistor and an organic light emitting device are formed in the pixel unit; wherein the organic light emitting device includes: the grid electrode of the switch thin film transistor is electrically connected with the scanning line, the source electrode of the switch thin film transistor is electrically connected with the data line, and the drain electrode of the switch thin film transistor is electrically connected with the grid electrode of the drive thin film transistor; the source electrode of the driving thin film transistor is electrically connected with the power line, and the drain electrode of the driving thin film transistor is electrically connected with the anode of the organic light-emitting device; it is characterized in that the preparation method is characterized in that,
the switching thin film transistor and/or the driving thin film transistor is the thin film transistor according to any one of claims 1 to 5.
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| CN 201220007606 CN202601619U (en) | 2012-01-09 | 2012-01-09 | Thin film transistor, array substrate and display |
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