CN118315396A - Photomultiplier and preparation method thereof - Google Patents
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Abstract
Description
技术领域Technical Field
本发明涉及半导体器件领域,特别涉及一种光电倍增管及其制备方法。The present invention relates to the field of semiconductor devices, and in particular to a photomultiplier tube and a preparation method thereof.
背景技术Background technique
目前基于单光子雪崩光电二极管结构的硅光电倍增管具有较高的灵敏度,可以实现单光子探测,但是光电探测效率还有待提高,并且像素间的串扰也是影响探测结果的重要原因。光子探测效率(PDE)是光电倍增管最重要的特性,定义为探测到的光子数与入射光子数的比值,用来衡量光电倍增管探测光功率的能力,PDE是器件填充因子FF、量子效率QE、雪崩概率PT三者的乘积,其中填充因子FF指的是有效光子探测面积与硅光电倍增管总面积的比值,填充因子FF的增大,可以有效提高光子探测效率。要获得较大的填充因子,需要在硅光电倍增管总面积不变的基础上,尽可能增大其有效光子探测的面积。然而,如果在平面结构上增大每个像素探测面积,会由于像素间距的减小,同时增大像素间的串扰。At present, silicon photomultiplier tubes based on single-photon avalanche photodiode structures have high sensitivity and can realize single-photon detection, but the photoelectric detection efficiency needs to be improved, and crosstalk between pixels is also an important reason affecting the detection results. Photon detection efficiency (PDE) is the most important characteristic of photomultiplier tubes. It is defined as the ratio of the number of detected photons to the number of incident photons. It is used to measure the ability of photomultiplier tubes to detect light power. PDE is the product of the device filling factor FF, quantum efficiency QE, and avalanche probability PT. The filling factor FF refers to the ratio of the effective photon detection area to the total area of the silicon photomultiplier tube. The increase of the filling factor FF can effectively improve the photon detection efficiency. To obtain a larger filling factor, it is necessary to increase the effective photon detection area of the silicon photomultiplier tube as much as possible on the basis of keeping the total area of the silicon photomultiplier tube unchanged. However, if the detection area of each pixel is increased in the planar structure, the crosstalk between pixels will increase at the same time due to the reduction of the pixel spacing.
为此,提出本发明。To this end, the present invention is proposed.
发明内容Summary of the invention
本发明的主要目的在于提供一种光电倍增管及其制备方法,以解决在平面结构上增大像素探测面积时导致像素间串扰增大的问题。The main purpose of the present invention is to provide a photomultiplier tube and a method for preparing the same, so as to solve the problem of increased crosstalk between pixels when increasing the pixel detection area on a planar structure.
为了实现以上目的,本发明提供了以下技术方案。In order to achieve the above objectives, the present invention provides the following technical solutions.
本发明的第一方面提供了一种光电倍增管,其包括半导体衬底,所述半导体衬底具有相对的上表面和下表面;A first aspect of the present invention provides a photomultiplier tube, comprising a semiconductor substrate having an upper surface and a lower surface opposite to each other;
在所述半导体衬底的上表面设有绝缘层;所述绝缘层的上表面设有多个间隔分布的P型掺杂半导体层,所述P型掺杂半导体层的上表面由下至上依次堆叠有N型掺杂半导体层和第一电极层;An insulating layer is provided on the upper surface of the semiconductor substrate; a plurality of P-type doped semiconductor layers are provided on the upper surface of the insulating layer and are distributed at intervals, and an N-type doped semiconductor layer and a first electrode layer are sequentially stacked on the upper surface of the P-type doped semiconductor layer from bottom to top;
在所述半导体衬底的下表面设置有第二电极层;A second electrode layer is provided on the lower surface of the semiconductor substrate;
多个所述P型掺杂半导体层与所述第二电极层一一对应地通过多个接触插塞电连接,所述接触插塞贯穿所述绝缘层和所述半导体衬底。The plurality of P-type doped semiconductor layers are electrically connected to the second electrode layer in a one-to-one correspondence via a plurality of contact plugs, and the contact plugs penetrate the insulating layer and the semiconductor substrate.
由此,本发明将P型掺杂半导体层和N型掺杂半导体层垂直堆叠,形成雪崩倍增区,又将两个电极层与雪崩倍增区设置为垂直堆叠,从而得到一种立体结构的光电倍增管,可以有效增大器件吸收光子区域的面积,既提高了光子吸收效率,又缩小了硅光电倍增管像素面积,有利于实现硅光电倍增管的高度集成。Therefore, the present invention vertically stacks the P-type doped semiconductor layer and the N-type doped semiconductor layer to form an avalanche multiplication region, and sets the two electrode layers and the avalanche multiplication region to be vertically stacked, thereby obtaining a photomultiplier tube with a three-dimensional structure, which can effectively increase the area of the device's photon absorption region, thereby improving the photon absorption efficiency and reducing the pixel area of the silicon photomultiplier tube, which is conducive to realizing the high integration of the silicon photomultiplier tube.
另外,由于第二电极层在半导体衬底的表面为连续的层,因此,各像素区的阳极只需要一个接触点即可共同引出,简化了布线难度。In addition, since the second electrode layer is a continuous layer on the surface of the semiconductor substrate, the anode of each pixel area only needs one contact point to be led out together, which simplifies the wiring difficulty.
在此基础上,光电倍增管的层结构或各层采用的材料还可以进一步改进,如下文列举。On this basis, the layer structure of the photomultiplier tube or the materials used in each layer can be further improved, as listed below.
进一步地,还包括覆盖所述第一电极层的钝化层。Furthermore, it also includes a passivation layer covering the first electrode layer.
进一步地,所述钝化层为氮化硅。Furthermore, the passivation layer is silicon nitride.
进一步地,所述绝缘层为氧化硅。Furthermore, the insulating layer is silicon oxide.
进一步地,所述半导体衬底为硅衬底。Furthermore, the semiconductor substrate is a silicon substrate.
进一步地,所述接触插塞为钨。Furthermore, the contact plug is made of tungsten.
进一步地,所述第一电极层和第二电极层为铝。Furthermore, the first electrode layer and the second electrode layer are made of aluminum.
本发明的第二方面提供了一种光电倍增管的制备方法,其包括:A second aspect of the present invention provides a method for preparing a photomultiplier tube, comprising:
提供衬底,所述衬底包括由下至上依次堆叠的半导体背层、埋氧层和半导体顶层;Providing a substrate, the substrate comprising a semiconductor back layer, a buried oxide layer and a semiconductor top layer stacked in sequence from bottom to top;
在所述半导体顶层中注入P型离子,进行刻蚀,形成多个间隔分布的P型掺杂半导体层;Injecting P-type ions into the semiconductor top layer and performing etching to form a plurality of P-type doped semiconductor layers distributed at intervals;
对所述P型掺杂半导体层的浅表层进行N型离子注入,使所述浅表层转换为N型掺杂半导体层;Performing N-type ion implantation on a superficial layer of the P-type doped semiconductor layer to convert the superficial layer into an N-type doped semiconductor layer;
形成多个贯穿所述半导体背层和埋氧层的接触孔,所述接触孔的一端与一个所述P型掺杂半导体层相接触;forming a plurality of contact holes penetrating the semiconductor back layer and the buried oxide layer, wherein one end of the contact hole contacts one of the P-type doped semiconductor layers;
在所述接触孔内填充导电材料,形成接触插塞;Filling the contact hole with a conductive material to form a contact plug;
在所述半导体背层表面和所述N型掺杂半导体层表面形成导电金属层,并对所述N型掺杂半导体层表面的导电金属层光刻,以使每个N型掺杂半导体层表面上的导电金属层分隔开,作为第一电极层。A conductive metal layer is formed on the surface of the semiconductor back layer and the surface of the N-type doped semiconductor layer, and the conductive metal layer on the surface of the N-type doped semiconductor layer is photolithographically processed to separate the conductive metal layer on the surface of each N-type doped semiconductor layer as a first electrode layer.
由此,本发明通过逐层形成的多个步骤得到了立体结构的光电倍增管,每个步骤的操作都简单且与现有工艺兼容,因此,制备方法整体流程简单,生产效率高。Thus, the present invention obtains a three-dimensional photomultiplier tube through multiple steps of layer-by-layer formation, and the operation of each step is simple and compatible with existing processes. Therefore, the overall preparation method is simple and has high production efficiency.
其中,半导体背层表面和N型掺杂半导体层表面的导电金属层可以同步形成,进一步提高效率。Among them, the conductive metal layer on the surface of the semiconductor back layer and the surface of the N-type doped semiconductor layer can be formed simultaneously, further improving the efficiency.
进一步地,还包括:在所述第一电极层的表面形成钝化层。Furthermore, the method further includes: forming a passivation layer on the surface of the first electrode layer.
进一步地,还包括:对所述钝化层进行光刻处理,使第一电极层的至少部分表面裸露。Furthermore, the method further comprises: performing photolithography on the passivation layer to expose at least a portion of the surface of the first electrode layer.
综上,与现有技术相比,本发明达到了以下技术效果:In summary, compared with the prior art, the present invention achieves the following technical effects:
(1)本发明的光电倍增管为立体结构,相对常规平面器件,增大器件光子吸收区域面积,提高器件光子吸收效率;(1) The photomultiplier tube of the present invention has a three-dimensional structure, which increases the photon absorption area of the device and improves the photon absorption efficiency of the device compared to conventional planar devices;
(2)本发明使用背部电极(即第二电极),减小了像素间间距,提高像素集成度;(2) The present invention uses a back electrode (i.e., the second electrode) to reduce the distance between pixels and improve pixel integration;
(3)本发明通过半导体衬底上的绝缘层结构使各个像素间充分隔离,减少了像素间串扰。(3) The present invention fully isolates each pixel through the insulating layer structure on the semiconductor substrate, thereby reducing crosstalk between pixels.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
通过阅读下文优选实施方式的详细描述,各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的,而并不认为是对本发明的限制。Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the following detailed description of the preferred embodiment.The drawings are only for the purpose of illustrating the preferred embodiments and are not to be construed as limiting the invention.
图1为本发明提供的一种光电倍增管的结构示意图;FIG1 is a schematic structural diagram of a photomultiplier tube provided by the present invention;
图2至图6为本发明提供的一种光电倍增管的制备方法中各步骤得到的结构示意图;2 to 6 are schematic diagrams of structures obtained in each step of a method for preparing a photomultiplier tube provided by the present invention;
附图标记:Reference numerals:
1-第二电极层,2-半导体背层,2’-半导体衬底,3-绝缘层,4-钝化层,1-second electrode layer, 2-semiconductor back layer, 2'-semiconductor substrate, 3-insulating layer, 4-passivation layer,
5-N型掺杂半导体层,6-第一电极层,7-P型掺杂半导体层,8-接触插塞。5-N-type doped semiconductor layer, 6-first electrode layer, 7-P-type doped semiconductor layer, 8-contact plug.
具体实施方式Detailed ways
以下,将参照附图来描述本公开的实施例。但是应该理解,这些描述只是示例性的,而并非要限制本公开的范围。此外,在以下说明中,省略了对公知结构和技术的描述,以避免不必要地混淆本公开的概念。Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.
在附图中示出了根据本公开实施例的各种结构示意图。这些图并非是按比例绘制的,其中为了清楚表达的目的,放大了某些细节,并且可能省略了某些细节。图中所示出的各种区域、层的形状以及它们之间的相对大小、位置关系仅是示例性的,实际中可能由于制造公差或技术限制而有所偏差,并且本领域技术人员根据实际所需可以另外设计具有不同形状、大小、相对位置的区域/层。Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may further design regions/layers with different shapes, sizes, and relative positions according to actual needs.
在本公开的上下文中,当将一层/元件称作位于另一层/元件“上”时,该层/元件可以直接位于该另一层/元件上,或者它们之间可以存在居中层/元件。另外,如果在一种朝向中一层/元件位于另一层/元件“上”,那么当调转朝向时,该层/元件可以位于该另一层/元件“下”。In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, the layer/element may be directly on the other layer/element or an intervening layer/element may exist between them. In addition, if a layer/element is "on" another layer/element in one orientation, the layer/element may be "below" the other layer/element when the orientation is reversed.
在平面结构上增大像素探测面积时,像素间的串扰会增大,进而影响光电探测结果。基于此,本发明提出了一种如图1所示的光电倍增管。When the pixel detection area is increased on a planar structure, the crosstalk between pixels will increase, thereby affecting the photoelectric detection result. Based on this, the present invention proposes a photomultiplier tube as shown in FIG1 .
结合图1介绍本发明的光电倍增管,其包括半导体衬底2’,半导体衬底2’具有相对的上表面和下表面。在半导体衬底2’的上表面设有绝缘层3。绝缘层3的上表面设有多个间隔分布的P型掺杂半导体层7,P型掺杂半导体层7的上表面由下至上依次堆叠有N型掺杂半导体层5和第一电极层6。在半导体衬底2’的下表面设置有第二电极层1。多个P型掺杂半导体层7与第二电极层1一一对应地通过多个接触插塞8电连接,接触插塞8贯穿绝缘层3和半导体衬底2’。The photomultiplier tube of the present invention is introduced in conjunction with FIG1, which includes a semiconductor substrate 2', and the semiconductor substrate 2' has a relative upper surface and a lower surface. An insulating layer 3 is provided on the upper surface of the semiconductor substrate 2'. A plurality of P-type doped semiconductor layers 7 are provided on the upper surface of the insulating layer 3, and an N-type doped semiconductor layer 5 and a first electrode layer 6 are stacked on the upper surface of the P-type doped semiconductor layer 7 from bottom to top. A second electrode layer 1 is provided on the lower surface of the semiconductor substrate 2'. The plurality of P-type doped semiconductor layers 7 are electrically connected to the second electrode layer 1 in a one-to-one correspondence through a plurality of contact plugs 8, and the contact plugs 8 penetrate the insulating layer 3 and the semiconductor substrate 2'.
在上述光电倍增管中,一方面,多个P型掺杂半导体层7和N型掺杂半导体层5垂直堆叠形成雪崩倍增区。由于各个P型掺杂半导体层7在绝缘层3上是间隔设置的,因此相应的雪崩倍增区也是间隔设置,使得各像素间充分隔离,减少像素间串扰。另一方面,本发明的第二电极层1设置在衬底的下表面(即背面),可以减小像素间间距,提高像素集成度。又一方面,各掺杂层与两个电极层均为垂直堆叠,这种立体结构可以有效增大器件吸收光子区域的面积,既提高了光子吸收效率,又缩小了硅光电倍增管像素面积,有利于实现硅光电倍增管的高度集成。In the above-mentioned photomultiplier tube, on the one hand, a plurality of P-type doped semiconductor layers 7 and N-type doped semiconductor layers 5 are vertically stacked to form an avalanche multiplication zone. Since each P-type doped semiconductor layer 7 is arranged at intervals on the insulating layer 3, the corresponding avalanche multiplication zone is also arranged at intervals, so that each pixel is fully isolated and the crosstalk between pixels is reduced. On the other hand, the second electrode layer 1 of the present invention is arranged on the lower surface (i.e., the back side) of the substrate, which can reduce the spacing between pixels and improve the pixel integration. On the other hand, each doped layer and the two electrode layers are vertically stacked. This three-dimensional structure can effectively increase the area of the device's photon absorption region, which not only improves the photon absorption efficiency, but also reduces the pixel area of the silicon photomultiplier tube, which is conducive to achieving a high degree of integration of the silicon photomultiplier tube.
又一方面,由于第二电极层1在半导体衬底2’的表面为连续的层,因此,各像素区的阳极只需要一个接触点即可共同引出,简化了布线难度。On the other hand, since the second electrode layer 1 is a continuous layer on the surface of the semiconductor substrate 2', the anode of each pixel area only needs one contact point to be led out together, which simplifies the wiring difficulty.
本发明提供的以上光电倍增管中,半导体衬底2’可以是本领域技术人员熟知的任何用以承载半导体集成电路组成元件的底材,例如绝缘体上硅(silicon-on-insulator,SOI)、体硅(bulk silicon)、碳化硅、锗、锗硅、砷化镓或者绝缘体上锗等,相应的顶层半导体材料为硅、锗、锗硅或砷化镓等。衬底2’还可以是多层半导体材料的堆叠结构。衬底1还可以是经过掺杂的。In the above photomultiplier tube provided by the present invention, the semiconductor substrate 2' can be any substrate for carrying semiconductor integrated circuit components known to those skilled in the art, such as silicon-on-insulator (SOI), bulk silicon, silicon carbide, germanium, silicon germanium, gallium arsenide or germanium on insulator, etc., and the corresponding top semiconductor material is silicon, germanium, silicon germanium or gallium arsenide, etc. The substrate 2' can also be a stacked structure of multiple layers of semiconductor materials. The substrate 1 can also be doped.
以上光电倍增管中,还可以还包括覆盖在第一电极层6的表面设置钝化层4,以起到隔离保护的作用。通常钝化层4上设置有一个开口,以便将开口处裸露的第一电极层6引出连接至电源。钝化层4的材料可以是任意的绝缘材料。在一些实施方式中,钝化层为氮化硅。In the above photomultiplier tube, a passivation layer 4 may also be provided on the surface of the first electrode layer 6 to provide isolation and protection. Usually, an opening is provided on the passivation layer 4 so that the first electrode layer 6 exposed at the opening can be connected to a power source. The material of the passivation layer 4 can be any insulating material. In some embodiments, the passivation layer is silicon nitride.
P型掺杂半导体层7和N型掺杂半导体层5的掺杂浓度可以根据实际需要适当调整。The doping concentrations of the P-type doped semiconductor layer 7 and the N-type doped semiconductor layer 5 can be appropriately adjusted according to actual needs.
绝缘层3可以是氧化硅、氮氧化硅、氮氧化物等材料。在一些实施方式中,绝缘层采用氧化硅。接触插塞、第一电极层和第二电极层可以各自独立地选择钨、铝、银、钴、镍等导电金属材料。在一些实施方式中,接触插塞采用钨,第一电极层和第二电极层采用铝。The insulating layer 3 may be made of silicon oxide, silicon oxynitride, oxynitride, and the like. In some embodiments, the insulating layer is made of silicon oxide. The contact plug, the first electrode layer, and the second electrode layer may each independently be made of a conductive metal material such as tungsten, aluminum, silver, cobalt, and nickel. In some embodiments, the contact plug is made of tungsten, and the first electrode layer and the second electrode layer are made of aluminum.
本发明还提供了制备图1的光电倍增管的方法,主要包括以下步骤(参照图2至6介绍)。The present invention also provides a method for preparing the photomultiplier tube of FIG. 1 , which mainly includes the following steps (introduced with reference to FIGS. 2 to 6 ).
首先,提供衬底,衬底包括由下至上依次堆叠的半导体背层2、埋氧层(即绝缘层3)和半导体顶层。这种衬底可以直接用SOI等现有衬底,或者在单层半导体表面逐步沉积氧化物层、半导体层而得到。First, a substrate is provided, which includes a semiconductor back layer 2, a buried oxide layer (i.e., an insulating layer 3) and a semiconductor top layer stacked in sequence from bottom to top. This substrate can be directly made of an existing substrate such as SOI, or can be obtained by gradually depositing an oxide layer and a semiconductor layer on the surface of a single-layer semiconductor.
接下来在衬底的半导体顶层中注入P型离子,进行刻蚀,形成多个间隔分布的P型掺杂半导体层7,如图2所示。Next, P-type ions are implanted into the semiconductor top layer of the substrate and etched to form a plurality of P-type doped semiconductor layers 7 that are spaced apart from each other, as shown in FIG. 2 .
然后对每个P型掺杂半导体层7的浅表层进行N型离子注入,使浅表层转换为N型掺杂半导体层5,为了使其能转为区别更大的N区,通常需要重掺杂,如图3所示。Then, N-type ions are implanted into the shallow layer of each P-type doped semiconductor layer 7 to convert the shallow layer into an N-type doped semiconductor layer 5. In order to convert it into an N region with greater distinction, heavy doping is usually required, as shown in FIG. 3 .
接下来形成多个贯穿半导体背层2和绝缘层3的接触孔,接触孔的一端与一个P型掺杂半导体层7相接触,另一端可以与之后在背层形成的电极层连接。形成接触孔时通常经过掩膜、光刻、去除掩膜等步骤。Next, a plurality of contact holes are formed through the semiconductor back layer 2 and the insulating layer 3. One end of the contact hole contacts a P-type doped semiconductor layer 7, and the other end can be connected to an electrode layer formed later on the back layer. The contact holes are usually formed through steps such as masking, photolithography, and mask removal.
然后在接触孔内填充导电材料,形成接触插塞8,如图4所示。Then, a conductive material is filled in the contact hole to form a contact plug 8 , as shown in FIG. 4 .
之后在半导体背层2表面和N型掺杂半导体层5表面形成导电金属层,可以同步形成。再对N型掺杂半导体层5表面的导电金属层光刻,以使每个N型掺杂半导体层表面上的导电金属层分隔开,作为第一电极层6,如图5所示,半导体背层表面的导电金属层作为第二电极层1。Afterwards, a conductive metal layer is formed on the surface of the semiconductor back layer 2 and the surface of the N-type doped semiconductor layer 5, which can be formed simultaneously. The conductive metal layer on the surface of the N-type doped semiconductor layer 5 is then photolithographically processed to separate the conductive metal layer on the surface of each N-type doped semiconductor layer as the first electrode layer 6, as shown in FIG5, and the conductive metal layer on the surface of the semiconductor back layer is used as the second electrode layer 1.
完成以上步骤后,如图6所示,还可以在第一电极层6的表面形成钝化层4,通常再对钝化层4进行光刻处理,使第一电极层6的至少部分表面裸露,以便将电极连接至电源。After completing the above steps, as shown in FIG. 6 , a passivation layer 4 may be formed on the surface of the first electrode layer 6 , and the passivation layer 4 is usually photolithographically processed to expose at least part of the surface of the first electrode layer 6 so as to connect the electrode to a power source.
由此,本发明通过逐层形成的多个步骤得到了立体结构的光电倍增管,每个步骤的操作都简单且与现有工艺兼容,因此,制备方法整体流程简单,生产效率高。Thus, the present invention obtains a three-dimensional photomultiplier tube through multiple steps of layer-by-layer formation, and the operation of each step is simple and compatible with existing processes. Therefore, the overall preparation method is simple and has high production efficiency.
以上对本公开的实施例进行了描述。但是,这些实施例仅仅是为了说明的目的,而并非为了限制本公开的范围。本公开的范围由所附权利要求及其等价物限定。不脱离本公开的范围,本领域技术人员可以做出多种替代和修改,这些替代和修改都应落在本公开的范围之内。The embodiments of the present disclosure are described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, a person skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.
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