CN116525734A - Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode - Google Patents

Abstract

The invention discloses a light-emitting diode epitaxial wafer and a preparation method thereof, wherein the light-emitting diode epitaxial wafer comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a first insertion layer, a multiple quantum well layer, a second insertion layer, an electron blocking layer and a P-type semiconductor layer which are sequentially laminated on the substrate; the first insertion layer is a GaN layer doped with Sc, and the second insertion layer is a GaN layer doped with Lu. The invention can lighten the piezoelectric polarization of the multi-quantum well layer, balance electrons and holes in the multi-quantum well layer and improve the luminous efficiency of the light-emitting diode.

Description

Light-emitting diode epitaxial wafer and preparation method thereof, light-emitting diode

technical field

The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof, and a light-emitting diode.

Background technique

At present, GaN-based light-emitting diodes have been widely used in backlight, lighting, landscape lights and other fields, attracting more and more people's attention.

In light-emitting diodes, the multi-quantum well layer as the active region is a very important structure for epitaxial growth. The multi-quantum well layer is generally a periodic structure composed of repeated stacks of InGaN quantum well layers and GaN quantum barrier layers. However, due to In atoms Larger, so the multiple quantum wells are subjected to compressive stress, and there is serious piezoelectric polarization in the multiple quantum wells, which leads to the inclination of the energy bands of the multiple quantum wells, so that electrons and holes will cause serious spatial separation when passing through the quantum well region, reducing the The luminous efficiency of the light-emitting diode is reduced, and because the In atoms are relatively large, the In atoms effectively incorporated into the GaN lattice are limited, which also affects the luminous efficiency of the light-emitting diode;

In addition, due to the difficulty in the activation of Mg, the hole concentration is low, and the hole mobility itself is slower than that of electrons. Therefore, in the multi-quantum well layer, the imbalance between electrons and holes is also one of the key reasons that limit the improvement of the luminous efficiency of light-emitting diodes. one.

Contents of the invention

The technical problem to be solved by the present invention is to provide a light-emitting diode epitaxial wafer, reduce the piezoelectric polarization of the multi-quantum well layer, balance electrons and holes in the multi-quantum well layer, and improve the luminous efficiency of the light-emitting diode epitaxial wafer.

The technical problem to be solved by the present invention is also to provide a method for preparing a light-emitting diode epitaxial wafer, which has a simple process and high luminous efficiency of the prepared light-emitting diode epitaxial wafer.

In order to achieve the above-mentioned technical effects, the present invention provides a light-emitting diode epitaxial wafer, which includes a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, and a multilayer stacked on the substrate in sequence. a quantum well layer, a second insertion layer, an electron blocking layer and a p-type GaN layer;

The first insertion layer is a GaN layer doped with Sc, and the second insertion layer is a GaN layer doped with Lu.

As an improvement of the above technical solution, the thickness of the first insertion layer is 20-200 nm; the thickness of the second insertion layer is 20-200 nm.

As an improvement of the above technical solution, the thickness ratio of the first insertion layer to the second insertion layer is 1:(1-2).

As an improvement of the above technical solution, the doping concentration of Sc in the first insertion layer is 1×10 ³ -1×10 ⁶ cm ^-3 ; the doping concentration of Lu in the second insertion layer is 1×10 ³ -1×10 ⁶ cm ^-3 .

As an improvement of the above technical solution, the doping concentration of Sc in the first insertion layer is 5×10 ⁴ -5×10 ⁵ cm ^-3 ; the doping concentration of Si in the N-type GaN layer is 5×10 ¹⁷ -1×10 ¹⁸ cm ^-3 .

As an improvement of the above technical solution, the doping concentration of Lu in the second insertion layer is 1×10 ⁵ -1×10 ⁶ cm ^-3 ;

The electron blocking layer is an Al _a Ga _1-a N layer, wherein a is 0.2-0.4; the thickness of the electron blocking layer is 30-50 nm.

Correspondingly, the present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which is used to prepare the above-mentioned light-emitting diode epitaxial wafer, including:

providing a substrate on which a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, a second insertion layer, an electron blocking layer, and a P-type GaN layer are sequentially grown ;

Wherein, the first insertion layer is a GaN layer doped with Sc, and the second insertion layer is a GaN layer doped with Lu.

As an improvement of the above technical solution, the growth temperature of the first insertion layer is 900-1100° C., and the growth pressure is 100-300 Torr;

The growth temperature of the second insertion layer is 850-950° C., and the growth pressure is 100-300 Torr.

As an improvement of the above technical solution, the growth temperature of the N-type GaN layer is 1100-1150° C., and the growth pressure is 100-500 Torr;

The growth temperature of the electron blocking layer is 900-1100° C., and the growth pressure is 100-500 Torr.

Correspondingly, the present invention also discloses a light-emitting diode, including the above-mentioned light-emitting diode epitaxial wafer.

Implementing the embodiment of the present invention has the following beneficial effects:

1. In this application, the first insertion layer and the second insertion layer are grown respectively before and after the multi-quantum well layer. Both Lu element doping and Sc element doping can increase the lattice constant of the supercell, thereby providing tension for the multi-quantum well layer. stress. Under the action of tensile stress, the multi-quantum well layer can incorporate more In atoms to improve the lattice quality of the quantum well layer; correspondingly, the compressive stress of the multi-quantum well layer is reduced, which weakens the piezoelectric polarization effect and increases The overlapping of wave functions of electrons and holes in the multi-quantum well layer, the first insertion layer and the second insertion layer are conducive to improving the luminous efficiency of light-emitting diodes; in addition, the static dielectric constant of GaN is improved after doping with Lu and Sc elements, The high-voltage resistance characteristic of the system is enhanced, thereby enhancing the antistatic ability of the light-emitting diode.

2. The lattice matching degree between the first insertion layer and the N-type GaN layer is higher, so the doping concentration of Si in the N-type GaN layer can be reduced, which is beneficial to improve the lattice quality and increase the luminous efficiency.

3. The second insertion layer of the present application also has a certain electron blocking effect, so the thickness of the electron blocking layer and the Al component in the electron blocking layer can be reduced, correspondingly, the potential barrier peak caused by the electron blocking layer is reduced, The probability of holes entering the multi-quantum well layer is further increased, and the luminous efficiency is improved.

Description of drawings

FIG. 1 is a schematic structural view of a light-emitting diode epitaxial wafer provided by an embodiment of the present invention;

Fig. 2 is a flowchart of a method for preparing a light-emitting diode epitaxial wafer provided by an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments.

As shown in FIG. 1, an embodiment of the present invention provides a light-emitting diode epitaxial wafer, including a substrate 1 and a nucleation layer 2, an intrinsic GaN layer 3, and an N-type GaN layer 4 sequentially stacked on the substrate 1. , the first insertion layer 5, the multiple quantum well layer 6, the second insertion layer 7, the electron blocking layer 8 and the P-type GaN layer 9;

Wherein, the first insertion layer 5 is a GaN layer doped with Sc; the second insertion layer 7 is a GaN layer doped with Lu.

Since the atomic radius of Lu and Sc is greater than that of Ga, the lattice constant of the supercell increases after doping with Lu and Sc, which provides tensile stress for the multiple quantum wells. Under the action of tensile stress, the multi-quantum well layer can incorporate more In atoms, which greatly increases the incorporation of In components in the multi-quantum well layer, thereby increasing the luminous efficiency; and due to the addition of Lu and Sc elements, more The reduction of quantum well compressive stress weakens the piezoelectric polarization of multiple quantum wells, thereby increasing the overlap of electron and hole wave functions in multiple quantum well layers, and improving the luminous efficiency; the static medium of GaN after doping with Lu and Sc elements The electrical constants are all improved, and the Lu-doped and Sc-doped GaN layers can also improve the high-voltage resistance characteristics of the system, thereby improving the antistatic ability of the light-emitting diode.

Among them, the first insertion layer 5 is grown on the N-type semiconductor layer 4, and the doping of Sc element will cause the band gap to become larger, thereby forming a high-energy electron "barrier" in front of the quantum well, and slowing down the electron migration rate. , which is conducive to the balance of electron-hole pairs in the multiple quantum wells and increases the luminous efficiency;

The thickness of the first insertion layer 5 is 20-200 nm. If the growth thickness is less than 20 nm, the effect of the first insertion layer 5 is small. If the growth thickness is greater than 200 nm, resources will be wasted. Exemplarily, the thickness of the first insertion layer 5 is 20nm, 25nm, 50nm, 75nm, 100nm, 150nm or 200nm, but not limited thereto.

The doping concentration of Sc is 1×10 ³ -1×10 ⁶ cm ^-3 . If the doping concentration is less than 1×10 ³ cm ^-3 , it cannot slow down the electron mobility. If the doping concentration is more than 1×10 ⁶ cm ^-3 , it will reduce the lattice quality. Exemplarily, the Sc doping concentration of the first insertion layer 5 is 1×10 ³ cm ^-3 , 1×10 ⁴ cm ^-3 , 1×10 ⁵ cm ^-3 or 1×10 ⁶ cm ^-3 , but not limited to this.

The second insertion layer 7 is grown on the multi-quantum well layer 6. After the doping of Lu element, shallow-level impurities are induced, so that the conduction band shifts to the low-energy direction, and the valence band moves up, thereby facilitating the injection of holes and alleviating Solved the problem of insufficient holes in multiple quantum wells and increased luminous efficiency;

The thickness of the second insertion layer 7 is 20-200 nm. If the growth thickness is less than 20 nm, the effect of the second insertion layer 7 is small. If the growth thickness is greater than 200 nm, resources will be wasted. Exemplarily, the thickness of the second insertion layer 7 is 20nm, 25nm, 50nm, 75nm, 100nm, 150nm or 200nm, but not limited thereto.

The doping concentration of Lu is 1×10 ³ -1×10 ⁶ cm ^-3 , if the doping concentration is less than 1×10 ³ cm ^-3 , it is not conducive to hole injection into the multi-quantum well layer, and if the doping concentration is more than 1×10 ⁶ cm ^-3 , it will reduce the lattice quality. Exemplarily, the Lu doping concentration of the second insertion layer 7 is 1×10 ³ cm ^-3 , 1×10 ⁴ cm ^-3 , 1×10 ⁵ cm ^-3 or 1×10 ⁶ cm ^-3 , but not limited to this.

Preferably, the thickness ratio of the first insertion layer 5 and the second insertion layer 7 is 1:(1-2), the thickness ratio of the first insertion layer 5 and the second insertion layer 7 is controlled within this range, the first insertion layer The blocking of electrons by the layer 5 and the injection of holes by the second insertion layer 7 work together to facilitate the balance of electrons and holes in the multi-quantum well layer and further improve the luminous efficiency. Exemplarily, the thickness ratio of the first insertion layer 5 to the second insertion layer 7 is 1:1, 1:1.4, 1:1.5, 1:1.8 or 1:2, but not limited thereto.

Further, the doping concentration of Sc in the first insertion layer 5 is 5×10 ⁴ -5×10 ⁵ cm ^-3 , and the doping concentration of Si in the N-type GaN layer 4 is 5×10 ^{17 -} 1×10 ^{18cm -3} . Under the doping concentration of Sc, the lattice matching degree between the N-type GaN layer 4 and the first insertion layer 5 is higher, so the doping concentration of Si in the N-type GaN layer can be further reduced.

The doping concentration of Lu in the second insertion layer is 1×10 ⁵ -1×10 ⁶ cm ^-3 , the electron blocking layer is an Al _a Ga _1-a N layer, wherein a is 0.2-0.4; the electron The thickness of the barrier layer is 30-50 nm. The second insertion layer 7 of the present application also has a certain function of blocking electrons, so the structure of the electron blocking layer 8 can be simplified, the Al composition in the electron blocking layer 8 and the thickness of the electron blocking layer 8 can be reduced. Correspondingly, the potential barrier peak caused by the electron blocking layer 8 is reduced, the probability of holes entering the multi-quantum well layer is further optimized, and the luminous efficiency is further improved.

In addition, the thickness of the nucleation layer 2 is 20-100nm;

The thickness of the intrinsic GaN layer 3 is 0.3-2 μm;

The thickness of the N-type GaN layer 4 is 1-3 μm;

The multi-quantum well layer 6 includes periodically stacked quantum well layers and quantum barrier layers, the stacking period is 3-15, the thickness of the quantum well layer is 2-5nm, and the thickness of the quantum barrier layer is 8-12nm .

The thickness of the P-type GaN layer 9 is 200-300 nm, and the doping concentration of the P-type GaN layer 9 is 5×10 ¹⁷ -1×10 ²⁰ cm ⁻³ .

Correspondingly, as shown in Figure 2, the present invention also provides a method for preparing a light-emitting diode epitaxial wafer, comprising the following steps:

S101 provides a substrate

Select a sapphire substrate, control the temperature of the reaction chamber at 1000-1200°C, and the pressure at 200-600Torr, perform high-temperature annealing on the sapphire substrate for 5-8 minutes in an _H2 atmosphere, and clean the particles and oxides on the surface of the sapphire substrate .

S102 growth nucleation layer

The material of the nucleation layer may be AlGaN or AlN.

Control the temperature of the reaction chamber at 500-700°C, the pressure at 200-400Torr, feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, feed TMGa as the Ga source, and feed TMAl as the Al source.

S103 growth intrinsic GaN layer

The temperature of the reaction chamber is controlled at 1100-1150 ° C, the pressure is 100-500 Torr, NH ₃ is fed as N source, N ₂ and H ₂ are used as carrier gas, and TMGa is fed as Ga source.

S104 grows N-type GaN layer

The temperature of the reaction chamber is controlled at 1100-1150°C, the pressure is 100-500Torr, NH ₃ is fed as N source, N ₂ and H ₂ are used as carrier gas, TMGa is fed as Ga source, and SiH ₄ is fed as doping source.

S105 grow the first insertion layer

Control the temperature of the reaction chamber at 900-1100°C, the pressure at 100-300Torr, feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, and the volume ratio of N ₂ and H ₂ is 1:(1-5), TMGa is introduced as a Ga source, and Sc(TMHD) ₃ is introduced as a dopant source.

S106 growth of multiple quantum well layers

Control the temperature of the reaction chamber at 700-800°C, the pressure at 100-500Torr, feed NH ₃ as the N source, N ₂ as the carrier gas, feed TEGa as the Ga source, feed TMIn as the In source, and grow the quantum well layer;

Control the temperature of the reaction chamber at 800-900°C, keep the pressure constant, feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, and feed TEGa as the Ga source to grow the quantum barrier layer;

The quantum well layer and the quantum barrier layer are periodically grown by stacking and stacking repeatedly.

S107 grow the second insertion layer

Control the temperature of the reaction chamber to be 850-950°C, the pressure to be 100-300Torr, feed _NH3 as N source, _N2 and _H2 as carrier gas, the volume ratio of _N2 and _H2 is 1:(1-5), TMGa is introduced as the Ga source, and Lu(TMHD) ₃ is introduced as the dopant source.

S108 growth electron blocking layer

The temperature of the reaction chamber is controlled at 900-1100°C, the pressure is 100-500Torr, NH ₃ is fed as N source, N ₂ and H ₂ are used as carrier gas, TMGa is fed as Ga source, and TMAl is fed as Al source.

S109 grows P-type GaN layer

The temperature of the reaction chamber is controlled to be 800-1000° C., the pressure is 100-300 Torr, NH ₃ is fed as N source, TMGa is fed as Ga source, and CP ₂ Mg is fed as dopant source.

The present invention is further described below with specific examples.

In the embodiment of the present invention, Veeco C4 MOCVD (Metal Organic Chemical VaporDeposition, Metal Organic Compound Chemical Vapor Deposition) equipment is used to realize the growth of epitaxial wafers. Use high-purity _H2 and/or high-purity _N2 as carrier gas, high-purity _NH3 as N source, TMGa (trimethylgallium) and/or TEGa (triethylgallium) as gallium source, TMAl (trimethylgallium) Aluminum) as aluminum source, TMIn (trimethyl indium) as indium source, SiH ₄ (silane) as N-type dopant, CP ₂ Mg (dimagnesium) as P-type dopant, Sc(TMHD) ₃ as Sc doping source, Lu(TMHD) ₃ as Lu doping source, the above selections are exemplary descriptions, not limited to the above list.

Example 1

This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, and a second layer stacked sequentially on the substrate. Insertion layer, electron blocking layer and P-type GaN layer;

Wherein, the substrate is a sapphire substrate;

The nucleation layer is an AlGaN layer with a thickness of 30nm;

The thickness of the intrinsic GaN layer is 600nm;

The doping concentration of Si in the N-type GaN layer is 7×10 ¹⁸ cm ^-3 , and the thickness is 2 μm;

The multi-quantum well layer is alternately stacked quantum well layers and quantum barrier layers, the quantum well layer is an InGaN layer with a thickness of 3nm, the quantum barrier layer is a GaN layer with a thickness of 10nm, and the number of stacking cycles is 10;

The first insertion layer is a GaN layer doped with Sc, the doping concentration of Sc is 1×10 ⁴ cm ^-3 , and the thickness is 80nm;

The second insertion layer is a GaN layer doped with Lu, the doping concentration of Lu is 1×10 ⁴ cm ^-3 , and the thickness is 50nm;

The electron blocking layer is an Al _0.45 Ga _0.55 N layer with a thickness of 100nm;

The doping concentration of Mg in the P-type GaN layer is 5×10 ¹⁸ cm ^-3 , and the thickness is 4 nm.

The method for preparing the above-mentioned light-emitting diode epitaxial wafer includes the following steps:

S101 provides a substrate

Select a sapphire substrate, control the temperature of the reaction chamber at 1000°C, and the pressure at 400Torr, and perform high-temperature annealing on the sapphire substrate for 6 minutes in an H ₂ atmosphere.

S102 growth nucleation layer

The temperature of the reaction chamber is controlled at 500 ° C, the pressure is 200 Torr, NH ₃ is fed as the N source, N ₂ and H ₂ are used as the carrier gas, TMGa is fed as the Ga source, and TMAl is fed as the Al source.

S103 growth intrinsic GaN layer

The temperature of the reaction chamber is controlled at 1100 ° C, the pressure is 200 Torr, NH ₃ is fed as the N source, N ₂ and H ₂ are used as the carrier gas, and TMGa is fed as the Ga source.

S104 grow N-type semiconductor layer

The temperature of the reaction chamber is controlled at 1150°C, the pressure is 300 Torr, NH ₃ is introduced as the N source, N ₂ and H ₂ are used as the carrier gas, TMGa is introduced as the Ga source, and SiH ₄ is introduced as the dopant source.

S105 grow the first insertion layer

Control the temperature of the reaction chamber at 1000°C, the pressure at 200 Torr, feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, the volume ratio of N ₂ and H ₂ is 1:2, feed TMGa as the Ga source, and pass into Sc(TMHD) ₃ as doping source.

S106 growth of multiple quantum well layers

Control the reaction chamber temperature to 700°C, pressure to 200Torr, feed NH ₃ as N source, N ₂ as carrier gas, feed TEGa as Ga source, feed TMIn as In source, and grow quantum well layer;

Control the temperature of the reaction chamber at 800°C, keep the pressure constant, feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, and feed TEGa as the Ga source to grow the quantum barrier layer;

The quantum well layer and the quantum barrier layer are periodically grown by stacking and stacking repeatedly.

S107 grow the second insertion layer

Control the temperature of the reaction chamber at 900°C, the pressure at 200 Torr, feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, the volume ratio of N ₂ and H ₂ is 1:2, feed TMGa as the Ga source, pass Inject Lu(TMHD) ₃ as dopant source.

S108 growth electron blocking layer

The temperature of the reaction chamber is controlled at 1000°C, the pressure is 200 Torr, NH ₃ is fed as N source, N ₂ and H ₂ are used as carrier gas, TMGa is fed as Ga source, and TMAl is fed as Al source.

S109 grows P-type GaN layer

The temperature of the reaction chamber is controlled at 1000° C., the pressure is 200 Torr, NH ₃ is fed as N source, TMGa is fed as Ga source, and CP ₂ Mg is fed as dopant source.

Example 2

This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, and a second layer stacked sequentially on the substrate. Insertion layer, electron blocking layer and P-type GaN layer;

Wherein, the substrate is a sapphire substrate;

The nucleation layer is an AlGaN layer with a thickness of 30nm;

The thickness of the intrinsic GaN layer is 600nm;

The doping concentration of Si in the N-type GaN layer is 7×10 ¹⁸ cm ^-3 , and the thickness is 2 μm;

The multi-quantum well layer is alternately stacked quantum well layers and quantum barrier layers, the quantum well layer is an InGaN layer with a thickness of 3nm, the quantum barrier layer is a GaN layer with a thickness of 10nm, and the number of stacking cycles is 10;

The first insertion layer is a GaN layer doped with Sc, the doping concentration of Sc is 1×10 ⁴ cm ^-3 , and the thickness is 50nm;

The second insertion layer is a GaN layer doped with Lu, the doping concentration of Lu is 1×10 ⁴ cm ^-3 , and the thickness is 50nm;

The electron blocking layer is an Al _0.45 Ga _0.55 N layer with a thickness of 100nm;

The doping concentration of Mg in the P-type GaN layer is 5×10 ¹⁸ cm ^-3 , and the thickness is 4 nm.

The preparation method of the above light-emitting diode epitaxial wafer is the same as that of Embodiment 1.

Example 3

This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, and a second layer stacked sequentially on the substrate. Insertion layer, electron blocking layer and P-type GaN layer;

Wherein, the substrate is a sapphire substrate;

The nucleation layer is an AlGaN layer with a thickness of 30nm;

The thickness of the intrinsic GaN layer is 600nm;

The doping concentration of Si in the N-type GaN layer is 7×10 ¹⁷ cm ^-3 , and the thickness is 2 μm;

The multi-quantum well layer is alternately stacked quantum well layers and quantum barrier layers, the quantum well layer is an InGaN layer with a thickness of 3nm, the quantum barrier layer is a GaN layer with a thickness of 10nm, and the number of stacking cycles is 10;

The first insertion layer is a GaN layer doped with Sc, the doping concentration of Sc is 1×10 ⁵ cm ^-3 , and the thickness is 50nm;

The second insertion layer is a GaN layer doped with Lu, the doping concentration of Lu is 1×10 ⁴ cm ^-3 , and the thickness is 50nm;

The electron blocking layer is an Al _0.45 Ga _0.55 N layer with a thickness of 100nm;

The doping concentration of Mg in the P-type GaN layer is 5×10 ¹⁸ cm ^-3 , and the thickness is 4 nm.

The preparation method of the above light-emitting diode epitaxial wafer is the same as that of Embodiment 1.

Example 4

This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, and a second layer stacked sequentially on the substrate. Insertion layer, electron blocking layer and P-type GaN layer;

Wherein, the substrate is a sapphire substrate;

The nucleation layer is an AlGaN layer with a thickness of 30nm;

The thickness of the intrinsic GaN layer is 600nm;

The doping concentration of Si in the N-type GaN layer is 7×10 ¹⁸ cm ^-3 , and the thickness is 2 μm;

The multi-quantum well layer is alternately stacked quantum well layers and quantum barrier layers, the quantum well layer is an InGaN layer with a thickness of 3nm, the quantum barrier layer is a GaN layer with a thickness of 10nm, and the number of stacking cycles is 10;

The first insertion layer is a GaN layer doped with Sc, the doping concentration of Sc is 1×10 ⁴ cm ^-3 , and the thickness is 50nm;

The second insertion layer is a GaN layer doped with Lu, the doping concentration of Lu is 5×10 ⁵ cm ^-3 , and the thickness is 50nm;

The electron blocking layer is an Al _0.3 Ga _0.7 N layer with a thickness of 40nm;

The doping concentration of Mg in the P-type GaN layer is 5×10 ¹⁸ cm ^-3 , and the thickness is 4 nm.

The preparation method of the above light-emitting diode epitaxial wafer is the same as that of Embodiment 1.

Example 5

This embodiment provides a light-emitting diode epitaxial wafer, including a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, and a second layer stacked sequentially on the substrate. Insertion layer, electron blocking layer and P-type GaN layer;

Wherein, the substrate is a sapphire substrate;

The nucleation layer is an AlGaN layer with a thickness of 30nm;

The thickness of the intrinsic GaN layer is 600nm;

The doping concentration of Si in the N-type GaN layer is 7×10 ¹⁷ cm ^-3 , and the thickness is 2 μm;

The multi-quantum well layer is alternately stacked quantum well layers and quantum barrier layers, the quantum well layer is an InGaN layer with a thickness of 3nm, the quantum barrier layer is a GaN layer with a thickness of 10nm, and the number of stacking cycles is 10;

The first insertion layer is a GaN layer doped with Sc, the doping concentration of Sc is 1×10 ⁵ cm ^-3 , and the thickness is 50nm;

The second insertion layer is a GaN layer doped with Lu, the doping concentration of Lu is 5×10 ⁵ cm ^-3 , and the thickness is 50nm;

The electron blocking layer is an Al _0.3 Ga _0.7 N layer with a thickness of 40nm;

The doping concentration of Mg in the P-type GaN layer is 5×10 ¹⁸ cm ^-3 , and the thickness is 4 nm.

The preparation method of the above light-emitting diode epitaxial wafer is the same as that of Embodiment 1.

Comparative example 1

This comparative example provides a light emitting diode epitaxial wafer, which differs from the embodiment 1 in that it does not include the first insertion layer and the second insertion layer. Correspondingly, in the preparation method, the preparation steps of the above two layers are also not included, and the rest are the same as in Example 1.

Comparative example 2

This comparative example provides a light emitting diode epitaxial wafer, which is different from the first embodiment in that the first insertion layer is not included. Correspondingly, in the preparation method, the preparation step of the first insertion layer is also not included, and the rest are the same as in Example 1.

Comparative example 3

This comparative example provides a light emitting diode epitaxial wafer, which is different from the embodiment 1 in that the second insertion layer is not included. Correspondingly, in the preparation method, the preparation step of the second insertion layer is also not included, and the rest are the same as in Example 1.

Performance Testing:

The light-emitting diode epitaxial wafers prepared in Examples 1-5 and Comparative Examples 1-3 were made into 10mil×24mil chips for photoelectric performance testing,

(1) Brightness: On the same LED point measuring machine, test the brightness under the condition of driving current 200mA;

(2) Anti-static ability: On the same LED point measuring machine, the anti-static ability of the sample is tested by 8KV pulse.

The test results are shown in Table 1.

Table 1 Photoelectric performance test results of light-emitting diode epitaxial wafers

Brightness (mW) 8kV antistatic pass rate (%) Example 1 197.3 97.2 Example 2 197.4 97.4 Example 3 197.9 98.4 Example 4 198.0 98.6 Example 5 198.3 99.2 Comparative example 1 190.7 90.2 Comparative example 2 193.2 92.1 Comparative example 3 192.9 91.6

From the results in Table 1, it can be seen that the brightness and antistatic ability of the chip made of the light-emitting diode epitaxial wafer provided by Example 1 of the present invention are improved to a certain extent compared with the chip made of the comparative example. From the comparison between Example 2 and Example 1, it can be seen that the optoelectronic performance of the chip can be further improved by optimizing the thickness ratio of the first insertion layer and the second insertion layer. In Embodiment 3, by optimizing the Sc doping concentration in the first insertion layer, the Si doping concentration in the N-type GaN layer can be reduced, thereby improving the lattice matching degree between the first insertion layer and the N-type GaN layer, and improving luminous efficiency. In Embodiment 4, by optimizing the doping concentration of Lu in the second insertion layer, the thickness of the electron blocking layer and the composition of Al can be reduced, so that more holes can be injected into the multi-quantum well layer and the luminous efficiency can be improved. To sum up, the present invention improves the brightness and antistatic ability of the chip by growing the first insertion layer and the second insertion layer before and after the multi-quantum well layer.

The above description is a preferred embodiment of the present invention, and it should be pointed out that for those skilled in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications are also considered Be the protection scope of the present invention.

Claims (10)

1. A light-emitting diode epitaxial wafer, characterized in that, comprises a substrate and a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, a second insertion layer, an electron blocking layer and a p-type GaN layer; The first insertion layer is a GaN layer doped with Sc, and the second insertion layer is a GaN layer doped with Lu. 2 . The light emitting diode epitaxial wafer according to claim 1 , wherein the thickness of the first insertion layer is 20-200 nm; the thickness of the second insertion layer is 20-200 nm. 3. The light emitting diode epitaxial wafer according to claim 2, wherein the thickness ratio of the first insertion layer to the second insertion layer is 1:(1-2). 4. The light-emitting diode epitaxial wafer according to claim 1, wherein the doping concentration of Sc in the first insertion layer is 1×10 ³ -1×10 ⁶ cm ^-3 ; the second insertion layer The doping concentration of Lu is 1×10 ³ -1×10 ⁶ cm ^-3 . 5. The light-emitting diode epitaxial wafer according to claim 1, wherein the doping concentration of Sc in the first insertion layer is 5×10 ⁴ -5×10 ⁵ cm ^-3 ; the N-type GaN layer The doping concentration of Si is 5×10 ¹⁷ -1×10 ¹⁸ cm ^-3 . 6. The light-emitting diode epitaxial wafer according to claim 1, wherein the doping concentration of Lu in the second insertion layer is 1×10 ⁵ -1×10 ⁶ cm ^-3 ; The electron blocking layer is an Al _a Ga _1-a N layer, wherein a is 0.2-0.4; the thickness of the electron blocking layer is 30-50 nm. 7. A method for preparing a light-emitting diode epitaxial wafer, for preparing the light-emitting diode epitaxial wafer according to any one of claims 1-6, characterized in that, comprising: providing a substrate on which a nucleation layer, an intrinsic GaN layer, an N-type GaN layer, a first insertion layer, a multi-quantum well layer, a second insertion layer, an electron blocking layer, and a P-type GaN layer are sequentially grown ; Wherein, the first insertion layer is a GaN layer doped with Sc, and the second insertion layer is a GaN layer doped with Lu. 8. The method for preparing a light-emitting diode epitaxial wafer according to claim 7, wherein the growth temperature of the first insertion layer is 900-1100° C., and the growth pressure is 100-300 Torr; The growth temperature of the second insertion layer is 850-950° C., and the growth pressure is 100-300 Torr. 9. The method for preparing a light-emitting diode epitaxial wafer according to claim 7, wherein the growth temperature of the N-type GaN layer is 1100-1150° C., and the growth pressure is 100-500 Torr; The growth temperature of the electron blocking layer is 900-1100° C., and the growth pressure is 100-500 Torr. 10. A light emitting diode, characterized in that the light emitting diode comprises the light emitting diode epitaxial wafer according to any one of claims 1-6.