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CN116054113A - Overvoltage and undervoltage surge protection circuit and protection device - Google Patents

Overvoltage and undervoltage surge protection circuit and protection device Download PDF

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Publication number
CN116054113A
CN116054113A CN202310068143.5A CN202310068143A CN116054113A CN 116054113 A CN116054113 A CN 116054113A CN 202310068143 A CN202310068143 A CN 202310068143A CN 116054113 A CN116054113 A CN 116054113A
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CN
China
Prior art keywords
resistor
unit
overvoltage
triode
voltage
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Application number
CN202310068143.5A
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Chinese (zh)
Inventor
林兴乐
钟天禄
吴文勇
钟富明
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Xiamen Hualian Electronics Co Ltd
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Xiamen Hualian Electronics Co Ltd
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Priority to CN202310068143.5A priority Critical patent/CN116054113A/en
Publication of CN116054113A publication Critical patent/CN116054113A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/24Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to undervoltage or no-voltage
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1213Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

The invention discloses an overvoltage and undervoltage surge protection circuit and a protection device, wherein the circuit comprises: the first input end of the overvoltage and surge suppression unit is connected with the input end of the primary power supply; the DC-DC chip unit is connected with the output end of the overvoltage surge suppression unit, and the first output end of the DC-DC chip unit is used as the output end of the secondary power supply so as to provide an output power supply; the input end of the undervoltage surge filtering unit is connected with the input end of the primary power supply, and the output end of the undervoltage surge filtering unit is connected with the second input end of the overvoltage surge suppressing unit; therefore, the overvoltage surge suppression and undervoltage surge filtering functions are realized by matching with simple components on the basis of a DC-DC chip unit of a product, the undervoltage shutdown function can be met, no obvious voltage drop and heat are generated when the product is used under normal working voltage, and the structure is simple and the function is reliable.

Description

Overvoltage and undervoltage surge protection circuit and protection device
Technical Field
The invention relates to the technical field of circuit design, in particular to an overvoltage and undervoltage surge protection circuit and an overvoltage and undervoltage surge protection device.
Background
In the related technology, the adaptability requirement of the electronic product, especially the vehicle-mounted electronic product, to the power supply is very high, need to do overvoltage surge and undervoltage surge test, the existing overvoltage surge suppression circuit is mainly through increasing the high-power TVS protective tube, not only the size is large, but also can only be used as overvoltage suppression protection, or adopt NPN transistor, the base introduces the input voltage, build up the clamp circuit, make the output voltage be the base clamp voltage minus VBE voltage at maximum, but this mode has larger tube voltage drop in normal use, and when the electric current is slightly larger, the power consumed by the transistor is larger, the heating is serious; in addition, the existing undervoltage surge filter circuit mainly introduces an operational amplifier, a comparator or an MCU with an AD detection function for detection, and then the MCU software logic is used for judging so as to control an external power supply, so that the scheme is complex to realize and the cost is high.
Disclosure of Invention
The present invention aims to solve at least to some extent one of the technical problems in the above-described technology. Therefore, the invention aims to provide an overvoltage and undervoltage surge protection circuit which is matched with simple components on the basis of a DC-DC chip unit of a product, so that overvoltage surge suppression and undervoltage surge filtering functions are realized, the undervoltage turn-off function can be met, no obvious voltage drop and heat are generated when the overvoltage and undervoltage surge protection circuit is used under normal working voltage, and the overvoltage and undervoltage surge protection circuit is simple in structure and reliable in function.
Another object of the present invention is to provide an overvoltage/undervoltage surge protection device.
In order to achieve the above object, an over-voltage and under-voltage surge protection circuit according to an aspect of the present invention includes: the overvoltage and surge suppression unit is connected with the first input end of the first-stage power supply input end, and is used for processing the input voltage input by the first-stage power supply input end so as to suppress the output voltage within a preset range; the DC-DC chip unit is connected with the output end of the overvoltage surge suppression unit, and the first output end of the DC-DC chip unit is used as a secondary power supply output end so as to provide an output power supply; the under-voltage surge filter unit, the input of under-voltage surge filter unit with one-level power input is connected, the output of under-voltage surge filter unit with the second input of overvoltage surge suppression unit is connected, overvoltage surge suppression unit judges whether abnormal conditions appear according to the input voltage of one-level power input, and under-voltage and delay time are outside judges abnormal conditions, and when abnormal conditions appear, stops output voltage to DC-DC chip unit, wherein, under-voltage in delay time judges as under-voltage surge, keeps output voltage to DC-DC chip unit.
According to the overvoltage and undervoltage surge protection circuit provided by the invention, the first input end of the overvoltage and undervoltage surge suppression unit is connected with the input end of the primary power supply, and the overvoltage and undervoltage surge suppression unit processes the input voltage input by the input end of the primary power supply so as to suppress the output voltage within a preset range; the DC-DC chip unit is connected with the output end of the overvoltage surge suppression unit, and the first output end of the DC-DC chip unit is used as the output end of the secondary power supply so as to provide an output power supply; the input end of the undervoltage surge filter unit is connected with the input end of the primary power supply, the output end of the undervoltage surge filter unit is connected with the second input end of the overvoltage surge suppression unit, the overvoltage surge suppression unit judges whether an abnormal condition occurs according to the input voltage input by the input end of the primary power supply, the undervoltage outside the low voltage and the delay time is judged to be the abnormal condition, and when the abnormal condition occurs, the output voltage is stopped to the DC-DC chip unit, wherein the undervoltage in the delay time is judged to be the undervoltage surge, and the output voltage is kept to the DC-DC chip unit; therefore, the overvoltage surge suppression and undervoltage surge filtering functions are realized by matching with simple components on the basis of a DC-DC chip unit of a product, the undervoltage shutdown function can be met, no obvious voltage drop and heat are generated when the product is used under normal working voltage, and the structure is simple and the function is reliable.
In addition, the overvoltage/undervoltage surge protection circuit provided by the invention can also have the following additional technical characteristics:
optionally, the second output terminal of the DC-DC chip unit is connected to the third input terminal of the overvoltage surge suppression unit, so as to provide a pulse signal for the overvoltage surge suppression unit.
Optionally, the overvoltage surge suppression unit includes: the input end of the boosting unit is connected with the second output end of the DC-DC chip unit; the first input end of the overvoltage clamping and control breaking unit is connected with the input end of the primary power supply, the second input end of the overvoltage clamping and control breaking unit is connected with the output end of the undervoltage surge filtering unit, the third input end of the overvoltage clamping and control breaking unit is connected with the output end of the boosting unit, and the output end of the overvoltage clamping and control breaking unit is connected with the input end of the DC-DC chip unit.
Specifically, the boosting unit includes: one end of the first capacitor is connected with the second output end of the DC-DC chip unit; the positive electrode of the first diode is connected with the other end of the first capacitor; one end of the first resistor is connected with the negative electrode of the first diode; one end of the second resistor is connected with the other end of the first resistor; one end of the second capacitor is connected with the other end of the second resistor, and the other end of the second capacitor is grounded; a second diode, a cathode of which is connected between the first capacitor and the second diode; one end of the third resistor is connected with the anode of the second diode; and one end of the third capacitor is connected with the other end of the third resistor and is provided with a first node, and the other end of the third capacitor is grounded.
Specifically, the over-voltage clamping and control breaking unit includes: the source electrode of the MOS tube is connected with the first node, and the grid electrode of the MOS tube is connected between the first resistor and the second resistor and is provided with a third node; the anode of the third diode is connected with the drain electrode of the MOS tube and is provided with a second node; one end of the fourth resistor is connected with the negative electrode of the third diode; the cathode of the voltage stabilizing tube is connected with the other end of the fourth resistor, and the other end of the voltage stabilizing tube is grounded; and one end of the fourth capacitor is connected with the second node, and the other end of the fourth capacitor is grounded.
Optionally, the under-voltage surge filtering unit comprises a low-voltage detection unit and an under-voltage surge detection delay unit, and the low-voltage detection unit is connected with the under-voltage surge detection delay unit in parallel.
Specifically, the low-voltage detection unit includes: one end of the fifth resistor is connected with the primary power input end; the base electrode of the first triode is connected with the other end of the fifth resistor, and the emitting electrode of the first triode is grounded; one end of the sixth resistor is connected with the base electrode of the first triode, and the other end of the sixth resistor is grounded; one end of the fifth capacitor is connected with the base electrode of the first triode, and the other end of the fifth capacitor is grounded; a seventh resistor, one end of which is connected to the power input end, and the other end of which is connected to the collector electrode of the first triode; the base electrode of the second triode is connected with the collector electrode of the first triode, the emitting electrode of the second triode is grounded, and the collector electrode of the second triode is connected to the third node; and one end of the eighth resistor is connected with the base electrode of the second triode, and the other end of the eighth resistor is grounded.
Specifically, the undervoltage surge detection delay unit includes: one end of the ninth resistor is connected with the primary power input end; the base electrode of the third triode is connected with the other end of the ninth resistor, and the emitting electrode of the third triode is grounded; a tenth resistor, wherein one end of the tenth resistor is connected with the base electrode of the third triode, and the other end of the ninth resistor is grounded; one end of the sixth capacitor is connected with the base electrode of the third triode, and the other end of the sixth capacitor is grounded; an eleventh resistor, one end of which is connected to the power input terminal, and the other end of which is connected to the collector of the third triode; the base electrode of the fourth triode is connected with the collector electrode of the third triode, the emitting electrode of the fourth triode is grounded, and the collector electrode of the fourth triode is connected to the third node; one end of the twelfth resistor is connected with the base electrode of the fourth triode, and the other end of the twelfth resistor is grounded; and one end of the seventh capacitor is connected with the base electrode of the fourth triode, and the other end of the seventh capacitor is grounded.
In order to achieve the above purpose, the present invention further provides an overvoltage/undervoltage surge protection device, which includes the overvoltage/undervoltage surge protection circuit.
According to the overvoltage and undervoltage surge protection device provided by the invention, through the overvoltage and undervoltage surge protection circuit, the overvoltage surge suppression and undervoltage surge filtering functions are realized, the undervoltage turn-off functions can be met, no obvious voltage drop and no heat are generated when the overvoltage and undervoltage surge protection device is used under normal working voltage, and the overvoltage and undervoltage surge protection device is simple in structure and reliable in function.
Drawings
FIG. 1 is a block diagram of an over-voltage and under-voltage surge protection circuit according to one embodiment of the invention;
FIG. 2 is a circuit schematic of an over-voltage and under-voltage surge protection circuit according to one embodiment of the invention;
FIG. 3 is a specific schematic circuit diagram of an overvoltage surge suppression unit according to one embodiment of the present invention;
FIG. 4 is a schematic diagram of a specific circuit of an under-voltage surge filtering unit according to one embodiment of the invention;
fig. 5 is a block schematic diagram of an overvoltage/undervoltage surge protection device according to an embodiment of the invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
In order that the above-described aspects may be better understood, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
In order to better understand the above technical solutions, the following detailed description will refer to the accompanying drawings and specific embodiments.
Referring to fig. 1 to 4, the overvoltage and undervoltage surge protection circuit provided by the embodiment of the invention comprises an overvoltage and surge suppression unit 10, a DC-DC chip unit 20 and an undervoltage surge filtering unit 30.
The first input end of the overvoltage and surge suppressing unit 10 is connected with the input end of the primary power supply, and the overvoltage and surge suppressing unit 10 processes the input voltage input by the input end of the primary power supply so as to suppress the output voltage within a preset range.
The DC-DC chip unit 20 is connected with the output end of the overvoltage and surge suppression unit 10, and the first output end of the DC-DC chip unit 20 is used as a secondary power supply output end so as to provide an output power supply;
the input end of the under-voltage surge filtering unit 30 is connected with the first-stage power input end, the output end of the under-voltage surge filtering unit 30 is connected with the second input end of the over-voltage surge suppressing unit 10, the over-voltage surge suppressing unit 10 determines whether an abnormal condition occurs according to the input voltage input by the first-stage power input end, the under-voltage outside the low voltage and the delay time is determined to be the abnormal condition, and when the abnormal condition occurs, the under-voltage within the delay time is determined to be the under-voltage surge, and the output voltage is kept to the DC-DC chip unit 20.
The overvoltage and undervoltage surge protection circuit is used for inhibiting the overvoltage and undervoltage surge of the input power supply end so as to protect the back-stage power supply circuit from being damaged, and meanwhile, the delay circuit scheme is skillfully combined, so that the undervoltage surge detection feedback is filtered, and the back-stage power supply is not closed; but the non-surge long-time under-voltage detection turns off the post-stage power supply; namely, the low voltage immediately detects to shut down the power supply of the later stage, thereby achieving the functions of under-voltage surge filtration and simultaneously meeting the shutdown of under-voltage.
As an embodiment, a second output of the DC-DC chip unit 20 is connected to a third input of the overvoltage surge suppression unit 10 for providing a pulse signal to the overvoltage surge suppression unit 10.
As a specific embodiment, as shown in fig. 4, the second output terminal of the DC-DC chip unit 20 is the SW terminal, and the DC-DC chip unit 20 provides the necessary SW pulse signal to the overvoltage surge suppression unit 10, and at the same time, as a secondary power source, outputs the power to a product, which is very many, for example, SCT2620MRER of the core continent technology.
As one embodiment, the overvoltage surge suppression unit 10 includes a voltage boosting unit 101 and an overvoltage clamping and control switching unit 102.
Wherein the input end of the boosting unit 101 is connected with the second output end SW of the DC-DC chip unit 20; the first input terminal of the over-voltage clamping and control breaking unit 102 is connected with the primary power input terminal VIN, the second input terminal of the over-voltage clamping and control breaking unit 102 is connected with the output terminal of the under-voltage surge filtering unit 30, the third input terminal of the over-voltage clamping and control breaking unit 102 is connected with the output terminal of the boosting unit 101, and the output terminal of the over-voltage clamping and control breaking unit 102 is connected with the input terminal of the DC-DC chip unit 20.
As one embodiment, the boosting unit 101 includes a first capacitor C1, a first diode D1, a first resistor R1, a second resistor R8, a second capacitor C11, a second diode D2, a third resistor R18, and a third capacitor C3.
One end of the first capacitor C1 is connected to the second output end SW of the DC-DC chip unit 20; the anode of the first diode D1 is connected with the other end of the first capacitor C1; one end of the first resistor R1 is connected with the cathode of the first diode D1; one end of the second resistor R8 is connected with the other end of the first resistor R1; one end of the second capacitor C11 is connected with the other end of the second resistor R8, and the other end of the second capacitor C11 is grounded; the cathode of the second diode D2 is connected between the first capacitor C1 and the second diode D2; one end of the third resistor R18 is connected with the anode of the second diode D2; one end of the third capacitor C3 is connected to the other end of the third resistor R18 and has a first node a, and the other end of the third capacitor C3 is grounded GND.
It should be noted that, one end of the first capacitor C1 is connected to the SW switch pulse signal of the DC-DC chip unit 20, the first capacitor C1, the second diode D2 and the third resistor R18 form a bootstrap circuit, the first diode D1 is used for preventing current from flowing back, the first resistor R1 is a current limiting resistor, the second resistor R8 and the second capacitor C11 form an RC filter, and the third capacitor C3 is used for power supply filtering.
As an embodiment, the over-voltage clamping and control breaking unit 102 includes a MOS transistor Q1, a third diode D3, a fourth resistor R4, a voltage regulator DZ1, and a fourth capacitor C5.
The source electrode of the MOS tube Q1 is connected with the first node A, the grid electrode of the MOS tube Q1 is connected between the first resistor R1 and the second resistor R8, and the MOS tube Q1 is provided with a third node C; the anode of the third diode D3 is connected with the drain electrode of the MOS tube Q1 and is provided with a second node B; one end of a fourth resistor R4 is connected with the cathode of the third diode D3; the cathode of the voltage stabilizing tube DZ1 is connected with the other end of the fourth resistor R4, and the other end of the voltage stabilizing tube DZ1 is grounded to GND; one end of the fourth capacitor C5 is connected to the second node B, and the other end of the fourth capacitor C5 is grounded GND.
It should be noted that, the MOS transistor Q1 is used for controlling the power supply to be turned on and off, the gate initial voltage of the MOS transistor Q1 is provided by the primary power supply through the third diode D3 and the fourth resistor R4, the voltage regulator tube DZ1 determines the allowed maximum clamping voltage (VDZ 1-VGS) (generally set to be slightly larger than the upper limit value of the operating voltage while meeting the maximum allowed input voltage not exceeding the DC-DC chip), and the fourth capacitor C5 is used for filtering the power supply; because the MOS tube Q1 can be selected to have very small internal resistance, tens milliohms or even milliohms, the tube voltage drop when the MOS tube Q1 is conducted is very low, and no obvious voltage drop exists.
As a specific embodiment, as shown in fig. 3, when the under-voltage surge filtering unit is not considered, when the primary power supply VIN is input (e.g. 24V input), the gate of the MOS transistor Q1 is boosted to VIN value, and the voltage value after the voltage is turned on is (VIN value-VGS) (e.g. vgs=4.5v, VIN value-vgs=24V-4.5v=19.5v), at this time, the DC-DC chip starts to operate, the SW pin of the chip generates square wave pulse, the peak value of the square wave pulse is about VIN value, and after passing through the boosting unit 101, the VIN value slightly smaller than 2 times acts on the gate of the MOS transistor Q1, and at this time, because the voltage value of the voltage regulator DZ1 is generally clamped at the voltage value of VDZ1 (e.g. 36.5V is selected), the output instant of the MOS transistor VIN Q1 is changed from (value-VGS) to VIN value (24V), without obvious voltage drop; during overvoltage surge, for example, in a vehicle load rejection surge experiment, the voltage can rise to more than 120V, and at the moment, the output voltage can be restrained at a (VDZ 1-VGS) value by using the clamping function of the voltage stabilizing tube DZ1 (for example, the DZ1 selects a voltage stabilizing value of 36.5V, and the restrained voltage output is 36.5V-4.5 v=32v).
As one embodiment, the under-voltage surge filtering unit 30 includes a low-voltage detection unit 301 and an under-voltage surge detection delay unit 302, and the low-voltage detection unit 301 is connected in parallel with the under-voltage surge detection delay unit 302.
As one embodiment, the low voltage detection unit 301 includes a fifth resistor R12, a first transistor Q3, a sixth resistor R13, a fifth capacitor C12, a seventh resistor R10, a second transistor Q2, and an eighth resistor R11.
One end of the fifth resistor R12 is connected with the first-stage power input end VIN; the base electrode of the first triode Q3 is connected with the other end of the fifth resistor R12, and the emitter electrode of the first triode Q3 is grounded GND; one end of the sixth resistor R13 is connected with the base electrode of the first triode Q3, and the other end of the sixth resistor R13 is grounded to GND; one end of the fifth capacitor C12 is connected with the base electrode of the first triode Q3, and the other end of the fifth capacitor C12 is grounded to GND; one end of the seventh resistor R10 is connected to the power input terminal VIN, and the other end of the seventh resistor R10 is connected to the collector of the first triode Q3; the base electrode of the second triode Q2 is connected with the collector electrode of the first triode Q3, the emitter electrode of the second triode Q2 is grounded GND, and the collector electrode of the second triode Q2 is connected to the third node C; one end of the eighth resistor R11 is connected to the base of the second triode Q2, and the other end of the eighth resistor R11 is grounded to GND.
It should be noted that, the fifth resistor R12 and the sixth resistor R13 form a voltage dividing circuit for detecting whether the first triode Q3 can be turned on, the fifth capacitor C12 is used for filtering, and the seventh resistor R10 and the eighth resistor R11 are used for dividing the input voltage of VIN to the base of the second triode Q2.
The low-voltage value is preset, the setting reference product of the low-voltage value is still higher than the lowest voltage which can normally work, and the low-voltage surge is lower than the lowest voltage.
When the input of the primary power supply VIN is larger than or equal to the set low-voltage value, the first triode Q3 is conducted, the base voltage of the second triode Q2 is 0, the second triode Q2 is cut off, and the primary power supply can be normally output to the DC-DC chip unit 20; when the input of the primary power supply VIN is smaller than the set low voltage value, the first triode Q3 is turned off, the second triode Q2 is turned on under the action of pull-up, the gate of the MOS transistor Q1 is pulled to the ground, the MOS transistor Q1 is turned off, and the primary power supply cannot output voltage to the DC-DC chip unit 20.
That is, the output voltage is stopped to the DC-DC chip unit 20 when the input voltage is low, i.e., the power supply of the subsequent stage is turned off.
As one embodiment, the undervoltage surge detection delay unit 302 includes a ninth resistor R16, a third triode Q5, a tenth resistor R17, a sixth capacitor C14, an eleventh resistor R14, a fourth triode Q4, a twelfth resistor R15, and a seventh capacitor C13.
One end of the ninth resistor R16 is connected with the first-stage power input end VIN; the base electrode of the third triode Q5 is connected with the other end of the ninth resistor R16, and the emitter electrode of the third triode Q5 is grounded GND; one end of a tenth resistor R17 is connected with the base electrode of the third triode Q5, and the other end of the ninth resistor R16 is grounded to GND; one end of the sixth capacitor C14 is connected with the base electrode of the third triode Q5, and the other end of the sixth capacitor C14 is grounded to GND; one end of the eleventh resistor R14 is connected to the power input terminal VIN, and the other end of the eleventh resistor R14 is connected to the collector of the third transistor Q5; the base electrode of the fourth triode Q4 is connected with the collector electrode of the third triode Q5, the emitter electrode of the fourth triode Q4 is grounded, and the collector electrode of the fourth triode Q4 is connected to the third node C; one end of the twelfth resistor R15 is connected with the base electrode of the fourth triode Q4, and the other end of the twelfth resistor R15 is grounded to GND; one end of the seventh capacitor C13 is connected to the base of the fourth triode Q4, and the other end of the seventh capacitor C13 is grounded to GND.
It should be noted that, the ninth resistor R16 and the tenth resistor R17 form a voltage dividing circuit for detecting whether the third triode Q5 is capable of being turned on, the sixth capacitor C14 is used for filtering, the eleventh resistor R14 and the twelfth resistor R15 are used for dividing the input voltage of VIN to the base of the fourth triode Q4, and the eleventh resistor R14 and the seventh capacitor C13 form an RC charging circuit.
An under-voltage value is preset and set as a lower limit value of the working voltage of the product.
When the input of the primary power supply VIN is larger than or equal to the set undervoltage value, the third triode Q5 is conducted, the base voltage of the fourth triode Q4 is 0, the fourth triode Q4 is cut off, and the primary power supply can be normally output to the DC-DC chip unit 20; when the input of the primary power supply VIN is smaller than the set under-voltage value, the third triode Q5 is turned off, at this time, the fourth triode Q4 is turned on in a delayed manner under the action of the RC charging circuit, the gate of the MOS transistor Q1 is pulled to the ground after the turn-on, the MOS transistor Q1 is turned off, and the primary power supply cannot output voltage to the DC-DC chip unit 20. If the input of the primary power source VIN is greater than or equal to the set under-voltage value in the delay period, the third triode Q5 is turned on, the base voltage of the fourth triode Q4 is rapidly released to 0, the fourth triode Q4 is turned off, and the primary power source can be normally output to the DC-DC chip unit 20.
That is, when the input voltage becomes normal from the under-voltage during the time of the delay, the input voltage is considered as an under-voltage surge, and the normal output voltage is maintained to the DC-DC chip unit 20, that is, the power supply of the subsequent stage is not turned off.
In summary, through the above-mentioned overvoltage/undervoltage surge protection circuit, under the combined action of the low voltage detection circuit 301 and the undervoltage surge detection delay circuit 302, when the input voltage is low voltage/undervoltage, the gate of the MOS transistor Q1 is pulled to the ground, the MOS transistor Q1 is disconnected, and the primary power supply cannot output voltage to the DC-DC chip unit 20. During normal operation, under-voltage surge can be filtered due to the effect of delay detection, so that a later-stage power supply is not closed; that is, the low voltage immediately detects that the MOS transistor Q1 is disconnected to close the back-stage power supply, the back-stage power supply is closed after the non-surge under-voltage detection, and the back-stage power supply is not closed after the surge under-voltage delay detection, so that the under-voltage surge filtering function is achieved.
In summary, according to the overvoltage/undervoltage surge protection circuit provided by the invention, the first input end of the overvoltage/surge suppression unit is connected with the input end of the primary power supply, and the overvoltage/surge suppression unit processes the input voltage input by the input end of the primary power supply so as to suppress the output voltage within a preset range; the DC-DC chip unit is connected with the output end of the overvoltage surge suppression unit, and the first output end of the DC-DC chip unit is used as the output end of the secondary power supply so as to provide an output power supply; the input end of the undervoltage surge filter unit is connected with the input end of the primary power supply, the output end of the undervoltage surge filter unit is connected with the second input end of the overvoltage surge suppression unit, the overvoltage surge suppression unit judges whether an abnormal condition occurs according to the input voltage input by the input end of the primary power supply, the undervoltage outside the low voltage and the delay time is judged to be the abnormal condition, and when the abnormal condition occurs, the output voltage is stopped to the DC-DC chip unit, wherein the undervoltage in the delay time is judged to be the undervoltage surge, and the output voltage is kept to the DC-DC chip unit; therefore, the overvoltage surge suppression and undervoltage surge filtering functions are realized by matching with simple components on the basis of a DC-DC chip unit of a product, the undervoltage shutdown function can be met, no obvious voltage drop and heat are generated when the product is used under normal working voltage, and the structure is simple and the function is reliable.
In addition, as shown in fig. 5, the embodiment of the invention further provides an overvoltage/undervoltage surge protection device 1000, which includes the overvoltage/undervoltage surge protection circuit 2000.
According to the overvoltage and undervoltage surge protection device provided by the invention, through the overvoltage and undervoltage surge protection circuit, the overvoltage surge suppression and undervoltage surge filtering functions are realized, the undervoltage turn-off functions can be met, no obvious voltage drop and no heat are generated when the overvoltage and undervoltage surge protection device is used under normal working voltage, and the overvoltage and undervoltage surge protection device is simple in structure and reliable in function.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms should not be understood as necessarily being directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.

Claims (9)

1. The utility model provides a cross undervoltage surge protection circuit which characterized in that includes:
the overvoltage and surge suppression unit is connected with the first input end of the first-stage power supply input end, and is used for processing the input voltage input by the first-stage power supply input end so as to suppress the output voltage within a preset range;
the DC-DC chip unit is connected with the output end of the overvoltage surge suppression unit, and the first output end of the DC-DC chip unit is used as a secondary power supply output end so as to provide an output power supply;
the under-voltage surge filter unit, the input of under-voltage surge filter unit with one-level power input is connected, the output of under-voltage surge filter unit with the second input of overvoltage surge suppression unit is connected, overvoltage surge suppression unit judges whether abnormal conditions appear according to the input voltage of one-level power input, and under-voltage and delay time are outside judges abnormal conditions, and when abnormal conditions appear, stops output voltage to DC-DC chip unit, wherein, under-voltage in delay time judges as under-voltage surge, keeps output voltage to DC-DC chip unit.
2. The overvoltage/undervoltage surge protection circuit of claim 1, wherein the second output of the DC-DC chip unit is connected to the third input of the overvoltage/surge suppression unit to provide a pulse signal to the overvoltage/surge suppression unit.
3. The overvoltage/undervoltage surge protection circuit of claim 2, wherein the overvoltage/surge suppression unit includes:
the input end of the boosting unit is connected with the second output end of the DC-DC chip unit;
the first input end of the overvoltage clamping and control breaking unit is connected with the input end of the primary power supply, the second input end of the overvoltage clamping and control breaking unit is connected with the output end of the undervoltage surge filtering unit, the third input end of the overvoltage clamping and control breaking unit is connected with the output end of the boosting unit, and the output end of the overvoltage clamping and control breaking unit is connected with the input end of the DC-DC chip unit.
4. The overvoltage/undervoltage surge protection circuit of claim 3, wherein the boost unit comprises:
one end of the first capacitor is connected with the second output end of the DC-DC chip unit;
the positive electrode of the first diode is connected with the other end of the first capacitor;
one end of the first resistor is connected with the negative electrode of the first diode;
one end of the second resistor is connected with the other end of the first resistor;
one end of the second capacitor is connected with the other end of the second resistor, and the other end of the second capacitor is grounded;
a second diode, a cathode of which is connected between the first capacitor and the second diode;
one end of the third resistor is connected with the anode of the second diode;
and one end of the third capacitor is connected with the other end of the third resistor and is provided with a first node, and the other end of the third capacitor is grounded.
5. The overvoltage/undervoltage surge protection circuit of claim 4, wherein the overvoltage clamping and control turn-off unit comprises:
the source electrode of the MOS tube is connected with the first node, and the grid electrode of the MOS tube is connected between the first resistor and the second resistor and is provided with a third node;
the anode of the third diode is connected with the drain electrode of the MOS tube and is provided with a second node;
one end of the fourth resistor is connected with the negative electrode of the third diode;
the cathode of the voltage stabilizing tube is connected with the other end of the fourth resistor, and the other end of the voltage stabilizing tube is grounded;
and one end of the fourth capacitor is connected with the second node, and the other end of the fourth capacitor is grounded.
6. The overvoltage and undervoltage surge protection circuit of claim 5, wherein the undervoltage surge filtering unit comprises a low voltage detection unit and an undervoltage surge detection delay unit, the low voltage detection unit being connected in parallel with the undervoltage surge detection delay unit.
7. The overvoltage/undervoltage surge protection circuit of claim 6, wherein the low voltage detection unit comprises:
one end of the fifth resistor is connected with the primary power input end;
the base electrode of the first triode is connected with the other end of the fifth resistor, and the emitting electrode of the first triode is grounded;
one end of the sixth resistor is connected with the base electrode of the first triode, and the other end of the sixth resistor is grounded;
one end of the fifth capacitor is connected with the base electrode of the first triode, and the other end of the fifth capacitor is grounded;
a seventh resistor, one end of which is connected to the power input end, and the other end of which is connected to the collector electrode of the first triode;
the base electrode of the second triode is connected with the collector electrode of the first triode, the emitting electrode of the second triode is grounded, and the collector electrode of the second triode is connected to the third node;
and one end of the eighth resistor is connected with the base electrode of the second triode, and the other end of the eighth resistor is grounded.
8. The undervoltage surge protection circuit of claim 7, wherein the undervoltage surge detection delay unit comprises:
one end of the ninth resistor is connected with the primary power input end;
the base electrode of the third triode is connected with the other end of the ninth resistor, and the emitting electrode of the third triode is grounded;
a tenth resistor, wherein one end of the tenth resistor is connected with the base electrode of the third triode, and the other end of the ninth resistor is grounded;
one end of the sixth capacitor is connected with the base electrode of the third triode, and the other end of the sixth capacitor is grounded;
an eleventh resistor, one end of which is connected to the power input terminal, and the other end of which is connected to the collector of the third triode;
the base electrode of the fourth triode is connected with the collector electrode of the third triode, the emitting electrode of the fourth triode is grounded, and the collector electrode of the fourth triode is connected to the third node;
one end of the twelfth resistor is connected with the base electrode of the fourth triode, and the other end of the twelfth resistor is grounded;
and one end of the seventh capacitor is connected with the base electrode of the fourth triode, and the other end of the seventh capacitor is grounded.
9. An overvoltage/undervoltage surge protection device, comprising an overvoltage/undervoltage surge protection circuit according to any one of claims 1-8.
CN202310068143.5A 2023-01-13 2023-01-13 Overvoltage and undervoltage surge protection circuit and protection device Pending CN116054113A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310068143.5A CN116054113A (en) 2023-01-13 2023-01-13 Overvoltage and undervoltage surge protection circuit and protection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310068143.5A CN116054113A (en) 2023-01-13 2023-01-13 Overvoltage and undervoltage surge protection circuit and protection device

Publications (1)

Publication Number Publication Date
CN116054113A true CN116054113A (en) 2023-05-02

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310068143.5A Pending CN116054113A (en) 2023-01-13 2023-01-13 Overvoltage and undervoltage surge protection circuit and protection device

Country Status (1)

Country Link
CN (1) CN116054113A (en)

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