Disclosure of utility model
The utility model provides a power management module, which can be applied to a high-voltage environment and has certain safety.
The embodiment of the utility model provides a power management module, which comprises a power management chip, a bootstrap unit and an anti-reflection unit;
the power management chip internally comprises a voltage reducing unit;
The bootstrap unit comprises a first switching tube;
The anti-reflection unit comprises a second switching tube, a first diode, a third switching tube and a first resistor;
The power input end is connected with the first end of the second switching tube, the second end of the second switching tube is connected with the second end of the first switching tube, and the control end of the second switching tube is connected with the control end of the first switching tube;
The first end of the third switching tube is connected with the control end of the second switching tube, and the control end of the third switching tube is grounded through the first resistor;
The anode and the cathode of the first diode are respectively connected with the first end of the second switching tube and the second end of the third switching tube;
The second end of the first switching tube is also connected with the power end of the voltage reduction unit, and the first switching tube is also used for being conducted or cut off according to the bootstrap voltage of the bootstrap unit;
When the first switching tube is conducted, the voltage drop between the input voltage of the power input end and the output voltage of the voltage reduction unit reaches the minimum value.
Optionally, the device further comprises a protection unit, wherein the protection unit comprises a first clamping diode and a second diode;
The positive pole of the first clamping diode is connected with the control end of the second switching tube, the negative pole of the first clamping diode is connected with the positive pole of the second diode, and the negative pole of the second diode is grounded.
Optionally, the bootstrap unit includes a first capacitor, a third diode, a second capacitor and a second resistor;
The voltage output end of the voltage reducing unit is connected with the first end of the third diode through the first capacitor, and the second end of the third diode is connected with the control end of the first switching tube through the second resistor;
The first end and the second end of the second capacitor are respectively connected with the second end and the ground end of the third diode.
Optionally, the device further comprises a voltage limiting unit, wherein the voltage limiting unit comprises a second clamping diode and a fourth diode;
The first end of the second clamping diode is connected with the control end of the first switching tube, and the second end of the second clamping diode is connected with the power end of the voltage reduction unit through the fourth diode.
Optionally, the device further comprises a boosting unit, wherein the boosting unit comprises a first inductor, a third capacitor, a third switching tube, a fifth diode and a third resistor;
The second end of the first switch tube is connected with the positive electrode of the fifth diode through the first inductor, and the negative electrode of the fifth diode is connected with the power end of the voltage reduction unit;
the first end of the third switching tube is connected with the positive electrode of the fifth diode, and the second end of the third switching tube is grounded through the third resistor;
The control end of the third switching tube is connected with the control end of the power management chip;
The first end and the second end of the third capacitor are respectively connected with the cathode and the ground end of the fifth diode.
Optionally, the third switch tube adopts a triode.
Optionally, the first switching tube and the second switching tube adopt NMOS tubes, and the gate-source threshold voltages of the first switching tube and the second switching tube are 2-4V.
Optionally, the output voltage of the power management chip is 12V.
Optionally, the fourth switching tube adopts an NMOS tube.
Optionally, the input voltage of the power input end is 4.5-60 v.
Compared with the prior art, the power management module has the beneficial effects that the power management module comprises a power management chip U1, a bootstrap unit and an anti-reflection unit, wherein the power management chip internally comprises a voltage reduction unit, the bootstrap unit comprises a first switch tube Q2, the anti-reflection unit comprises a second switch tube Q1, a first diode D3, a third switch tube Q3 and a first resistor R2, and the voltage reduction unit can be enabled to work when the input voltage of the power management chip exceeds a certain value based on the first switch tube Q2 and the second switch tube Q1, so that the voltage reduction unit can be applied to a high-voltage electrical environment, the problem that a DCDC circuit is required to be added at the front stage of the power management chip to increase the complexity of the module when the same effect is achieved is avoided, and in addition, the anti-reflection protection for the power management chip can be realized based on the second switch tube Q1, and the use safety of the power management chip is improved.
Detailed Description
The utility model is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the utility model and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present utility model are shown in the drawings.
FIG. 1 is a schematic diagram of a power management module in an embodiment, referring to FIG. 1, the power management module includes a power management chip U1, a bootstrap unit, and an anti-reflection unit;
The power management chip internally comprises a voltage reducing unit;
The bootstrap unit comprises a first switching tube Q2;
The anti-reflection unit comprises a second switching tube Q1, a first diode D3, a third switching tube Q3 and a first resistor R2;
The power Input end Input is connected with the first end of a second switching tube Q1, the second end of the second switching tube Q1 is connected with the second end of a first switching tube Q2, and the control end of the second switching tube Q1 is connected with the control end of the first switching tube Q2;
The first end of the third switching tube Q3 is connected with the control end of the second switching tube Q1, and the control end of the third switching tube Q3 is grounded through a first resistor R2;
The anode and the cathode of the first diode D3 are respectively connected with the first end of the second switching tube Q1 and the second end of the third switching tube Q3;
The second end of the first switching tube Q2 is also connected with the power end of the voltage reduction unit, and the first switching tube Q2 is also used for being conducted or cut off according to the bootstrap voltage of the bootstrap unit;
When the first switching tube Q2 is conducted, the voltage drop between the input voltage of the power input end and the output voltage of the voltage reduction unit reaches the minimum value.
In this embodiment, the model of the Power management chip (Power MANAGEMENT IC, PMIC) U1 is not specifically limited, and may be freely selected according to the requirement, and accordingly, the structure of the voltage reducing unit configured therein is not described in detail, which is related to the model of the selected Power management chip.
In this embodiment, the power (input) end and the output end of the set voltage reduction unit are respectively designated pins of the power management chip U1, the power end of the set voltage reduction unit is connected with the second end of the first switch tube Q2, and the output end of the voltage reduction unit is connected with the (input end of the) bootstrap unit.
In this embodiment, the third switching transistor Q3 may be a triode.
In this embodiment, the working principles of the power management chip U1 (step-down unit), the bootstrap unit, and the anti-reflection unit are as follows:
When the power Input end Input is smaller than the appointed voltage threshold value, the parasitic diode of the second switching tube Q1 is conducted in the forward direction, and the D electrode of the second switching tube Q1 outputs voltage which is Vsd (Diode forward voltage) lower than the power to the D electrode of the first switching tube Q2;
At this time, the BUCK unit (BUCK circuit) has not yet started to operate, the G-pole voltages of Q1 and Q2 are floating levels, and the S-pole of Q2 can output the level of Vd-Vgson until the BUCK unit starts to operate, where Vgson is the gate-source threshold voltage of Q2;
The voltage-reducing unit starts to work, and the power supply Voltage (VIN) of the power supply Input end must be higher than the output voltage + Vgson +Vsd of the voltage-reducing unit, so that the starting of the voltage-reducing unit can be ensured, and normal voltage can be output;
After the step-down unit starts to work, the bootstrap unit gradually increases the voltage output by the step-down unit to a specified value;
when the bootstrap unit increases the voltage of the control end of the first switching tube Q2 to VIN+ Vgson, Q1 and Q2 are conducted, and the voltage drop from the power Input end Input to the voltage reduction unit is reduced to the minimum;
when the power supply input is reversely connected and negative pressure is input, VIN voltage is lower than GND end, current on the first resistor R2 is amplified through the third switching tube Q3, so that Vgs of the second switching tube Q1 is clamped to about 0.7V, at the moment, the second switching tube Q1 is closed, and the negative pressure protection function of the rear-stage circuit is realized.
In this embodiment, the bootstrap unit is not limited to the circuit devices except for the first switching tube Q2, for example, referring to fig. 1, the bootstrap unit may further include:
The bootstrap unit comprises a first capacitor C4, a third diode D2, a second capacitor C1 and a second resistor R1;
The voltage output end of the voltage reducing unit is connected with the first end of a third diode D2 through a first capacitor C4, and the second end of the third diode D2 is connected with the control end of a first switching tube Q2 through a second resistor R1;
The first end and the second end of the second capacitor C1 are respectively connected to the second end and the ground end of the third diode D2.
In the scheme, the bootstrap unit works in the following manner:
After the BUCK circuit in the voltage reduction unit starts to work, the first capacitor C4 starts to charge and discharge, and the voltage of the second capacitor C1 is gradually increased to a specified value based on the output voltage of the BUCK circuit;
when the voltage of the second capacitor C1 is raised to VIN+ Vgson, Q1 and Q2 are turned on, and the voltage drop from VIN to the output voltage of the BUCK circuit is minimized.
For example, in this scheme, before Q1 is turned on, its diode characteristic has a PN junction voltage drop, and the gate stage of Q2 is a floating voltage, and has a voltage drop of about Vgson. After Q1, Q2 are turned on, none of these drops is present, thus minimizing the drop in the output voltage from VIN to BUCK.
The embodiment provides a power management module, which comprises a power management chip U1, a bootstrap unit and an anti-reflection unit, wherein the power management chip internally comprises a voltage reduction unit, the bootstrap unit comprises a first switch tube Q2, the anti-reflection unit comprises a second switch tube Q1, a first diode D3, a third switch tube Q3 and a first resistor R2, and based on the first switch tube Q2 and the second switch tube Q1, when the input voltage of the power management chip exceeds a certain value, the voltage reduction unit can be enabled to work, so that a low-voltage (for example 12V) power management chip can be applied to a high-voltage electric environment (for example 24-48V), when the same effect is achieved, the problem that a DCDC circuit needs to be added at the front stage of the power management chip, and the complexity of the module is increased is solved.
Fig. 2 is a schematic diagram of another power management module in an embodiment, referring to fig. 2, in an embodiment, based on the scheme shown in fig. 1, the power management module further includes a protection unit, where the protection unit includes a first clamping diode Z2 and a second diode D5;
The positive pole of the first clamping diode Z2 is connected with the control end of the second switching tube Q1, the negative pole of the first clamping diode Z2 is connected with the positive pole of the second diode D5, and the negative pole of the second diode D5 is grounded.
In this scheme, when the voltage at the control end of the first switching tube Q2 is higher than vin+vgs, the first clamping diode Z2 breaks down reversely, clamping the Vgs voltage of the first switching tube Q2, and protecting Q2.
Referring to fig. 2, in one possible embodiment, the power management module further includes a voltage limiting unit including a second clamping diode Z1 and a fourth diode D1, based on the scheme shown in fig. 1;
The first end of the second clamping diode Z1 is connected with the control end of the first switching tube Q2, and the second end of the second clamping diode Z1 is connected with the power end of the voltage reduction unit through the fourth diode D1.
In this scheme, the second clamping diode Z1 is provided for limiting the output voltage of the first switching tube Q2 to VZnom-Vgson when the Input voltage of the power Input terminal Input is higher than the clamping voltage-Vgson of Z1, wherein Vznom is the nominal voltage stabilizing value of the second clamping diode Z1.
In this embodiment, the second clamping diode Z1 and the first switching tube Q2 may be selected as follows:
If the voltage-withstanding level of the power management chip U1 is 12V, a zener diode with 18V can be selected as a second clamping diode, and an N-MOS with Vgson V is selected as a first switching tube, so that the output voltage (of the first switching tube) can be protected to be less than 16V;
if the voltage withstand level of the power management chip U1 is 24V, a zener diode of 36V may be selected as the second clamp diode, and an N-MOS of Vgson V may be selected as the first switching transistor, so that the output voltage (of the first switching transistor) may be protected to about 34V.
Referring to fig. 2, in an embodiment, the power management module further includes a boost unit, where the boost unit includes a first inductor L1, a third capacitor C3, a fourth switching tube Q4, a fifth diode D4, and a third resistor D4;
The second end of the first switching tube Q2 is connected with the positive electrode of a fifth diode D4 through a first inductor L1, and the negative electrode of the fifth diode D4 is connected with the power end of the voltage reduction unit;
The first end of the fourth switching tube Q4 is connected with the positive electrode of the fifth diode D4, and the second end of the fourth switching tube Q4 is grounded through a third resistor R3;
the control end of the fourth switching tube Q4 is connected with the control end of the power management chip U1;
The first end and the second end of the third capacitor C3 are respectively connected to the cathode and the ground of the fifth diode D4.
In this scheme, the first inductor L1, the fourth switching tube Q4, the fifth diode D4, and the third capacitor C3 form a typical boost circuit, and the specific working principles thereof are not described in detail;
The third resistor R3 is used as a current detection resistor, and the power management chip U1 can determine the output current of the fourth switching tube Q4 by detecting the voltages at two ends of the third resistor R3;
When the current is too large, the power management chip U1 can be configured to actively disconnect the fourth switching tube Q4, so that the damage of the fourth switching tube Q4 is avoided.
In this embodiment, the fourth switching transistor may be an NMOS transistor.
In this scheme, set up the output voltage that the boost unit is used for adjusting first switch tube Q2, guarantee the stability of the voltage of output to the step-down unit.
Based on the scheme shown in fig. 1, in one possible implementation, the first switching tube Q2 and the second switching tube Q1 are NMOS tubes, and the gate-source threshold voltages of the first switching tube Q2 and the second switching tube Q1 are 2-4 v.
Wherein Q1 and Q2 are lower Vgson (2-4V), the type of N-MOSFET with high enough withstand voltage (capable of tolerating high voltage) is selected, and the heat dissipation power of Q2 is large enough;
The purpose of this option is that during overvoltage, the Vds drop of Q2 is large, and Q2 must withstand its own power loss to achieve the purpose of protecting the post-stage buck unit.
Based on the scheme shown in fig. 1, in one possible embodiment, the output voltage of the power management chip is set to 12V.
Based on the scheme shown in fig. 1, in one embodiment, the input voltage of the power input terminal is 4.5-60 v.
Referring to fig. 2, the foregoing schemes of any power management module may be freely combined, and the corresponding devices, connection manners and working principles thereof are the same as those of the foregoing corresponding schemes, which are not described in detail herein;
In addition, based on the type selection of the power management chip U1, peripheral devices required by the power management chip U1 can be configured as required, for example, an inductor L2, a capacitor C7 and a voltage reducing unit in the power management chip U1 form a voltage reducing circuit, and the capacitor C2 is used as a reset capacitor of the power management chip U1.
Note that the above is only a preferred embodiment of the present utility model and the technical principle applied. It will be understood by those skilled in the art that the present utility model is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the utility model. Therefore, while the utility model has been described in connection with the above embodiments, the utility model is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the utility model, which is set forth in the following claims.