CN115424554B - Array substrate, VT test method thereof, display panel and display device - Google Patents
Array substrate, VT test method thereof, display panel and display device Download PDFInfo
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- CN115424554B CN115424554B CN202211204011.2A CN202211204011A CN115424554B CN 115424554 B CN115424554 B CN 115424554B CN 202211204011 A CN202211204011 A CN 202211204011A CN 115424554 B CN115424554 B CN 115424554B
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- 239000000758 substrate Substances 0.000 title claims abstract description 75
- 238000010998 test method Methods 0.000 title claims description 6
- 238000012360 testing method Methods 0.000 claims abstract description 100
- 230000002159 abnormal effect Effects 0.000 claims description 11
- 238000003860 storage Methods 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000001514 detection method Methods 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 239000002699 waste material Substances 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 19
- 238000005259 measurement Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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Abstract
The embodiment of the invention discloses an array substrate, a VT testing method thereof, a display panel and a display device. The array substrate comprises a plurality of pixel circuits which are arranged in an array manner, wherein each pixel circuit comprises a driving module, a first initializing module and a second initializing module; a plurality of test circuits including a switching unit and a test signal line; in the test stage of the pixel circuit, the first control signal end controls the first initialization module to be conducted, the second control signal end controls the second initialization module to be conducted, the third control signal end controls the switch unit to be turned off, and the pixel circuit is tested according to the output current of the test signal line. According to the embodiment of the invention, the detection of the pixel circuit on the array substrate is carried out before the light-emitting element is transferred to the array substrate, so that the waste of the light-emitting element can be reduced, and the production cost is reduced.
Description
Technical Field
The embodiment of the invention relates to a display technology, in particular to an array substrate, a VT test method thereof, a display panel and a display device.
Background
With the development of information society, various forms of display devices for displaying images are increasingly required, and in recent years, various display devices such as a Liquid Crystal Display (LCD), a Plasma Display Panel (PDP), and an organic light emitting display device (OLED) have been utilized.
In the manufacturing process of the display panel, the active luminous display panel comprises the steps of manufacturing an array substrate, preparing (or transferring) a luminous element, packaging and the like. In the process of manufacturing a display panel, it is generally necessary to test the array substrate to determine whether it has a defect. However, the conventional detection method of the driving circuit is to perform visual detection by driving the light emitting element to emit light through the array substrate after the preparation of the light emitting element is completed. Especially for a high-resolution Micro light emitting diode (Micro LED) display panel, once the array substrate is disqualified, the light emitting elements transferred to the array substrate are scrapped together, and the cost is wasted.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a VT test method thereof, a display panel and a display device, which are used for detecting a pixel circuit on the array substrate before a light-emitting element is transferred to the array substrate, so that the waste of the light-emitting element can be reduced, and the production cost is reduced.
In a first aspect, an embodiment of the present invention provides an array substrate, including:
the pixel circuits are arranged in an array, each pixel circuit comprises a driving module, a first initializing module and a second initializing module, a first end of each driving module is electrically connected with a first power voltage end, a second end of each driving module is electrically connected with a first electrode of a light-emitting element, a first end of each first initializing module is electrically connected with a reference signal end, a second end of each first initializing module is electrically connected with a control end of each driving module, a control end of each first initializing module is electrically connected with a first control signal end, a control end of each second initializing module is electrically connected with a second control signal end, and a second end of each second initializing module is electrically connected with a first electrode of the light-emitting element;
The test circuits comprise a switch unit and a test signal wire, the control end of the switch unit is electrically connected with a third control signal end, the first end of the switch unit is electrically connected with the reference signal end, the second end of the switch unit is electrically connected with the first end of the second initialization module, the first end of the test signal wire is electrically connected with the first end of the second initialization module, and the second end of the test signal wire is used for outputting a test signal;
in the test stage of the pixel circuit, the first control signal end controls the first initialization module to be conducted, the second control signal end controls the second initialization module to be conducted, the third control signal end controls the switch unit to be turned off, and the pixel circuit is tested according to the output current of the test signal line.
In a second aspect, an embodiment of the present invention further provides a VT testing method for an array substrate, which is suitable for testing the array substrate, where the VT testing method includes:
The third control signal end controls the switch unit to be turned off;
The first control signal end controls the first initialization module to be conducted, and the second control signal end controls the second initialization module to be conducted;
the pixel circuit is tested according to the output current of the test signal line.
In a third aspect, an embodiment of the present invention further provides a display panel, including the above array substrate.
In a fourth aspect, an embodiment of the present invention further provides a display device, including the display panel described above.
The array substrate provided by the embodiment of the invention comprises a plurality of pixel circuits which are arranged in an array, wherein each pixel circuit comprises a driving module, a first initializing module and a second initializing module, a first end of each driving module is electrically connected with a first power voltage end, a second end of each driving module is electrically connected with a first electrode of a light-emitting element, a first end of each first initializing module is electrically connected with a reference signal end, a second end of each first initializing module is electrically connected with a control end of each driving module, a control end of each first initializing module is electrically connected with a first control signal end, a control end of each second initializing module is electrically connected with a second control signal end, and a second end of each second initializing module is electrically connected with a first electrode of the light-emitting element; the test circuits comprise a switch unit and a test signal wire, the control end of the switch unit is electrically connected with a third control signal end, the first end of the switch unit is electrically connected with a reference signal end, the second end of the switch unit is electrically connected with the first end of the second initialization module, the first end of the test signal wire is electrically connected with the first end of the second initialization module, and the second end of the test signal wire is used for outputting a test signal. According to the array substrate structure provided by the embodiment of the invention, before the light-emitting element is prepared, the first initialization module is controlled to be conducted through the first control signal end, the second initialization module is controlled to be conducted through the second control signal end, the switch unit is controlled to be turned off through the third control signal end, when a preset driving current is applied to the pixel circuit, the driving current can be output through the test signal line, then whether the pixel circuit can normally work or not is tested according to the output current of the test signal line, for example, when the light-emitting element is driven to display a black picture, the theoretical driving current is 0, when the output current is larger, the pixel circuit is indicated to be abnormal, when the light-emitting element is driven to display a white picture, the theoretical driving current is larger, and when the output current is smaller, the pixel current is indicated to be abnormal. The embodiment of the invention can avoid that the array substrate can only be discarded together with the light-emitting element transferred to the array substrate when the array substrate is required to be discarded due to the problem. The problem of waste of the luminous element is solved, and meanwhile, the production cost is reduced.
Drawings
FIG. 1 is a schematic diagram of a pixel circuit in the prior art;
fig. 2 is a schematic diagram of a local circuit structure of an array substrate according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a partial structure of an array substrate according to an embodiment of the present invention;
Fig. 4 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a partial circuit structure of another array substrate according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a partial circuit structure of another array substrate according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a partial circuit structure of another array substrate according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a partial circuit structure of another array substrate according to an embodiment of the present invention;
FIG. 9 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 10 is a flow chart of a VT testing method of an array substrate according to an embodiment of the present invention;
FIG. 11 is a flowchart illustrating another VT testing method of an array substrate according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. It should be noted that, the terms "upper", "lower", "left", "right", and the like in the embodiments of the present invention are described in terms of the angles shown in the drawings, and should not be construed as limiting the embodiments of the present invention. In addition, in the context, it will also be understood that when an element is referred to as being formed "on" or "under" another element, it can be directly formed "on" or "under" the other element or be indirectly formed "on" or "under" the other element through intervening elements. The terms "first," "second," and the like, are used for descriptive purposes only and not for any order, quantity, or importance, but rather are used to distinguish between different components. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
Fig. 1 is a schematic diagram of a pixel circuit in the prior art. Referring to fig. 1, the pixel circuit includes seven transistors M1' to M7' and a capacitor Cst ' to drive a light emitting element LED, which may be an OLED or a Micro LED, to emit light. In the prior art, the VT test is generally performed by lighting the light emitting element after the pixel circuit and the light emitting element are manufactured, but it is difficult to determine whether the light emitting element is faulty or the pixel circuit is faulty. The prior art does not have a scheme for performing VT testing prior to forming the light emitting element. Detecting after the light-emitting element is manufactured, if the pixel circuit fails, only the pixel circuit can be scrapped together with the light-emitting element, and the cost is wasted; for Micro LED display panels supporting higher resolution, more light emitting elements are needed, so VT testing before forming the light emitting elements is more necessary.
In order to solve the above problems, an embodiment of the present invention provides an array substrate, which includes a plurality of pixel circuits arranged in an array and a plurality of test circuits. Fig. 2 is a schematic diagram of a local circuit structure of an array substrate according to an embodiment of the present invention. Referring to fig. 2, the pixel circuit 10 includes a driving module 11, a first initializing module 12, and a second initializing module 13, wherein a first end of the driving module 11 is electrically connected to a first power voltage end PVDD, a second end of the driving module 11 is electrically connected to a first electrode of a light emitting element (for example, may be an LED), a first end of the first initializing module 12 is electrically connected to a reference signal end Vref, a second end of the first initializing module 12 is electrically connected to a control end of the driving module 11, a control end of the first initializing module 12 is electrically connected to a first control signal end S1, a control end of the second initializing module 13 is electrically connected to a second control signal end S2, and a second end of the second initializing module 13 is electrically connected to a first electrode of the light emitting element; the test circuit 20 includes a switch unit 21 and a test signal line 22, wherein a control end of the switch unit 21 is electrically connected with the third control signal end S3, a first end of the switch unit 21 is electrically connected with the reference signal end Vref, a second end of the switch unit 21 is electrically connected with a first end of the second initialization module 13, a first end of the test signal line 22 is electrically connected with a first end of the second initialization module 13, and a second end of the test signal line 22 is used for outputting a test signal; in the testing stage of the pixel circuit 10, the first control signal terminal S1 controls the first initialization module 12 to be turned on, the second control signal terminal S2 controls the second initialization module 13 to be turned on, the third control signal terminal S3 controls the switch unit 21 to be turned off, and the pixel circuit 10 is tested according to the output current of the test signal line 22.
The driving module 11 is configured to drive the light emitting element LED to emit light according to the data signal, and the driving module 11 may include a driving transistor formed of an N-type transistor or a P-type transistor. In specific implementation, the first end of the driving module 11 may be electrically connected to the first power voltage end PVDD directly, or may be indirectly electrically connected through other elements disposed therebetween, or may be coupled. The first initialization module 12 is used for initializing the voltage of the first node N1, and the second initialization module 13 is used for initializing the voltage of the first electrode of the light emitting element LED. Optionally, during the display stage of the light emitting element, the third control signal terminal S3 controls the switch unit 21 to be turned on. In the initialization stage of the normal operation of the pixel circuit 10, the third control signal terminal S3 controls the switch unit 21 to be turned on, and the reference voltage provided by the reference signal terminal Vref realizes the initialization of the first node N1 and the first electrode of the light emitting element. When the pixel circuit is tested, the third control signal terminal S3 controls the switch unit 21 to be turned off, wherein the switch unit 21 may be a thin film transistor, the first control signal terminal S1 controls the first initialization module 12 to be turned on, the reference voltage provided by the reference signal terminal Vref is transmitted to the first node N1, the driving current of the driving module 11 is controlled, the second control signal terminal S2 controls the second initialization module 13 to be turned on, the driving current is output through the test signal line 22 after passing through the second initialization module 13, and whether the pixel circuit is abnormal or not can be tested by testing whether the output current is consistent with the preset driving current. In particular, the current output by the test signal line 22 may be measured using an external ammeter, which is not limited in this embodiment of the present invention.
According to the array substrate structure provided by the embodiment of the invention, before the light-emitting element is prepared, the first initialization module is controlled to be conducted through the first control signal end, the second initialization module is controlled to be conducted through the second control signal end, the switch unit is controlled to be turned off through the third control signal end, when a preset driving current is applied to the pixel circuit, the driving current can be output through the test signal line, then whether the pixel circuit can normally work or not is tested according to the output current of the test signal line, for example, when the light-emitting element is driven to display a black picture, the theoretical driving current is 0, when the output current is larger, the pixel circuit is indicated to be abnormal, when the light-emitting element is driven to display a white picture, the theoretical driving current is larger, and when the output current flows through a small, the pixel current is indicated to be abnormal. The embodiment of the invention can avoid that the array substrate can only be discarded together with the light-emitting element transferred to the array substrate when the array substrate is required to be discarded due to the problem. The problem of waste of the luminous element is solved, and meanwhile, the production cost is reduced.
In the embodiment shown in fig. 2, the pixel circuits are in one-to-one correspondence with the test circuits, and each test signal line outputs a driving current of one pixel circuit, so that the test of each pixel circuit can be realized, and the test precision is higher. In another embodiment, optionally, a plurality of pixel circuits are electrically connected to the first end of the same test signal line.
For example, fig. 3 is a schematic partial structure of an array substrate according to an embodiment of the present invention, and referring to fig. 3, the array substrate shows 4 pixel circuits 10 (specific structures of the pixel circuits 10 are not shown in fig. 3) and 4 test circuits, and each pixel circuit 10 is electrically connected to the same test signal line 22 (a switch unit is not shown in fig. 3), so that measurement can be performed on multiple pixel circuits 10 at the same time, and measurement difficulty is reduced. The method is also beneficial to reducing the number of wires in the array substrate and reducing the design difficulty of the array substrate. In addition, since each pixel circuit 10 can individually control whether or not a driving current is applied, an independent test of the pixel circuit can be realized even when a plurality of pixel circuits 10 are connected to the same test signal line 22.
Fig. 4 is a schematic structural diagram of an array substrate according to an embodiment of the present invention, and referring to fig. 4, alternatively, the same row of pixel circuits 10 are electrically connected to the first ends of the same test signal lines 22, and may be designed according to practical situations in implementation, which is not limited in this embodiment of the present invention. By providing the same row of pixel circuits 10 electrically connected to the first ends of the same test signal lines 22, row-by-row detection of pixel circuits can be achieved, and the detection speed can be effectively increased relative to a single detection pixel circuit.
Fig. 5 is a schematic diagram of a local circuit structure of another array substrate according to an embodiment of the present invention. Referring to fig. 5, the pixel circuit 10 may further include a data writing module 14, a threshold compensation module 15, a storage module 16, and a light emission control module 17; the first end of the Data writing module 14 is electrically connected with the Data signal end Data, the control end of the Data writing module 15 is electrically connected with the fourth control signal end S4, and the second end of the Data writing module 14 is electrically connected with the first end of the driving module 11; the first end of the threshold compensation module 15 is electrically connected with the second end of the driving module 11, the second end of the threshold compensation module 15 is electrically connected with the control end of the driving module 11, and the control end of the threshold compensation module 15 is electrically connected with the fifth control signal end S5; a first end of the memory module 16 is electrically connected to the first power supply voltage end PVDD, and a second end of the memory module 16 is electrically connected to the control end of the driving module 11; the light emission control module 17 includes a first light emission control module 171 and a second light emission control module 172, the first end of the first light emission control module 171 is electrically connected to the first power supply voltage end PVDD, the second end of the first light emission control module 171 is electrically connected to the first end of the driving module 11, the control end of the first light emission control module 171 is electrically connected to the enable signal end Emit, the first end of the second light emission control module 172 is electrically connected to the second end of the driving module 11, the second end of the second light emission control module 172 is electrically connected to the first electrode of the light emitting element, the control end of the second light emission control module 172 is electrically connected to the enable signal end Emit, and the second electrode of the light emitting element is electrically connected to the second power supply voltage end PVEE.
The data writing module 14 is configured to write a data signal to the first node N1 under the control of the fourth control signal terminal S4, where the data signal is configured to control the magnitude of the driving current output by the driving module 11, so as to control the brightness of the light emitting element. In implementation, when the Data writing module 14 writes the Data signal into the first node N1, the fifth control signal terminal S5 controls the threshold compensating module 15 to be turned on, the Data voltage V Data provided by the Data signal terminal Data is written into the first node N1 through the driving module 11 and the threshold compensating module 15, the voltage of the second node N2 (the first terminal of the driving module 11) is V Data, the voltage of the first node N1 is V Data-Vth, V th is the threshold voltage of the driving transistor in the driving module, and the amount related to V th in the current formula of the light emitting element can be eliminated by pre-storing the voltage related to V th in the first node N1, so that the current flowing through the light emitting element is independent of V th, and threshold compensation is achieved. The memory module 16 is used for maintaining the potential of the first node N1 when the light emitting element is in the light emitting phase. The first light emission control module 171 and the second light emission control module 172 are used to conduct in the light emission phase, and make the driving current flow through the light emitting element to emit light. In one embodiment, the first electrode of the light emitting device is an anode, the second electrode is a cathode, the first power voltage terminal PVDD provides an anode voltage, and the second power voltage terminal PVEE provides a cathode voltage.
Fig. 6 is a schematic diagram of a partial circuit structure of another array substrate according to an embodiment of the present invention. Referring to fig. 6, fig. 6 shows a specific pixel circuit structure, alternatively, the driving module 11 includes a driving transistor M3, the first initializing module 12 includes a first transistor M5, the second initializing module 13 includes a second transistor M7, the data writing module 14 includes a third transistor M2, the threshold compensating module 15 includes a fourth transistor M4, the first light emitting control module 171 includes a fifth transistor M1, the second light emitting control module 172 includes a sixth transistor M6, and the storage module 16 includes a first capacitor Cst. The switching unit 21 includes a seventh transistor M8.
In the embodiment, the transistors in the pixel circuit may include P-type transistors, N-type transistors, or both P-type and N-type transistors, and the transistors in the pixel circuit shown in this embodiment are all exemplified by P-type transistors, which is not a limitation of the embodiments of the present invention.
Fig. 7 is a schematic diagram of a partial circuit structure of another array substrate according to an embodiment of the present invention. Referring to fig. 7, the fourth control signal terminal S4 is optionally multiplexed into the fifth control signal terminal S5.
It can be appreciated that, since the data writing module 14 and the threshold compensation module 15 are turned on simultaneously in the data writing stage, that is, the third transistor M2 and the fourth transistor M4 are turned on simultaneously, when the types of the third transistor M2 and the fourth transistor M4 are the same, the fourth control signal terminal S4 can be multiplexed into the fifth control signal terminal S5, thereby reducing the number of control signal terminals and simplifying the circuit structure.
Fig. 8 is a schematic diagram of a partial circuit structure of another array substrate according to an embodiment of the present invention. Referring to fig. 8, alternatively, the first control signal terminal S1 is multiplexed into the second control signal terminal S2.
In this embodiment, the first initialization module 12 and the second initialization module 13 both receive the initialization signal provided by the reference signal terminal Vref, and the initialization of the driving module 11 and the light emitting element can be performed simultaneously, i.e. the first control signal terminal S1 can be multiplexed into the second control signal terminal S2, so as to reduce the number of control signal terminals and simplify the circuit structure.
In another embodiment, optionally, the array substrate further includes m×n data lines, n data signal terminals, and a multiplexer, where the multiplexer includes n input terminals and n output terminals; the ith data signal end is connected with the ith input end of the multiplexer; the data line is electrically connected with the first end of the data writing module of the pixel circuit in a column, one end of the ith multiplied by j data line is electrically connected with the ith output end of the multiplexer, and the ith data signal end provides a data signal for the ith multiplied by j data line; wherein i is more than or equal to 1 and less than or equal to n, j is more than or equal to 1 and less than or equal to m, n is more than or equal to 2, m is more than or equal to 2, and i, j, n, m are integers.
Fig. 9 is a schematic structural diagram of another array substrate according to an embodiment of the present invention. Referring to fig. 9, taking m=3 and n=2 as an example, the array substrate includes 6 Data lines D1 to D6, 2 Data signal terminals Data1 and Data2, and a multiplexer 30, the multiplexer 30 includes 2 input terminals and 2 output terminals, and specifically, the multiplexer 30 includes 2 switches K1 and K2, and control terminals of K1 and K2 are connected to the control terminal S. Wherein the Data signal terminal Data1 is connected to a first terminal of the switch K1 (input terminal of the multiplexer 30), a second terminal of the switch K1 is connected to the odd column Data lines (D1, D3 and D5), the Data signal terminal Data2 is connected to a first terminal of the switch K2, and a second terminal of the switch K2 is connected to the even column Data lines (D2, D4 and D6).
It will be appreciated that when the pixel circuit detection is performed, the greater the number of pixel circuits detected at the same time, the faster the detection speed, but the error of measurement increases, and in order to reduce the measurement error, the error can be reduced by multiplexing the data signals using the configuration shown in fig. 9. For example, in the embodiment of fig. 9, the odd-numbered column data lines and the even-numbered column data lines are connected to different data signal terminals, and the original simultaneous testing of the whole row of pixel circuits can be changed into the simultaneous testing of the half-row pixel circuits during the testing, so that the higher the number of the data signal terminals, the higher the testing precision.
Fig. 10 is a flow chart of a VT testing method of an array substrate according to an embodiment of the present invention, where the VT testing method is applicable to testing any one of the array substrates provided in the foregoing embodiment, and referring to fig. 10, the VT testing method includes:
Step S110, the third control signal end controls the switch unit to be turned off.
The switching unit may include a thin film transistor, for example, when the switching unit is a P-type transistor, the third control signal terminal provides a high level signal to the control terminal of the switching unit, so that the switching unit is turned off; when the switch unit is an N-type transistor, the third control signal end provides a low-level signal for the control end of the switch unit so as to switch off the switch unit.
In step S120, the first control signal terminal controls the first initialization module to be turned on, and the second control signal terminal controls the second initialization module to be turned on.
When the switch unit is turned off, the reference signal end is only conducted with the first initialization module, when the first initialization module is conducted, the reference voltage provided by the reference signal end can be transmitted to the first node, and when the reference voltage controls the drive module to be conducted, the drive current is output by the test signal line after passing through the drive module and the second initialization module.
Step S130, testing the pixel circuit according to the output current of the test signal line.
In practice, the output voltage of the reference signal terminal can be controlled to form different driving currents. For example, in one embodiment, optionally, testing the pixel circuit according to the output current of the test signal line includes:
the control reference signal end outputs a first level signal, and the driving module is turned off.
If the output current of the test signal line is larger than the first current value, the pixel circuit to be tested is abnormal.
For example, when the driving transistor is a P-type transistor, the first level signal is a high level signal, when the driving transistor is an N-type transistor, the first level signal is a low level signal, the driving transistor is turned off, a black picture is correspondingly displayed at the moment, no driving current is present in the pixel circuit, and in consideration of the existence of errors, the errors are generally in the μa magnitude, so that the magnitude of the first current value can be set to the μa magnitude, specific values can be set in a calibrated manner according to actual conditions, and when the output current is larger than the first current value, the pixel circuit is indicated to have larger leakage current when the pixel circuit is turned off, and the pixel circuit is abnormal.
In another embodiment, optionally, testing the pixel circuit according to the output current of the test signal line includes:
The control reference signal end outputs a second level signal, and the driving module is conducted.
If the output current of the test signal line is smaller than the second current value, the pixel circuit to be tested is abnormal.
For example, when the driving transistor is a P-type transistor, the first level signal is a low level signal, when the driving transistor is an N-type transistor, the first level signal is a high level signal, at this time, the driving transistor is turned on, at this time, a white picture is correspondingly displayed, a driving current flows through the pixel circuit, for example, when the white picture is displayed, the driving current is 0.5mA, so that the magnitude of the second current value can be set near 0.5mA, a specific value can be set in a calibrated manner according to the actual situation, and when the output current is smaller than the second current value, the pixel circuit is indicated to be too small in current when the pixel circuit is turned on, and the pixel circuit is abnormal.
Fig. 11 is a flowchart of another VT testing method of an array substrate according to an embodiment of the present invention, where the VT testing method is applicable to the array substrate in fig. 9, and referring to fig. 11, the VT testing method includes:
step S210, the third control signal end controls the switch unit to be turned off.
In step S220, the fourth control signal end controls the data writing module to be turned on, the fifth control signal end controls the threshold compensation module to be turned on, and the ith data signal end provides data signals for the ith×j data line through the multiplexer so as to enable the driving module of the corresponding pixel circuit to write the data signals.
In step S230, the second control signal terminal controls the second initialization module to be turned on.
Step S240, the pixel circuit is tested according to the output current of the test signal line.
The embodiment in fig. 11 is different from the embodiment in fig. 10 in that the embodiment in fig. 10 controls the on or off of the driving module by using a signal provided from the reference signal terminal, the embodiment in fig. 11 controls the driving module to be on by using a data signal provided from the data writing module, and then tests the pixel circuit according to the output current of the test signal line. In addition, the embodiment in fig. 11 tests part of the circuits in a row of pixel circuits in a multiplexing manner, which is beneficial to improving the test accuracy.
The embodiment of the invention also provides a display panel, which comprises any one of the array substrates provided by the embodiment. Since the display panel provided by the embodiment of the present invention includes any one of the array substrates provided by the above embodiment, the display panel has the same or corresponding technical effects as those of the array substrate, and will not be described in detail herein.
Fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention. Referring to fig. 12, the display device 1 includes a display panel 2 provided in an embodiment of the present invention. The display device 1 may be a mobile phone, a computer, an intelligent wearable device, etc.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (15)
1. An array substrate, characterized by comprising:
the pixel circuits are arranged in an array, each pixel circuit comprises a driving module, a first initializing module and a second initializing module, a first end of each driving module is electrically connected with a first power voltage end, a second end of each driving module is electrically connected with a first electrode of a light-emitting element, a first end of each first initializing module is electrically connected with a reference signal end, a second end of each first initializing module is electrically connected with a control end of each driving module, a control end of each first initializing module is electrically connected with a first control signal end, a control end of each second initializing module is electrically connected with a second control signal end, and a second end of each second initializing module is electrically connected with a first electrode of the light-emitting element;
The test circuits comprise a switch unit and a test signal wire, the control end of the switch unit is electrically connected with a third control signal end, the first end of the switch unit is electrically connected with the reference signal end, the second end of the switch unit is electrically connected with the first end of the second initialization module, the first end of the test signal wire is electrically connected with the first end of the second initialization module, and the second end of the test signal wire is used for outputting a test signal;
in the test stage of the pixel circuit, the first control signal end controls the first initialization module to be conducted, the second control signal end controls the second initialization module to be conducted, the third control signal end controls the switch unit to be turned off, and the pixel circuit is tested according to the output current of the test signal line.
2. The array substrate of claim 1, wherein a plurality of the pixel circuits are electrically connected to a first end of the same test signal line.
3. The array substrate of claim 2, wherein the pixel circuits of the same row are electrically connected to the first ends of the same test signal line.
4. The array substrate of claim 1, wherein the pixel circuit further comprises a data writing module, a threshold compensation module, a storage module, and a light emission control module;
The first end of the data writing module is electrically connected with the data signal end, the control end of the data writing module is electrically connected with the fourth control signal end, and the second end of the data writing module is electrically connected with the first end of the driving module;
The first end of the threshold compensation module is electrically connected with the second end of the driving module, the second end of the threshold compensation module is electrically connected with the control end of the driving module, and the control end of the threshold compensation module is electrically connected with the fifth control signal end;
The first end of the storage module is electrically connected with the first power supply voltage end, and the second end of the storage module is electrically connected with the control end of the driving module;
The light emitting control module comprises a first light emitting control module and a second light emitting control module, wherein a first end of the first light emitting control module is electrically connected with a first power supply voltage end, a second end of the first light emitting control module is electrically connected with a first end of the driving module, a control end of the first light emitting control module is electrically connected with an enabling signal end, a first end of the second light emitting control module is electrically connected with a second end of the driving module, a second end of the second light emitting control module is electrically connected with a first electrode of the light emitting element, and a control end of the second light emitting control module is electrically connected with the enabling signal end.
5. The array substrate of claim 4, wherein the driving module comprises a driving transistor, the first initializing module comprises a first transistor, the second initializing module comprises a second transistor, the data writing module comprises a third transistor, the threshold compensation module comprises a fourth transistor, the first light emitting control module comprises a fifth transistor, the second light emitting control module comprises a sixth transistor, and the storage module comprises a first capacitor.
6. The array substrate of claim 4, wherein the fourth control signal terminal is multiplexed to the fifth control signal terminal.
7. The array substrate according to claim 1, wherein the third control signal terminal controls the switch unit to be turned on during a display stage of the light emitting element.
8. The array substrate of claim 1, wherein the first control signal terminal is multiplexed to the second control signal terminal.
9. The array substrate of claim 4, further comprising m x n data lines, n data signal terminals, and a multiplexer, the multiplexer comprising n input terminals and n output terminals;
The ith data signal end is connected with the ith input end of the multiplexer;
the data line is electrically connected with a first end of the data writing module of a column of the pixel circuits, one end of the ith x j data line is electrically connected with an ith output end of the multiplexer, and the ith data signal end provides a data signal for the ith x j data line;
wherein i is more than or equal to 1 and less than or equal to n, j is more than or equal to 1 and less than or equal to m, n is more than or equal to 2, m is more than or equal to 2, and i, j, n, m are integers.
10. A VT testing method for an array substrate, which is suitable for testing the array substrate according to any one of claims 1 to 9, the VT testing method comprising:
The third control signal end controls the switch unit to be turned off;
The first control signal end controls the first initialization module to be conducted, and the second control signal end controls the second initialization module to be conducted;
the pixel circuit is tested according to the output current of the test signal line.
11. The VT test method of the array substrate according to claim 10, wherein the testing the pixel circuit according to the output current of the test signal line includes:
the control reference signal end outputs a first level signal, and the driving module is turned off;
if the output current of the test signal line is larger than the first current value, the pixel circuit to be tested is abnormal.
12. The VT test method of the array substrate according to claim 10, wherein the testing the pixel circuit according to the output current of the test signal line includes:
the control reference signal end outputs a second level signal, and the driving module is conducted;
if the output current of the test signal line is smaller than the second current value, the pixel circuit to be tested is abnormal.
13. A VT testing method for an array substrate, adapted to the array substrate of claim 9, the VT testing method comprising:
The third control signal end controls the switch unit to be turned off;
The fourth control signal end controls the data writing module to be conducted, the fifth control signal end controls the threshold compensation module to be conducted, and the ith data signal end provides data signals for the ith x j data line through the multiplexer so as to enable the driving module of the corresponding pixel circuit to write the data signals;
the second control signal end controls the second initialization module to be conducted;
the pixel circuit is tested according to the output current of the test signal line.
14. A display panel comprising the array substrate of any one of claims 1 to 9.
15. A display device comprising the display panel of claim 14.
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| CN116148634A (en) * | 2023-02-13 | 2023-05-23 | 深圳市鑫达辉软性电路科技有限公司 | Empty board testing system and method for Mini Led substrate |
| TWI848701B (en) * | 2023-05-12 | 2024-07-11 | 友達光電股份有限公司 | Pixel detection device and pixel detection method |
| CN118038777B (en) * | 2024-04-12 | 2024-07-30 | 北京数字光芯集成电路设计有限公司 | Test circuit of active drive array in Micro-LED display panel |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106448560A (en) * | 2016-12-21 | 2017-02-22 | 上海天马有机发光显示技术有限公司 | Organic light emitting display panel and driving method thereof, and organic light emitting display device |
| CN106531074A (en) * | 2017-01-10 | 2017-03-22 | 上海天马有机发光显示技术有限公司 | Organic light emitting pixel drive circuit, drive method and organic light emitting display panel |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110335564A (en) * | 2019-06-29 | 2019-10-15 | 上海天马有机发光显示技术有限公司 | A kind of array substrate, display panel and display device |
| CN111145686B (en) * | 2020-02-28 | 2021-08-17 | 厦门天马微电子有限公司 | Pixel driving circuit, display panel and driving method |
| CN111627380A (en) * | 2020-06-29 | 2020-09-04 | 武汉天马微电子有限公司 | Pixel circuit, array substrate and display panel |
| CN111951729B (en) * | 2020-08-17 | 2023-06-09 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
| CN112652270B (en) * | 2020-12-28 | 2021-11-23 | 武汉天马微电子有限公司 | Pixel circuit, display panel and display device |
| CN112908246A (en) * | 2021-02-24 | 2021-06-04 | 昆山国显光电有限公司 | Pixel circuit, driving method thereof and display panel |
| CN114267274A (en) * | 2021-12-20 | 2022-04-01 | 成都天马微电子有限公司 | Array substrate and detection method thereof, light-emitting panel and display device |
| CN114299859B (en) * | 2021-12-30 | 2023-05-30 | 湖北长江新型显示产业创新中心有限公司 | Array substrate, driving method thereof, display panel and display device |
| CN114758624B (en) * | 2022-03-31 | 2023-07-04 | 武汉天马微电子有限公司 | Pixel circuit, driving method thereof, array substrate, display panel and display device |
| CN115101022A (en) * | 2022-06-30 | 2022-09-23 | 厦门天马显示科技有限公司 | Pixel driving circuit, display panel and display device |
-
2022
- 2022-09-29 CN CN202211204011.2A patent/CN115424554B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106448560A (en) * | 2016-12-21 | 2017-02-22 | 上海天马有机发光显示技术有限公司 | Organic light emitting display panel and driving method thereof, and organic light emitting display device |
| CN106531074A (en) * | 2017-01-10 | 2017-03-22 | 上海天马有机发光显示技术有限公司 | Organic light emitting pixel drive circuit, drive method and organic light emitting display panel |
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