CN114220389A

CN114220389A - Pixel driving circuit and driving method thereof, display panel and device

Info

Publication number: CN114220389A
Application number: CN202111579765.1A
Authority: CN
Inventors: 张玥玮; 马从华
Original assignee: Shanghai AVIC Optoelectronics Co Ltd
Current assignee: Shanghai AVIC Optoelectronics Co Ltd
Priority date: 2021-12-22
Filing date: 2021-12-22
Publication date: 2022-03-22

Abstract

The invention provides a pixel driving circuit, a driving method thereof, a display panel and a device, relates to the technical field of display, and aims to solve the problem of residual image caused by the difference of threshold values of driving tubes when a display panel comprising an AM OLED (organic light emitting diode), an AM Mini LED or a Micro LED is lightened. In the pixel driving circuit, a control electrode of the driving transistor is electrically connected with a first node, and the first electrode is electrically connected with a second node; the second pole is electrically connected with a third node which is electrically connected with the light-emitting element; the data writing module writes the signal of the data signal end into the second node in the data writing stage; the threshold offset difference compensation module provides a signal of the offset signal end to the second node or the third node in the threshold offset difference compensation stage; under the action of a signal of a bias signal end, the driving transistor is biased to be conducted; the light-emitting control module is used for writing a signal of a power supply voltage end into the light-emitting element in a light-emitting stage.

Description

Pixel driving circuit and driving method thereof, display panel and device

[ technical field ] A method for producing a semiconductor device

The invention relates to the technical field of display, in particular to a pixel driving circuit, a driving method thereof, a display panel and a device.

[ background of the invention ]

At present, Light Emitting technologies including Active-Matrix Organic Light-Emitting diodes (AM OLEDs), Active-Matrix Micro Light-Emitting diodes (AM Mini LEDs), Micro Light-Emitting diodes (Micro LEDs), and the like have the characteristics of fast response, wide color gamut, large viewing angle, high brightness, and the like, and thus are gradually becoming mainstream display technologies of displays such as mobile phones, televisions, computers, and the like. In addition, the AM Mini LED and the Micro LED can also be used as backlight in medium and large size display screens, such as vehicle-mounted display screens, flat panels and televisions, to realize area backlight adjustment of the medium and large size display screens, and to improve the contrast and the stereoscopic display effect of the display screens.

At present, when a display device comprising an AM OLED, an AM Mini LED and a Micro LED is lighted, the problem of residual image caused by the drift difference of the threshold values of driving tubes exists, and the display effect is influenced.

[ summary of the invention ]

In view of this, embodiments of the present invention provide a pixel driving circuit, a driving method thereof, a display panel and a device, so as to improve the problem of image sticking caused by the threshold drift difference of the driving tubes when the display panel including the AM OLED, the AM Mini LED or the Micro LED is turned on.

In one aspect, an embodiment of the present invention provides a pixel driving circuit, including:

the control electrode of the driving transistor is electrically connected with a first node, and the first electrode of the driving transistor is electrically connected with a second node; the second pole of the driving transistor is electrically connected with a third node which is electrically connected with the light-emitting element;

the data writing module is used for writing the signal of the data signal end into the second node in a data writing stage;

a threshold offset difference compensation module for providing a signal of an offset signal terminal to the second node or the third node during a threshold offset difference compensation phase; under the action of a signal of the bias signal end, the driving transistor is biased to be conducted;

and the light-emitting control module is used for writing a signal of a power supply voltage end into the light-emitting element in a light-emitting stage.

In another aspect, an embodiment of the invention provides a display panel, which includes the pixel driving circuit described above.

In another aspect, an embodiment of the present invention provides a display device, including the display panel described above.

In a further aspect, an embodiment of the present invention provides a driving method for a pixel driving circuit, where the pixel driving circuit includes a driving transistor, a data writing module, a threshold offset difference compensation module, and a light emitting control module;

the data signal end is electrically connected with the second node through the data writing module, and the bias signal end is electrically connected with the second node or the third node through the threshold offset difference compensation module;

the power supply voltage end is electrically connected with the light-emitting element through the light-emitting control module;

the driving period of the pixel driving circuit comprises a data writing stage, a threshold value offset difference compensation stage and a light emitting stage;

the driving method includes:

in the data writing stage, the data writing module writes the signal of the data signal end into the second node;

in the threshold offset difference compensation phase, the threshold offset difference compensation module provides a signal of an offset signal end to the second node or the third node; under the action of a signal of the bias signal end, the driving transistor is biased to be conducted;

and in the light-emitting stage, the light-emitting control module is used for writing a signal of a power supply voltage end into a light-emitting element.

According to the pixel driving circuit and the driving method thereof, the display panel and the device provided by the embodiment of the invention, the threshold value offset difference compensation module is arranged in the pixel driving circuit, so that a threshold value offset difference compensation stage can be additionally arranged in the working period of the pixel driving circuit, and in the threshold value offset difference compensation stage, the driving transistor is in bias conduction under the action of the bias signal end, and the driving transistor is in a saturated state. By the arrangement, the problem of inconsistent threshold voltage drift caused by the driving transistor in the data writing stage can be solved. Even if different data voltages are respectively written into the pixel driving circuit in different working periods, the threshold voltage offset of the driving transistor tends to be consistent by the arrangement of the threshold offset difference compensation module before the light-emitting stage of each working period is started, and the display afterimage phenomenon can be improved.

[ description of the drawings ]

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention;

FIG. 2 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 4 is a diagram of a pixel driving circuit according to another embodiment of the present invention;

FIG. 5 is a diagram illustrating a pixel driving circuit according to another embodiment of the present invention;

FIG. 6 is a diagram of a pixel driving circuit according to another embodiment of the present invention;

FIG. 7 is a diagram of a pixel driving circuit according to another embodiment of the present invention;

FIG. 8 is a diagram illustrating a pixel driving circuit according to another embodiment of the present invention;

FIG. 9 is a timing diagram corresponding to FIG. 8;

fig. 10 is a schematic diagram of a display device according to an embodiment of the present invention.

[ detailed description ] embodiments

For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.

It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

It should be understood that although the terms first, second, third, etc. may be used to describe transistors in embodiments of the present invention, these transistors should not be limited to these terms. These terms are only used to distinguish transistors from one another. For example, a first transistor may also be referred to as a second transistor, and similarly, a second transistor may also be referred to as a first transistor, without departing from the scope of embodiments of the present invention.

The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics. In the embodiment of the invention, the control electrode of the transistor is the gate of the transistor, and in order to distinguish two electrodes of the transistor except the gate, one electrode is called a first electrode, and the other electrode is called a second electrode. In practical operation, the first pole may be a drain, and the second pole may be a source; alternatively, the first pole may be a source and the second pole may be a drain.

As described in the background section, the display panel has an image sticking problem during display. In the process of implementing the embodiment of the present invention, the inventor researches and discovers that the reason why the image sticking problem occurs is that, in the working process of the pixel driving circuit, when two adjacent frames of pictures are displayed, the gray scales of the same sub-pixel in the two adjacent frames of pictures are different, so that the threshold voltage offset of the driving transistor is different under different gate-source voltage differences.

In view of the above, the embodiment of the invention provides a pixel driving circuit, as shown in fig. 1 and fig. 2, fig. 1 and fig. 2 are schematic diagrams of two pixel driving circuits provided in the embodiment of the invention, and the pixel driving circuit 100 includes a driving transistor M0, a data writing module 11, a threshold shift difference compensation module 12, and a light emitting control module 13.

A control electrode of the driving transistor M0 is electrically connected with the first node N1, and a first electrode of the driving transistor M0 is electrically connected with the second node N2; the second pole of the driving transistor M0 is electrically connected to the third node N3, and the third node N3 is electrically connected to the light emitting element 200. It should be noted that "electrically connected" in the embodiments of the present invention includes a direct electrical connection between two components, and also includes an indirect electrical connection between two components through other conductive elements, such as transistors and the like.

The duty cycle of the pixel driving circuit includes a data writing phase, a threshold shift difference compensation phase and a light emitting phase. The data writing module 11 is configured to write the signal of the data signal terminal Vdata into the second node N2 in the data writing phase. The light emission control module 13 is configured to write a signal of the power supply voltage terminal PVDD into the light emitting element 200 in a light emission phase, so that a light emission current flows through the light emitting element 200.

In the embodiment of the invention, the threshold shift difference compensation module 12 is configured to enable the driving transistor M0 to bias the signal V of the signal terminal during the threshold shift difference compensation phase₁Is biased on.

As shown in FIG. 1, during the threshold offset difference compensation phase, the threshold offset difference is compensatedThe compensation module 12 can bias the signal terminal V₁Is provided to the second node N2 so that the driving transistor M0 is biased on.

Alternatively, as shown in fig. 2, the threshold offset difference compensation module 12 may bias the signal terminal V during the threshold offset difference compensation phase₁Is supplied to the third node N3 so that the driving transistor M0 is biased on.

Illustratively, the threshold shift difference compensation phase is after the data writing phase and the light emitting phase is after the threshold shift difference compensation phase in one duty cycle of the pixel driving circuit.

When the pixel driving circuit 100 is in operation, in a data writing phase in one duty cycle, the data writing module 11 connects the data signal terminal Vdata and the second node N2, and the data signal Vdata is written into the second node N2; then entering a threshold deviation difference compensation stage, in which the threshold deviation difference compensation module 12 connects the second node N2 with the bias signal terminal V₁(ii) a Or the threshold offset difference compensation module 12 communicates the third node N3 with the offset signal terminal V₁The potential of the second node N2 or the third node N3 is written as a bias signal, and the driving transistor M0 is biased to be turned on; then, the lighting control module 13 connects the power supply voltage terminal PVDD to the light emitting element 200 to allow a lighting current to flow through the light emitting element 200, thereby lighting the light emitting element 200.

In the embodiment of the present invention, the threshold offset difference compensation module 12 is disposed in the pixel driving circuit 100, so that a threshold offset difference compensation stage can be added in the working cycle of the pixel driving circuit 100, and in the threshold offset difference compensation stage, the driving transistor M0 is disposed at the offset signal terminal V0₁Is biased on and the driving transistor M0 is in saturation. By such an arrangement, the problem of inconsistent threshold voltage shift caused by the driving transistor M0 in the data writing stage can be compensated. Even if the pixel driving circuit 100 writes different data voltages in different duty cycles, the threshold shift compensation module 12 is set to enable the threshold of the driving transistor M0 before entering the light emitting phase of each duty cycleThe voltage offset amount Δ Vth tends to be uniform, and the display afterimage phenomenon can be improved.

Alternatively, as shown in fig. 3 and 4, fig. 3 and 4 are schematic diagrams of two other pixel driving circuits provided by the embodiment of the invention, respectively, and the threshold offset difference compensation module 12 includes a first transistor M1 and a second transistor M2. A control electrode of the first transistor M1 is electrically connected to the first scan signal terminal S1; the control electrode of the second transistor M2 is electrically connected to the emission control signal terminal E. A first pole of the first transistor M1 and a bias signal terminal V₁Electrically, the second pole of the first transistor M1 is electrically connected to the first pole of the second transistor M2. In fig. 3, the second pole of the second transistor M2 is electrically connected to the second node N2. In fig. 4, the second pole of the second transistor M2 is electrically connected to the third node N3.

In the threshold shift difference compensation stage, the first scan signal terminal S1 and the emission control signal terminal E both output an enable level, and under the effect of the enable level, the first transistor M1 and the second transistor M2 are both turned on to bias the signal terminal V₁The bias signal provided is written to the second node N2 or the third node N3, which biases the driving transistor M0 on.

For example, the first transistor M1 may be a P-type transistor, and the enable level of the first scan signal terminal S1 is at a low level. Alternatively, the first transistor M1 may be an N-type transistor, and the enable level of the first scan signal terminal S1 is at a high level. Similarly, the second transistor M2 may be a P-type transistor, and the enable level of the emission control signal terminal E is low. Alternatively, the second transistor M2 may be an N-type transistor, and in this case, the enable level of the emission control signal terminal E is high. Fig. 3 and 4 are diagrams in which the first transistor M1 and the second transistor M2 are both N-type transistors.

Alternatively, as shown in fig. 5 and 6, fig. 5 and 6 are schematic diagrams of two other pixel driving circuits according to embodiments of the present invention, in fig. 5, the second pole of the second transistor M2 is electrically connected to the second node N2, and in fig. 6, the second pole of the second transistor M2 is electrically connected to the third node N3. In fig. 5 and 6, each of the data writing modules 11 includes a third transistor M3, a control electrode of the third transistor M3 is electrically connected to the first control signal terminal S0, a first electrode of the third transistor M3 is electrically connected to the data signal terminal Vdata, and a second electrode of the third transistor M3 is electrically connected to the second node N2.

In the data writing phase, the first control signal terminal S0 transmits an enable level to turn on the third transistor M3, so that the signal at the second node N2 is written as Vdata. In the threshold offset difference compensation stage, the first control signal terminal S0 transmits the disable level to turn off the third transistor M3, so as to prevent the signal of the data signal terminal Vdata from affecting the bias signal writing of the second node N2 in the stage.

Based on the pixel driving circuits shown in fig. 5 and 6, in the data writing phase, at least one of the first scan signal terminal S1 and the light emission control signal terminal E may be controlled to transmit a non-enable level to avoid the bias signal from being written into the second node N2 or the third node N3, so as to ensure the accuracy of the signals of the second node N2 and the third node N3 in the data writing phase.

For example, the embodiment of the invention may make the channel types of the third transistor M3 and the first transistor M1 different, and make the first scan signal terminal S1 be multiplexed as the first control signal terminal S0. As shown in fig. 5 and 6, in which the third transistor M3 is a P-type transistor and the first transistor M1 and the second transistor M2 are N-type transistors, in the data writing phase, the embodiment of the invention may enable the first scan signal terminal S1 to transmit a low level, so as to enable the third transistor M3 to be turned on, and write the data signal into the second node N2. Under the action of the low level signal transmitted by the first scan signal terminal S1, the first transistor M1 is turned off, and therefore, the bias signal terminal V₁Does not affect the signal of the third node N3 during the data writing phase. In the threshold shift difference compensation stage, the embodiment of the invention can make the first scan signal terminal S1 and the emission control signal E both transmit high level to make the first transistor M1 and the second transistor M2 both turn on, write the bias signal into the third node N3, and make the driving transistor M0 bias to turn on. The third transistor M3 is turned off by the high level signal transmitted from the first scan signal terminal S1, and thus, the data signal terminalThe signal of Vdata does not affect the signal of the second node N2 during the threshold offset difference compensation phase.

In the embodiment of the invention, the first scanning signal terminal S1 is multiplexed into the first control signal terminal S0, so that the signal types required by the operation of the pixel driving circuit 100 can be reduced, which is favorable for reducing the number of signal lines.

Alternatively, as shown in fig. 7, fig. 7 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, when the threshold shift difference compensation module 12 is connected to the second node N2, the data writing module 11 may further include the second transistor M2 in addition to the third transistor M3 according to an embodiment of the present invention, that is, the second pole of the third transistor M3 may be electrically connected to the second node N2 through the second transistor M2 according to an embodiment of the present invention. The second transistor M2 is turned on during the data write phase in addition to the threshold compensation offset phase. In the data writing phase, the third transistor M3 and the second transistor M2 are both turned on to write the signal of the data signal terminal Vdata into the first electrode of the second transistor M2, and the second transistor M2 is turned on to write the data voltage of the first electrode into the second node N2.

As shown in fig. 7, in the embodiment of the invention, the channel types of the third transistor M3 and the first transistor M1 are different, and the control electrodes of the third transistor M3 and the first transistor M1 are both connected to the first scan signal terminal S1, so as to reduce the signal types required by the operation of the pixel driving circuit 100, which is beneficial to reducing the number of signal lines.

Optionally, as shown in fig. 1, fig. 2, fig. 3, fig. 4, fig. 5, fig. 6, and fig. 7, the pixel driving circuit 100 according to the embodiment of the present invention further includes a threshold grabbing block 14, where the threshold grabbing block 14 is configured to connect the first node N1 and the third node N3. The duty cycle of the pixel driving circuit 100 further includes a threshold grabbing phase, and the threshold grabbing module 14 is used for detecting and self-compensating the threshold voltage of the driving transistor M0 during the threshold grabbing phase. Specifically, in the threshold grabbing phase, the first node N1 and the third node N3 are electrically connected. When a data signal is written into the second node N2, the driving transistor M0 is turned on, and the data signal terminal Vdata writes the data signal into the second node N2 through the data writing module 11 and passes through the driving transistorThe tube M0 and the threshold grabbing module 14 charge the first node N1 until V_N1The potential of the control electrode of the driving transistor M0 is related to the threshold voltage of the driving transistor M0. As shown in fig. 1, 2, 3, 4, 5, 6 and 7, the pixel driving circuit 100 according to the embodiment of the present invention further includes a storage capacitor Cst, and one end of the storage capacitor Cst is electrically connected to the first node N1. The storage capacitor Cst may maintain the potential of the first node N1 at V during a light emitting period_N1＝Vdata-|Vth|。

For example, when the driving transistor M0 is an N-type transistor, the embodiment of the invention can enable the bias signal terminal V to be at the threshold shift difference compensation stage₁Is low VGL. The threshold shift difference compensation stage is located after the data writing stage, and in the data writing stage, V_N1Vdata-Vth |. In the threshold offset difference compensation phase, the potential of the first node N1 is still maintained at Vdata- | Vth | by the storage capacitor Cst. In the threshold shift difference compensation phase, the driving transistor M0 can be biased to be turned on by the low level VGL of the second node N2 or the third node N3 and the signal of Vdata- | Vth | of the first node N1.

When the driving transistor M0 is a P-type transistor, the embodiment of the invention can make the bias signal terminal V during the threshold shift difference compensation stage₁Is high VGH. The threshold shift difference compensation phase T2 is located after the data writing phase, where V_N1Vdata-Vth |. In the threshold offset difference compensation phase, the potential of the first node N1 is still maintained at Vdata- | Vth | by the storage capacitor Cst. In the threshold shift difference compensation phase, the driving transistor M0 can be biased to be turned on by the high level VGH of the second node N2 or the third node N3 and the signal of Vdata- | Vth | of the first node N1.

In the embodiment of the present invention, the high level VGH is greater than the maximum value of the data voltage received by the data writing module 11. Generally, Vdata is less than 6V, and embodiments of the invention can have VGH greater than 6V. For example, VGH may be set to 7V or more. Under the action of the high level, the voltage difference between the control electrode of the driving transistor M0 and the second node N2 or the third node N3 satisfies the threshold voltage, and the driving transistor M0 is biased to be turned on.

Alternatively, as shown in fig. 8, fig. 8 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and the light emission control module 13 includes a fourth transistor M4 and a fifth transistor M5. A control electrode of the fourth transistor M4 is electrically connected to the light emission control signal terminal E, a first electrode of the fourth transistor M4 is electrically connected to the first power voltage terminal PVDD, and a second electrode of the fourth transistor M4 is electrically connected to the second node N2; a control electrode of the fifth transistor M5 is electrically connected to the light emission control signal terminal E, a first electrode of the fifth transistor M5 is electrically connected to the third node N3, and a second electrode of the fifth transistor M5 is electrically connected to the anode of the light emitting element 200. The cathode of the light emitting element 200 is electrically connected to the power supply voltage terminal PVEE. During the light-emitting period T3, the light-emitting control signal terminal E transmits the enable level to turn on the fourth transistor M4 and the fifth transistor M5, and V_N2＝V_PVDD. At this time, the connection between the control data write module 11 and the second node N2 is disconnected, and the connection between the control threshold offset difference compensation module 12 and the second node N2 and the third node N3 is disconnected.

Illustratively, in the embodiment of the present invention, the fourth transistor M4 and the fifth transistor M5 are of the same type. The fourth transistor M4 and the second transistor M2 are of different types. With such an arrangement, under the control of the light-emitting control signal terminal E, the fourth transistor M4 and the fifth transistor M5 can be turned on during the light-emitting period, and the second transistor M2 is turned off during the light-emitting period, so as to ensure that the potential of the second node N2 during the light-emitting period is not influenced by the bias signal terminal V₁The influence of (c). It is also ensured that the second transistor M2 is turned on during the threshold shift variation compensation stage, and the fourth transistor M4 and the fifth transistor M5 are turned off during the threshold shift variation compensation stage, so that the light emitting element 200 is not turned on to emit light when the driving transistor M0 is compensated for the threshold shift variation.

Optionally, as shown in fig. 1 to fig. 7, the pixel driving circuit 100 further includes a light emitting element resetting module 15, where the light emitting element resetting module 15 is configured to provide a reset signal to the light emitting element 200 in a resetting stage to prevent the light emitting element 200 from turning on to emit light.

Illustratively, as shown in fig. 1 to fig. 7, the pixel driving circuit 100 further includes a first node reset module 16, and the first node reset module 16 is configured to provide a reset signal to the first node N1 during a reset phase to clear the signal of the first node N1 during a previous driving period.

In the embodiment of the present invention, during the reset phase, the driving transistor M0 is turned off to avoid the threshold voltage of the driving transistor M0 from drifting. For example, in the reset phase, the embodiment of the invention can control the bias signal terminal V₁And a second node N2 or a control bias signal terminal V₁The connection with the third node N3 is broken. Alternatively, in the reset phase, the embodiment of the invention may also control the bias signal terminal V₁A bias signal is written to the second node N2 or the third node N3, and the driving transistor M0 is turned off by the bias signal and the reset signal.

Illustratively, with continued reference to fig. 8, the threshold grabbing module 14 includes a sixth transistor M6, a control electrode of the sixth transistor M6 is electrically connected to the first scan signal terminal S1, a first electrode of the sixth transistor M6 is electrically connected to the third node N3, and a second electrode of the sixth transistor M6 is electrically connected to the first node N1. In the threshold compensation phase, the first node N1 and the third node N3 are electrically connected, and the data signal terminal Vdata written to the second node N2 by the data writing module 11 is charged to the first node N1 through the driving transistor M0 and the sixth transistor M6 until V is charged_N1The potential of the control electrode of the driving transistor M0 is related to the threshold voltage of the driving transistor M0.

Alternatively, as shown in fig. 8, the light emitting device resetting module 15 includes a seventh transistor M7, a control electrode of the seventh transistor M7 is electrically connected to the second scan signal terminal S2, a first electrode of the seventh transistor M7 is electrically connected to the reset signal terminal, and a second electrode of the seventh transistor M7 is electrically connected to the light emitting device 200.

Alternatively, as shown in fig. 8, the first node reset module 16 includes an eighth transistor M8; a first electrode of the eighth transistor M8 is electrically connected to the reset signal terminal, and a second electrode of the eighth transistor M8 is electrically connected to the first node N1. For example, the seventh transistor M7 and the eighth transistor M8 may be made to be of the same type, and fig. 8 illustrates both P-type transistors, in which case, the embodiment of the present invention may make the control electrode of the eighth transistor M8 electrically connected to the second scan signal terminal S2, that is, the first node N1 and the light emitting element 200 may be reset at the same time, so as to shorten the duty cycle of the pixel driving circuit.

The following description will be made with reference to fig. 8 and 9, where fig. 9 is an operation timing diagram corresponding to fig. 8, and the operation of the pixel driving circuit shown in fig. 8 is described:

in the reset period T0, the first scan signal terminal S1 transmits the high level VGH, the first transistor M1 is turned on, and the third transistor M3 and the sixth transistor M6 are turned off. The light emission control signal terminal E transmits a high level VGH, the second transistor M2 is turned on, and the fourth transistor M4 and the fifth transistor M5 are turned off. The second scan signal terminal S2 transmits a low level VGL, the seventh transistor M7 and the eighth transistor M8 are turned on, and the reset signal (denoted by Vref in the embodiment of the present invention) of the reset signal terminal Vref resets the first node N1 and the light emitting element 200. Bias signal terminal V₁The low potential signal of (b) is written into the second node N2. The potential of the first node satisfies: v_N1At Vref, the potential of the second node N2 satisfies: v_N2The driving transistor M0 is turned off at VGL.

In the data writing period T1, the first scan signal terminal S1 transmits the low level VGL, the first transistor M1 is turned off, and the third transistor M3 and the sixth transistor M6 are turned on. The light emission control signal terminal E transmits a high level VGH, the second transistor M2 is turned on, and the fourth transistor M4 and the fifth transistor M5 are turned off. The second scan signal terminal S2 transmits the high level VGH, and the seventh transistor M7 and the eighth transistor M8 are turned off. The signal of the data signal terminal Vdata (denoted by Vdata in the embodiment of the present invention) is written into the second node N2, V_N2Vdata. The first node N1 and the third node N3 are electrically connected, V_N1＝V_N3. The driving transistor M0 is turned on, and the potential of the first node N1 changes to V_N1Vdata | Vth |, Vth being the threshold voltage of the driving transistor M0. In this process, the data signal Vdata reaches the first node N1, and data writing is realized. At the same time, threshold voltageThe pressure is also written to the first node N1, enabling threshold grabbing.

During the threshold shift difference compensation period T2, the first scan signal terminal S1 transmits the high level VGH, the first transistor M1 is turned on, and the third transistor M3 and the sixth transistor M6 are turned off. The light emission control signal terminal E transmits a high level VGH, the second transistor M2 is turned on, and the fourth transistor M4 and the fifth transistor M5 are turned off. The second scan signal terminal S2 transmits the high level VGH, and the seventh transistor M7 and the eighth transistor M8 are turned off. Bias signal terminal V₁Is written into the second node N2, V_N2VGH. The first node N1 holds V_N1The driving transistor M0 is biased to be turned on, so that the threshold voltage shift amount of the driving transistor M0 can be consistent after different data voltages are written.

In the light emitting period T3, the first scan signal terminal S1 transmits the high level VGH, the first transistor M1 is turned on, and the third transistor M3 and the sixth transistor M6 are turned off. The light emission control signal terminal E transmits a low level VGL, the second transistor M2 is turned off, and the fourth transistor M4 and the fifth transistor M5 are turned on. The second scan signal terminal S2 transmits the high level VGH, and the seventh transistor M7 and the eighth transistor M8 are turned off. The first node N1 holds V_N1＝Vdata-|Vth|，V_N2＝V_PVDD. The driving transistor M0 is turned on, and a current controlled by the potential of the first node N1 flows through the light emitting element 200, so that the light emitting element 200 is turned on.

For example, the embodiment of the present invention may enable the bias signal terminal V to be connected to the input terminal V₁Is a non-constant signal. For example, the embodiment of the present invention may enable the bias signal terminal V to be connected to the input terminal V₁The signal of (2) is a pulse signal. Alternatively, as shown in fig. 8 and 9, when the driving transistor M0 is provided as a P-type transistor and the seventh transistor M7 and the eighth transistor M8 are both provided as P-type transistors, the embodiment of the present invention may multiplex the second scan signal terminal S2 as the bias signal terminal V2₁That is, the threshold offset difference compensation module 12 is electrically connected to the second scan signal terminal S2. As shown in FIG. 9, the second scan signal terminal S2 is high during the threshold shift difference compensation period T2, which ensures that the driving transistor M0 can be biased during the threshold shift difference compensation period T2And conducting. Further, with this arrangement, the types of signals required for the pixel drive circuit 100 can be reduced, and the number of signal lines to which the pixel drive circuit 100 is connected can be simplified.

The embodiment of the invention also provides a display panel, which comprises a plurality of light-emitting elements and a plurality of pixel driving circuits, wherein the light-emitting elements and the pixel driving circuits can be electrically connected in a one-to-one correspondence manner. The specific structure of the pixel driving circuit has been described in detail in the above embodiments, and is not described herein again. Optionally, the light emitting element may be any one of an OLED, a Mini LED, and a Micro LED. Illustratively, the light emitting elements include a red light emitting element, a green light emitting element, and a blue light emitting element, so that the display panel can realize full-color display.

The embodiment of the invention also provides a backlight module which can be matched with the liquid crystal display panel for use. The backlight module comprises a plurality of light-emitting elements and a plurality of pixel driving circuits, wherein the light-emitting elements and the pixel driving circuits can be electrically connected in a one-to-one correspondence manner. The specific structure of the pixel driving circuit has been described in detail in the above embodiments, and is not described herein again. Optionally, the light emitting element may be any one of an OLED, a Mini LED, and a Micro LED.

As shown in fig. 10, fig. 10 is a schematic view of a display device according to an embodiment of the present invention, where the display device includes the display panel 1000 or the backlight module (not shown). Of course, the display device shown in fig. 10 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, a vehicle-mounted display screen, or a television.

An embodiment of the present invention further provides a driving method for a pixel driving circuit, and as shown in fig. 1, fig. 2 and fig. 9, the pixel driving circuit 100 includes a driving transistor M0, a data writing module 11, a threshold offset difference compensation module 12 and a light emitting control module 13; the control electrode of the driving transistor M0 is electrically connected to the first node N1, and the first electrode of the driving transistor M0 is electrically connected toThe second node N2 is electrically connected; the second pole of the driving transistor M0 is electrically connected to the third node N3, and the third node N3 is electrically connected to the light emitting element 200; the data signal terminal Vdata is electrically connected with the second node N2 through the data writing module 11, and the bias signal terminal V₁Electrically connected to the second node N2 or the third node N3 through the threshold offset difference compensation module 12; the power supply voltage terminal PVDD is electrically connected to the light emitting element 200 through the light emitting control module 13; the driving period of the pixel driving circuit includes a data writing period T1, a threshold shift difference compensation period T2, and a light emitting period T3;

the driving method provided by the embodiment of the invention comprises the following steps:

in the data writing phase T1, the data writing module 11 writes the signal of the data signal terminal Vdata into the second node N2;

during the threshold offset difference compensation stage T2, the threshold offset difference compensation module 12 biases the signal terminal V₁Is provided to the second node N2 or the third node N3; at bias signal terminal V₁Under the action of the signal of (3), the driving transistor M0 is biased to be turned on;

in the light emission period T3, the light emission control module 13 writes a signal of the power supply voltage terminal PVDD in the light emitting element 200 to light the light emitting element 200.

Illustratively, as shown in fig. 1 to 7, the pixel driving circuit 100 further includes a threshold grasping module 14 connected to the first node N1 and the third node N3; the driving method further includes:

in the data writing phase T1, the threshold grabbing module 14 provides the signal of the third node N3 to the first node N1 to detect and self-compensate the threshold voltage of the driving transistor M0.

Illustratively, as shown in fig. 1 to 7, the pixel driving circuit 100 further includes a light emitting element resetting module 15; the reset signal terminal Vref is electrically connected to the light emitting element 200 through the light emitting element reset module 15; as shown in fig. 9, the driving period of the pixel driving circuit 100 includes a reset phase T0 prior to the data write phase T1; the driving method further includes:

in the reset phase T0, the light emitting element reset module 15 supplies a signal of the reset signal terminal Vref to the light emitting element 200.

Optionally, as shown in fig. 1 to fig. 7, the pixel driving circuit 100 further includes a first node reset module 16, and the reset signal terminal Vref is electrically connected to the first node N1 through the first node reset module 16; as shown in fig. 9, the driving period of the pixel driving circuit 100 includes a reset phase T0 prior to the data write phase T1;

the driving method further includes:

in the reset phase T0, the first node reset module 16 provides the signal of the reset signal terminal Vref to the first node N1.

The detailed operation process of the pixel driving circuit 100 is described in detail in the above embodiments, and is not described herein again.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. A pixel driving circuit, comprising:

2. The pixel driving circuit according to claim 1,

the driving transistor is a P-type transistor, and in the threshold offset difference compensation stage, a signal at the bias signal end is at a high level.

3. The pixel driving circuit according to claim 1,

the threshold offset difference compensation module comprises a first transistor and a second transistor;

the control electrode of the first transistor is electrically connected with a first scanning signal end; the first electrode of the first transistor is electrically connected with the bias signal end, the second electrode of the first transistor is electrically connected with the first electrode of the second transistor, the second electrode of the second transistor is electrically connected with the second node or the third node, and the control electrode of the second transistor is electrically connected with the light-emitting control signal end.

4. The pixel driving circuit according to claim 1,

the data writing module comprises a third transistor, wherein a control electrode of the third transistor is electrically connected with a first scanning signal end, a first electrode of the third transistor is electrically connected with the data signal end, and a second electrode of the third transistor is electrically connected with the second node.

5. The pixel driving circuit according to claim 1, wherein the light emission control module comprises:

a control electrode of the fourth transistor is electrically connected with the light-emitting control signal end, a first electrode of the fourth transistor is electrically connected with the first power supply voltage end, and a second electrode of the fourth transistor is electrically connected with the second node;

and a control electrode of the fifth transistor is electrically connected with a light-emitting control signal end, a first electrode of the fifth transistor is electrically connected with the third node, and a second electrode of the fifth transistor is electrically connected with the light-emitting element.

6. The pixel driving circuit according to claim 1, further comprising:

and the threshold grabbing module is connected with the first node and the third node and is used for detecting and self-compensating the threshold voltage of the driving transistor.

7. The pixel driving circuit according to claim 6,

the threshold grabbing module comprises a sixth transistor, a control electrode of the sixth transistor is electrically connected with a first scanning signal end, a first electrode of the sixth transistor is electrically connected with the third node, and a second electrode of the sixth transistor is electrically connected with the first node.

8. The pixel driving circuit according to claim 1, further comprising:

a light emitting element reset module for providing a reset signal to the light emitting element during a reset phase.

9. The pixel driving circuit according to claim 8,

the light-emitting element resetting module comprises a seventh transistor, a control electrode of the seventh transistor is electrically connected with a second scanning signal end, a first electrode of the seventh transistor is electrically connected with a resetting signal end, and a second electrode of the seventh transistor is electrically connected with the light-emitting element.

10. The pixel driving circuit according to claim 1, further comprising:

a first node reset module to provide a reset signal to the first node during a reset phase.

11. The pixel driving circuit according to claim 10,

the first node reset module comprises an eighth transistor; the control electrode of the eighth transistor is electrically connected with the second scanning signal end, the first electrode of the eighth transistor is electrically connected with the reset signal end, and the second electrode of the eighth transistor is electrically connected with the first node.

12. A display panel comprising the pixel drive circuit according to any one of claims 1 to 11.

13. A display device characterized by comprising the display panel according to claim 12.

14. A driving method for a pixel driving circuit, wherein the pixel driving circuit comprises a driving transistor, a data writing module, a threshold offset difference compensation module and a light emitting control module;

the driving method includes:

15. The driving method according to claim 14, wherein the pixel driving circuit further includes a threshold grasping module that connects the first node and the third node;

the driving method further includes:

in the data writing phase, the threshold grabbing module provides a signal of the third node to the first node so as to detect and self-compensate the threshold voltage of the driving transistor.

16. The driving method according to claim 14, wherein the pixel driving circuit further includes a light emitting element reset module; the reset signal end is electrically connected with the light-emitting element through the light-emitting element reset module;

the drive cycle of the pixel drive circuit includes a reset phase preceding the data write phase;

the driving method further includes:

in the reset phase, the light-emitting element reset module provides the signal of the reset signal terminal to the light-emitting element.

17. The driving method according to claim 14, wherein the pixel driving circuit further comprises a first node reset block, and a reset signal terminal is electrically connected to the first node through the first node reset block;

the driving method further includes:

in the reset phase, the first node reset module provides the signal of the reset signal terminal to the first node.