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CN115268543B - A mutual bias dual voltage rail generation circuit - Google Patents

A mutual bias dual voltage rail generation circuit Download PDF

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CN115268543B
CN115268543B CN202210738148.XA CN202210738148A CN115268543B CN 115268543 B CN115268543 B CN 115268543B CN 202210738148 A CN202210738148 A CN 202210738148A CN 115268543 B CN115268543 B CN 115268543B
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voltage rail
generating circuit
mos tube
voltage
rail generating
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CN115268543A (en
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张艺蒙
储子元
张玉明
宋庆文
汤晓燕
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Xidian University
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    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current 
    • G05F1/46Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/561Voltage to current converters

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Abstract

The invention provides a mutual bias dual-voltage rail generating circuit, which comprises: a self-starting circuit, a high voltage rail generating circuit and a low voltage rail generating circuit. The mutual bias dual voltage rail generating circuit generates a voltage V which is always lower than the power supply voltage when the power supply voltage and the ground are changed REF1 Is always higher than ground by V REF2 And both rails have a larger load capacity. The invention can be widely applied to a wide-range level shift circuit, in addition, the mutual bias double-voltage rail generating circuit can avoid adopting an extra bias circuit, saves the complexity of a chip, and can stably work under larger voltage due to the adoption of a voltage-resistant tube.

Description

一种互偏置双电压轨产生电路A mutual bias dual voltage rail generation circuit

技术领域Technical Field

本发明属于集成电路技术领域,具体涉及一种互偏置双电压轨产生电路。The invention belongs to the technical field of integrated circuits, and in particular relates to a mutual bias dual voltage rail generating circuit.

背景技术Background technique

电压轨道产生电路是栅极驱动电路中不可或缺的基本构成模块,被广泛的应用在半桥驱动电路以及全桥驱动电路中。电压轨道产生电路的作用是为电平移位电路和其它模块提供一个具有负载电流能力的稳定电压轨道。The voltage rail generation circuit is an indispensable basic building block in the gate drive circuit and is widely used in half-bridge drive circuits and full-bridge drive circuits. The function of the voltage rail generation circuit is to provide a stable voltage rail with load current capability for the level shift circuit and other modules.

目前的电压轨道产生电路较少,大多采用外接输入电源作为固定的电压轨道。但对于工作电压在宽范围变化的电路应用,外接输入电源作为电压轨道并不适用。常用的做法是通过LDO钳位的方法产生的电压轨道比电源电压恒定低或高一定的压降,以此获得随电源电压可变的电压轨道。但是通过这种方式产生的电压轨道的缺点是:一是设计复杂,对于LDO的设计大幅增加了电路设计的复杂度;二是在高压下工作时,LDO的管子面临高压击穿风险,并不能很好的应用于各种工作条件;三是在对于多个电压轨道,需要设计多个LDO来实现电压轨道的生成,增加了芯片的面积。There are relatively few voltage rail generation circuits at present, and most of them use an external input power supply as a fixed voltage rail. However, for circuit applications where the operating voltage varies over a wide range, the external input power supply is not suitable as a voltage rail. A common practice is to generate a voltage rail that is a certain voltage drop lower or higher than the power supply voltage by LDO clamping, so as to obtain a voltage rail that can vary with the power supply voltage. However, the disadvantages of the voltage rail generated in this way are: first, the design is complex, which greatly increases the complexity of the circuit design for the LDO design; second, when working under high voltage, the LDO tube faces the risk of high voltage breakdown and cannot be well applied to various working conditions; third, for multiple voltage rails, multiple LDOs need to be designed to realize the generation of voltage rails, which increases the chip area.

因此,现有的电压轨道产生电路过于复杂,且不具有宽电源电压应用范围,会对后续电路的正常工作造成很大影响。Therefore, the existing voltage rail generating circuit is too complicated and does not have a wide power supply voltage application range, which will have a great impact on the normal operation of subsequent circuits.

发明内容Summary of the invention

为了解决现有技术中存在的上述问题,本发明提供了一种互偏置双电压轨产生电路。本发明要解决的技术问题通过以下技术方案实现:In order to solve the above problems existing in the prior art, the present invention provides a mutual bias dual voltage rail generating circuit. The technical problem to be solved by the present invention is achieved by the following technical solutions:

本发明提供的一种互偏置双电压轨产生电路包括:高电压轨产生电路、自启动电路和低电压轨产生电路;低电压轨产生电路的输出端连接到高电压轨产生电路输入端;自启动电路的输出端以及高电压轨产生电路的输出端,共同连接到低电压轨产生电路的输入端;A mutually biased dual voltage rail generating circuit provided by the present invention comprises: a high voltage rail generating circuit, a self-starting circuit and a low voltage rail generating circuit; the output end of the low voltage rail generating circuit is connected to the input end of the high voltage rail generating circuit; the output end of the self-starting circuit and the output end of the high voltage rail generating circuit are connected together to the input end of the low voltage rail generating circuit;

自启动电路,用于在电路在启动后,通过自身作用使互偏置双电压轨产生电路脱离非理想工作点进入正常工作点,保持互偏置双电压轨产生电路位于稳定的工作状态;A self-starting circuit is used to make the mutual bias dual voltage rail generating circuit leave the non-ideal working point and enter the normal working point through its own action after the circuit is started, so as to keep the mutual bias dual voltage rail generating circuit in a stable working state;

高电压轨产生电路,用于产生一条始终比电源电压低第一稳定值的电压轨道;a high voltage rail generating circuit for generating a voltage rail that is always lower than the power supply voltage by a first stable value;

低电压轨产生电路,用于产生一条始终比地高第二稳定值的电压轨道。A low voltage rail generating circuit is used to generate a voltage rail that is always higher than ground by a second stable value.

可选的,高电压轨产生电路包括第一齐纳二极管D1、第一MOS管M1和第二MOS管M2;Optionally, the high voltage rail generating circuit includes a first Zener diode D1, a first MOS transistor M1 and a second MOS transistor M2;

其中,第一齐纳二极管D1的负极连接至输入电源端VDD,第一齐纳二极管D1的正极连接第一MOS管M1的漏极和第二MOS管M2的栅极;第一MOS管M1的源极和第二MOS管M2的漏极连接接地端GND;第二MOS管M2的源极作为高电压轨产生电路的输出端,连接低电压轨产生电路的输入端,第一MOS管M1的栅极作为高电压轨产生电路的输入端连接低电压轨产生电路的输出端。Among them, the cathode of the first Zener diode D1 is connected to the input power supply terminal V DD , the anode of the first Zener diode D1 is connected to the drain of the first MOS tube M1 and the gate of the second MOS tube M2; the source of the first MOS tube M1 and the drain of the second MOS tube M2 are connected to the ground terminal GND; the source of the second MOS tube M2 serves as the output end of the high voltage rail generating circuit and is connected to the input end of the low voltage rail generating circuit, and the gate of the first MOS tube M1 serves as the input end of the high voltage rail generating circuit and is connected to the output end of the low voltage rail generating circuit.

可选的,第一MOS管M1为PMOS管,第二MOS管M2为NMOS功率管。Optionally, the first MOS tube M1 is a PMOS tube, and the second MOS tube M2 is an NMOS power tube.

可选的,自启动电路包括电容C、第三MOS管M3、第四MOS管M4、第五MOS管M5;Optionally, the self-starting circuit includes a capacitor C, a third MOS tube M3, a fourth MOS tube M4, and a fifth MOS tube M5;

其中,第三MOS管M3的栅极、第四MOS管M4的栅极和第五MOS管M5的漏极以及电容C的负极均连接接地端GND;电容C的正极连接第三MOS管M3的漏极以及第五MOS管M5的栅极;第四MOS管M4的源极连接至输入电源端VDD;第三MOS管M3的源极与第四MOS管M4的漏极连接,第五MOS管M5的源极作为自启动电路的输出端与高电压轨产生电路的输出端,共同连接到低电压轨产生电路的输入端。The gate of the third MOS tube M3, the gate of the fourth MOS tube M4, the drain of the fifth MOS tube M5 and the negative electrode of the capacitor C are all connected to the ground terminal GND; the positive electrode of the capacitor C is connected to the drain of the third MOS tube M3 and the gate of the fifth MOS tube M5; the source of the fourth MOS tube M4 is connected to the input power supply terminal V DD ; the source of the third MOS tube M3 is connected to the drain of the fourth MOS tube M4, and the source of the fifth MOS tube M5 is connected to the input terminal of the low voltage rail generating circuit as the output terminal of the self-starting circuit and the output terminal of the high voltage rail generating circuit.

可选的,第三MOS管M3、第四MOS管M4、第五MOS管M5均为NMOS管。Optionally, the third MOS tube M3 , the fourth MOS tube M4 , and the fifth MOS tube M5 are all NMOS tubes.

可选的,低电压轨产生电路包括第二齐纳二极管D2、第六MOS管M6和第七MOS管M7;Optionally, the low voltage rail generating circuit includes a second Zener diode D2, a sixth MOS transistor M6 and a seventh MOS transistor M7;

其中,第二齐纳二极管D2的负极连接第六MOS管M6的漏极和第七MOS管M7的栅极;第二齐纳二极管D2的正极连接接地端GND;第六MOS管M6的源极和第七MOS管M7的漏极均连接至输入电源端VDD,第七MOS管M7的源极作为低电压轨产生电路的输出端连接至高电压轨产生电路的输入端。The cathode of the second Zener diode D2 is connected to the drain of the sixth MOS tube M6 and the gate of the seventh MOS tube M7; the anode of the second Zener diode D2 is connected to the ground terminal GND; the source of the sixth MOS tube M6 and the drain of the seventh MOS tube M7 are both connected to the input power supply terminal V DD , and the source of the seventh MOS tube M7 is connected to the input terminal of the high voltage rail generating circuit as the output terminal of the low voltage rail generating circuit.

可选的,第六MOS管M6为NMOS管,第七MOS管M7为PMOS功率管。Optionally, the sixth MOS tube M6 is an NMOS tube, and the seventh MOS tube M7 is a PMOS power tube.

可选的,高电压轨产生电路产生的电压轨道的电压为:VDD-VREF1=VDD-VB1+VTHPOptionally, the voltage of the voltage rail generated by the high voltage rail generating circuit is: VDD-V REF1 =VDD-V B1 +V THP ;

其中,VDD表示电源端输入的电源电压,GND表示接地端的电压,VB1表示第一齐纳二极管D1击穿后钳位的电压,VREF1表示第一稳定值,VTHP表示第二MOS管M2的阈值电压。Wherein, VDD represents the power supply voltage inputted to the power supply terminal, GND represents the voltage of the ground terminal, VB1 represents the voltage clamped after the first Zener diode D1 breaks down, VREF1 represents the first stable value, and VTHP represents the threshold voltage of the second MOS tube M2.

可选的,低电压轨产生电路产生的电压轨道的电压为:GND+VREF2=GND+VB2-VTHNOptionally, the voltage of the voltage rail generated by the low voltage rail generating circuit is: GND+V REF2 =GND+V B2 -V THN ;

其中,VDD表示电源端输入的电源电压,GND表示接地端的电压,VB2表示第二齐纳二极管D2击穿后钳位的电压,VREF2表示第二稳定值,VTHN表示第七MOS管M7的阈值电压。Wherein, VDD represents the power supply voltage inputted to the power supply terminal, GND represents the voltage of the ground terminal, VB2 represents the voltage clamped after the second Zener diode D2 breaks down, VREF2 represents the second stable value, and VTHN represents the threshold voltage of the seventh MOS tube M7.

本发明提供的一种互偏置双电压轨产生电路,包括:自启动电路、高电压轨产生电路和低电压轨产生电路。该互偏置双电压轨产生电路在电源电压和地变化时,产生一条始终比电源电压低VREF1的电压轨道,以及一条始终比地高VREF2的电压轨道,且两轨道具有较大的负载能力。本发明可广泛应用在宽范围电平移位电路中,此外本发明的互偏置双电压轨产生电路可以避免采用额外的偏置电路,节省芯片复杂度,且由于采用耐压管,该电路可以在较大电压下稳定工作。The present invention provides a mutually biased dual voltage rail generating circuit, comprising: a self-starting circuit, a high voltage rail generating circuit and a low voltage rail generating circuit. When the power supply voltage and the ground change, the mutually biased dual voltage rail generating circuit generates a voltage rail that is always lower than the power supply voltage by V REF1 , and a voltage rail that is always higher than the ground by V REF2 , and the two rails have a large load capacity. The present invention can be widely used in wide-range level shifting circuits. In addition, the mutually biased dual voltage rail generating circuit of the present invention can avoid the use of additional bias circuits, save chip complexity, and because of the use of a withstand voltage tube, the circuit can work stably under a larger voltage.

以下将结合附图及实施例对本发明做进一步详细说明。The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

图1为本发明实施例提供的一种互偏置双电压轨产生电路的整体电路示意图;FIG1 is a schematic diagram of an overall circuit of a mutual bias dual voltage rail generating circuit provided by an embodiment of the present invention;

图2为本发明实施例提供的该互偏置双电压轨产生电路的实际工作仿真示意图。FIG. 2 is a schematic diagram of actual operation simulation of the mutual bias dual voltage rail generating circuit provided by an embodiment of the present invention.

具体实施方式Detailed ways

下面结合具体实施例对本发明做进一步详细的描述,但本发明的实施方式不限于此。The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

如图1所示,本发明提供的一种互偏置双电压轨产生电路包括:高电压轨产生电路、自启动电路和低电压轨产生电路;低电压轨产生电路的输出端连接到高电压轨产生电路输入端;自启动电路的输出端以及高电压轨产生电路的输出端,共同连接到低电压轨产生电路的输入端;As shown in FIG1 , a mutually biased dual voltage rail generating circuit provided by the present invention comprises: a high voltage rail generating circuit, a self-starting circuit and a low voltage rail generating circuit; the output end of the low voltage rail generating circuit is connected to the input end of the high voltage rail generating circuit; the output end of the self-starting circuit and the output end of the high voltage rail generating circuit are connected together to the input end of the low voltage rail generating circuit;

自启动电路,用于在电路在启动后,通过自身作用使互偏置双电压轨产生电路脱离非理想工作点进入正常工作点,保持互偏置双电压轨产生电路位于稳定的工作状态;A self-starting circuit is used to make the mutual bias dual voltage rail generating circuit leave the non-ideal working point and enter the normal working point through its own action after the circuit is started, so as to keep the mutual bias dual voltage rail generating circuit in a stable working state;

高电压轨产生电路,用于产生一条始终比电源电压低第一稳定值的电压轨道;a high voltage rail generating circuit for generating a voltage rail that is always lower than the power supply voltage by a first stable value;

自启动电路包括电容C、第三MOS管M3、第四MOS管M4、第五MOS管M5;The self-starting circuit includes a capacitor C, a third MOS tube M3, a fourth MOS tube M4, and a fifth MOS tube M5;

其中,第三MOS管M3的栅极、第四MOS管M4的栅极和第五MOS管M5的漏极以及电容C的负极均连接接地端GND;电容C的正极连接第三MOS管M3的漏极以及第五MOS管M5的栅极;第四MOS管M4的源极连接至输入电源端VDD;第三MOS管M3的源极与第四MOS管M4的漏极连接,第五MOS管M5的源极作为自启动电路的输出端与高电压轨产生电路的输出端,共同连接到低电压轨产生电路的输入端。The gate of the third MOS tube M3, the gate of the fourth MOS tube M4, the drain of the fifth MOS tube M5 and the negative electrode of the capacitor C are all connected to the ground terminal GND; the positive electrode of the capacitor C is connected to the drain of the third MOS tube M3 and the gate of the fifth MOS tube M5; the source of the fourth MOS tube M4 is connected to the input power supply terminal V DD ; the source of the third MOS tube M3 is connected to the drain of the fourth MOS tube M4, and the source of the fifth MOS tube M5 is connected to the input terminal of the low voltage rail generating circuit as the output terminal of the self-starting circuit and the output terminal of the high voltage rail generating circuit.

高电压轨产生电路包括第一齐纳二极管D1、第一MOS管M1和第二MOS管M2;The high voltage rail generating circuit includes a first Zener diode D1, a first MOS transistor M1 and a second MOS transistor M2;

其中,第一齐纳二极管D1的负极连接至输入电源端VDD,第一齐纳二极管D1的正极连接第一MOS管M1的漏极和第二MOS管M2的栅极;第一MOS管M1的源极和第二MOS管M2的漏极连接接地端GND;第二MOS管M2的源极作为高电压轨产生电路的输出端,连接低电压轨产生电路的输入端,第一MOS管M1的栅极作为高电压轨产生电路的输入端连接低电压轨产生电路的输出端。Among them, the cathode of the first Zener diode D1 is connected to the input power supply terminal V DD , the anode of the first Zener diode D1 is connected to the drain of the first MOS tube M1 and the gate of the second MOS tube M2; the source of the first MOS tube M1 and the drain of the second MOS tube M2 are connected to the ground terminal GND; the source of the second MOS tube M2 serves as the output end of the high voltage rail generating circuit and is connected to the input end of the low voltage rail generating circuit, and the gate of the first MOS tube M1 serves as the input end of the high voltage rail generating circuit and is connected to the output end of the low voltage rail generating circuit.

低电压轨产生电路,用于产生一条始终比地高第二稳定值的电压轨道。A low voltage rail generating circuit is used to generate a voltage rail that is always higher than ground by a second stable value.

第三MOS管M3、第四MOS管M4、第五MOS管M5均为NMOS管。低电压轨产生电路包括第二齐纳二极管D2、第六MOS管M6和第七MOS管M7;The third MOS tube M3, the fourth MOS tube M4, and the fifth MOS tube M5 are all NMOS tubes. The low voltage rail generating circuit includes a second Zener diode D2, a sixth MOS tube M6, and a seventh MOS tube M7;

其中,第二齐纳二极管D2的负极连接第六MOS管M6的漏极和第七MOS管M7的栅极;第二齐纳二极管D2的正极连接接地端GND;第六MOS管M6的源极和第七MOS管M7的漏极均连接至输入电源端VDD,第七MOS管M7的源极作为低电压轨产生电路的输出端连接至高电压轨产生电路的输入端。The cathode of the second Zener diode D2 is connected to the drain of the sixth MOS tube M6 and the gate of the seventh MOS tube M7; the anode of the second Zener diode D2 is connected to the ground terminal GND; the source of the sixth MOS tube M6 and the drain of the seventh MOS tube M7 are both connected to the input power supply terminal V DD , and the source of the seventh MOS tube M7 is connected to the input terminal of the high voltage rail generating circuit as the output terminal of the low voltage rail generating circuit.

第六MOS管M6为NMOS管,第七MOS管M7为PMOS功率管。The sixth MOS tube M6 is an NMOS tube, and the seventh MOS tube M7 is a PMOS power tube.

下面对本发明的互偏置双电压轨产生电路的整体原理进行说明:The overall principle of the mutual bias dual voltage rail generating circuit of the present invention is described below:

M3、M4和M5构成自启动电路,保证电路在启动过程中脱离非理想工作点并进入正常工作点,在电路上电后,M3和M4的初始栅电压为低电平,故M3与M4开启,电源电压VDD对电容C充电,电容C上电压逐渐上升,在电路上电瞬间,M5的栅极为低电位,M5导通,将M6的栅电压拉低,使得电路启动。在一段时间后,电容C上电压为高,M5关闭,自启动完成,电路进入稳定的工作状态。M3, M4 and M5 form a self-starting circuit to ensure that the circuit is out of the non-ideal working point and enters the normal working point during the startup process. After the circuit is powered on, the initial gate voltage of M3 and M4 is low, so M3 and M4 are turned on, the power supply voltage VDD charges the capacitor C, and the voltage on the capacitor C gradually rises. At the moment the circuit is powered on, the gate of M5 is low potential, M5 is turned on, and the gate voltage of M6 is pulled down, so that the circuit starts. After a period of time, the voltage on the capacitor C is high, M5 is closed, the self-start is completed, and the circuit enters a stable working state.

D2、M6和M7组成低电压轨产生电路,当M6的栅电压被拉低后,M6开启,VDD与GND通过齐纳二极管D2直连,当VDD与GND相差较大时,齐纳二极管D2将被击穿,由于齐纳二极管的特性,D2两侧的电压将保持VB,即M7的栅电压为GND+VB,由于M7采用源极跟随的结构,M7的源极(GND+VREF2)电压也因此被固定,为:D2, M6 and M7 form a low voltage rail generation circuit. When the gate voltage of M6 is pulled down, M6 is turned on, and VDD and GND are directly connected through the Zener diode D2. When the difference between VDD and GND is large, the Zener diode D2 will be broken down. Due to the characteristics of the Zener diode, the voltage on both sides of D2 will remain VB, that is, the gate voltage of M7 is GND+VB. Since M7 adopts a source follower structure, the source voltage of M7 (GND+VREF2) is also fixed, which is:

GND+VREF2=GND+VB2-VTHN GND+V REF2 =GND+ VB2 - VTHN

其中,VDD表示电源端输入的电源电压,GND表示接地端的电压,VB2表示第二齐纳二极管(D2)击穿后钳位的电压,VREF2表示第二稳定值,VTHN表示第七MOS管(M7)的阈值电压。Wherein, VDD represents the power supply voltage input to the power supply terminal, GND represents the voltage of the ground terminal, VB2 represents the voltage clamped after the second Zener diode (D2) breaks down, VREF2 represents the second stable value, and VTHN represents the threshold voltage of the seventh MOS tube (M7).

由于所产生的电压轨需要提供较大的电流负载能力,故M7的尺寸较大,往往采用功率管的形式。Since the generated voltage rail needs to provide a large current load capacity, the size of M7 is large and often takes the form of a power tube.

D1、M1和M2组成高电压轨产生电路,当M1的栅电压VDD-VREF2被确定后,M1开启,VDD与GND通过齐纳二极管D1直连,当VDD与GND相差较大时,齐纳二极管D1将被击穿,由于齐纳二极管的特性,D1两侧的电压将保持VB,即M2的栅电压为VDD-VB,由于M2采用源极跟随的结构,M2的源极(VDD-VREF1)电压也因此被固定,为:D1, M1 and M2 form a high voltage rail generation circuit. When the gate voltage VDD-V REF2 of M1 is determined, M1 is turned on, and VDD and GND are directly connected through the Zener diode D1. When the difference between VDD and GND is large, the Zener diode D1 will be broken down. Due to the characteristics of the Zener diode, the voltage on both sides of D1 will remain at VB , that is, the gate voltage of M2 is VDD- VB . Since M2 adopts a source follower structure, the source voltage of M2 (VDD-V REF1 ) is also fixed, which is:

VDD-VREF1=VDD-VB1+VTHPVDD-V REF1 = VDD-V B1 + V THP ;

其中,VDD表示电源端输入的电源电压,GND表示接地端的电压,VB1表示第一齐纳二极管(D1)击穿后钳位的电压,VREF1表示第一稳定值,VTHP表示第二MOS管(M2)的阈值电压。Wherein, VDD represents the power supply voltage inputted to the power supply terminal, GND represents the voltage of the ground terminal, VB1 represents the voltage clamped after the first Zener diode (D1) breaks down, VREF1 represents the first stable value, and VTHP represents the threshold voltage of the second MOS tube (M2).

值得说明的是:第一稳定值并不是一个预设的值,由于VB1和VTHP分别是第一齐纳二极管的击穿电压和PMOS的阈值电压,不会发生改变,而在电路达到稳定之后,该稳定值是不变的;同理第二稳定值也是如此。It is worth noting that the first stable value is not a preset value. Since V B1 and V THP are the breakdown voltage of the first Zener diode and the threshold voltage of the PMOS respectively, they will not change. After the circuit reaches stability, the stable value remains unchanged. Similarly, the second stable value is also the same.

请参见图2,图2为本发明实施例提供的该互偏置双电压轨产生电路的实际工作仿真示意图,电源电压VDD为15V,地电平为0V,可以看出产生了两条电压轨道,且在较大的负载电流下能正常工作,为整体的电路工作提供了稳定的电压轨。Please refer to Figure 2, which is a schematic diagram of the actual working simulation of the mutual bias dual voltage rail generating circuit provided by an embodiment of the present invention. The power supply voltage VDD is 15V and the ground level is 0V. It can be seen that two voltage rails are generated and can work normally under a larger load current, providing a stable voltage rail for the overall circuit operation.

本发明提供的一种互偏置双电压轨产生电路,包括:自启动电路、高电压轨产生电路和低电压轨产生电路。该互偏置双电压轨产生电路在电源电压和地变化时,产生一条始终比电源电压低VREF1的电压轨道,以及一条始终比地高VREF2的电压轨道,且两轨道具有较大的负载能力。本发明可广泛应用在宽范围电平移位电路中,此外本发明的互偏置双电压轨产生电路可以避免采用额外的偏置电路,节省芯片复杂度,且由于采用耐压管,该电路可以在较大电压下稳定工作。The present invention provides a mutually biased dual voltage rail generating circuit, comprising: a self-starting circuit, a high voltage rail generating circuit and a low voltage rail generating circuit. When the power supply voltage and the ground change, the mutually biased dual voltage rail generating circuit generates a voltage rail that is always lower than the power supply voltage by V REF1 , and a voltage rail that is always higher than the ground by V REF2 , and the two rails have a large load capacity. The present invention can be widely used in wide-range level shifting circuits. In addition, the mutually biased dual voltage rail generating circuit of the present invention can avoid the use of additional bias circuits, save chip complexity, and because of the use of a withstand voltage tube, the circuit can work stably under a larger voltage.

Claims (6)

1. A mutually biased dual voltage rail generation circuit, comprising: a high voltage rail generating circuit, a self-starting circuit and a low voltage rail generating circuit; the output end of the low voltage rail generating circuit is connected to the input end of the high voltage rail generating circuit; the output end of the self-starting circuit and the output end of the high-voltage rail generating circuit are commonly connected to the input end of the low-voltage rail generating circuit;
the self-starting circuit is used for enabling the mutual bias double-voltage rail generating circuit to break away from an non-ideal working point to enter a normal working point through the self action after the circuit is started, and keeping the mutual bias double-voltage rail generating circuit in a stable working state;
the high voltage rail generating circuit is used for generating a voltage rail which is always lower than the power supply voltage by a first stable value;
the low voltage rail generating circuit is used for generating a voltage rail which is always higher than ground by a second stable value;
the high-voltage rail generating circuit comprises a first zener diode (D1), a first MOS tube (M1) and a second MOS tube (M2);
wherein the cathode of the first Zener diode (D1) is connected to the input power supply terminal (V DD ) The anode of the first Zener diode (D1) is connected with the drain electrode of the first MOS tube (M1) and the grid electrode of the second MOS tube (M2); the source electrode of the first MOS tube (M1) and the drain electrode of the second MOS tube (M2) are connected with a grounding end (GND); the source electrode of the second MOS tube (M2) is used as the output end of the high-voltage rail generating circuit and is connected with the input end of the low-voltage rail generating circuit, and the grid electrode of the first MOS tube (M1) is used as the input end of the high-voltage rail generating circuit and is connected with the output end of the low-voltage rail generating circuit;
the self-starting circuit comprises a capacitor (C), a third MOS tube (M3), a fourth MOS tube (M4) and a fifth MOS tube (M5);
wherein, the grid electrode of the third MOS tube (M3), the grid electrode of the fourth MOS tube (M4), the drain electrode of the fifth MOS tube (M5) and the likeThe cathodes of the capacitors (C) are connected with a grounding end (GND); the anode of the capacitor (C) is connected with the drain electrode of the third MOS tube (M3) and the grid electrode of the fifth MOS tube (M5); the source electrode of the fourth MOS tube (M4) is connected to the input power supply end (V) DD ) The method comprises the steps of carrying out a first treatment on the surface of the The source electrode of the third MOS tube (M3) is connected with the drain electrode of the fourth MOS tube (M4), and the source electrode of the fifth MOS tube (M5) is used as the output end of the self-starting circuit and the output end of the high-voltage rail generating circuit and is commonly connected to the input end of the low-voltage rail generating circuit;
the low voltage rail generating circuit comprises a second zener diode (D2), a sixth MOS tube (M6) and a seventh MOS tube (M7);
the cathode of the second zener diode (D2) is connected with the drain electrode of the sixth MOS tube (M6) and the grid electrode of the seventh MOS tube (M7); the positive electrode of the second zener diode (D2) is connected with the ground terminal (GND); the source electrode of the sixth MOS tube (M6) and the drain electrode of the seventh MOS tube (M7) are connected to an input power supply end (V) DD ) The source electrode of the seventh MOS tube (M7) is used as the output end of the low-voltage rail generating circuit and is connected to the input end of the high-voltage rail generating circuit.
2. The mutual bias dual voltage rail generating circuit as recited in claim 1, characterized in that the first MOS transistor (M1) is a PMOS transistor and the second MOS transistor (M2) is an NMOS power transistor.
3. The circuit for generating the mutual bias dual voltage rail according to claim 1, wherein the third MOS transistor (M3), the fourth MOS transistor (M4) and the fifth MOS transistor (M5) are all NMOS transistors.
4. The mutual bias dual voltage rail generating circuit as recited in claim 1, characterized in that the sixth MOS transistor (M6) is an NMOS transistor and the seventh MOS transistor (M7) is a PMOS power transistor.
5. The mutually-biased dual-voltage rail generating circuit of claim 1, wherein the voltage of the voltage rail generated by the high-voltage rail generating circuit is: VDD-V REF1 =VDD-V B1 +V THP
Wherein VDD represents the power supply voltage input by the power supply terminal, GND represents the voltage of the ground terminal, V B1 Represents the voltage clamped after breakdown of the first zener diode (D1), V REF1 Represents a first stable value, V THP Represents the threshold voltage of the second MOS transistor (M2).
6. The mutually-biased dual-voltage rail generating circuit of claim 2, wherein the voltage of the voltage rail generated by the low-voltage rail generating circuit is: GND+V REF2 =GND+V B2 -V THN
Wherein VDD represents the power supply voltage input by the power supply terminal, GND represents the voltage of the ground terminal, V B2 Represents the voltage clamped after breakdown of the second zener diode (D2), V REF2 Representing a second stable value, V THN The threshold voltage of the seventh MOS transistor (M7) is shown.
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