CN115148568A - Sample stage and system and method for modifying samples - Google Patents

Abstract

Embodiments of the present invention relate to sample stages and systems and methods for modifying samples. The present disclosure provides a sample stage, which includes a base and a first sample support. The base has a first surface. The first sample support column is disposed on the first surface of the base, and the top surface of the first sample support column has a groove for placing the sample. The present disclosure also includes sample modification systems and methods using the sample stage.

Description

Sample stage and system and method for modifying samples

technical field

Embodiments of the present invention relate to a sample stage, a system and method for modifying samples, and in particular, to a system and method for sample modification using a processed sample stage.

Background technique

In the semiconductor process, the performance of measurement equipment directly affects the ability of process modulation and the improvement of yield. Semiconductor fabs and equipment suppliers must ensure that their measurements must be within tolerance and certified to ISO and quality systems. As the dimensions and tolerances of components continue to shrink, so does the difficulty of measuring. As the semiconductor industry continues to seek various methods to meet the increasingly stringent measurement needs, many measurement tools have been developed to meet the measurement needs, such as measuring the CD (Critical Dimension) value, thickness, surface topography ( morphology), doping concentration, and defect analysis, etc.

Traditionally, defect detection of semiconductor components is accomplished by transmission electron microscope (Transmission Electron Microscopy, TEM) or scanning transmission electron microscope (Scanning Transmission Electron Microscope, STEM). Taking TEM as an example, it uses a high-energy electron beam to irradiate an ultra-thin TEM specimen, and then magnifies the imaging technology to obtain a 2D image of the sample. The image resolution can reach the atomic level of 0.1 nanometers. or lattice defects. Since TEM hits the TEM specimen by penetrating the electron beam, the thickness of the area to be observed on the TEM specimen must reach the level that the electron beam can penetrate, for example, the thickness is about 2 angstroms or less, which also makes the application of TEM easy to be affected. affected by limitations in sample preparation. For example, whether the structural defects of the semiconductor element to be observed are indeed located on the ultra-thin TEM test piece, or whether the prepared TEM test piece can show a region of interest (ROI), that is, using TEM in the Detect technical bottlenecks that are actually reflected in the application.

SUMMARY OF THE INVENTION

One embodiment of the present invention relates to a sample stage including a base and a first sample support. The base has a first surface. The first sample support column is disposed on the first surface of the base, and the top surface of the first sample support column has a groove for placing the sample.

Another embodiment of the present invention is directed to a system for modifying a sample that includes an electron beam source, a sample stage, an ion beam source, and a detector. The electron beam source is used to generate electron beams. The sample stage is disposed under the electron beam source, and has a sample support, and the top surface of the sample support has a groove for placing the sample. The ion beam source is used to generate an ion beam to cut the sample placed on the sample stage. The detector is arranged under the sample stage. Wherein, the sample stage can be adjusted to change its angle relative to the electron beam source, so that the electron beam generated by the electron beam source can penetrate the sample and be detected by the detector.

Yet another embodiment of the present invention relates to a method of modifying a sample, comprising the steps of: placing a sample on a sample support of a sample stage, the sample support having a groove on its top surface, the groove extending to the top Opposite edges of the face such that the two sides of the sample are substantially unobstructed by the sample support; and an ion beam is used to ablate the sample so that the sample has a tapered profile.

Description of drawings

Aspects of the present disclosure are best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that in accordance with standard practice in the industry, the various structures are not drawn to scale. In fact, the dimensions of the various structures may be arbitrarily increased or decreased for clarity of discussion.

1A is a top view of a sample stage according to some embodiments of the present disclosure.

Figure IB is a side view of a sample stage according to some embodiments of the present disclosure.

FIG. 2A is a schematic structural diagram of a system for modifying a sample according to some embodiments of the present disclosure.

2B is a top view of a sample stage according to some embodiments of the present disclosure.

2C is a schematic diagram of a sample support and a sample according to some embodiments of the present disclosure.

3A and 3B are top views of a sample stage according to some embodiments of the present disclosure.

4A and 4B are top views of semiconductor devices according to some embodiments of the present disclosure.

4C is a side view of a semiconductor device according to some embodiments of the present disclosure.

5A is a top view of a semiconductor device according to some embodiments of the present disclosure.

5B and 5C are schematic diagrams of samples according to some embodiments of the present disclosure.

6A and 6B are schematic diagrams of sample supports and samples according to some embodiments of the present disclosure.

7 is a flow diagram of steps according to some embodiments of the present disclosure.

Detailed ways

The following disclosure provides many different embodiments or examples of different means for implementing the provided subject matter. Specific examples of elements and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the formation of a first member over or on a second member in the following description may include embodiments in which the first member and the second member are formed in direct contact, and may also include additional members An embodiment may be formed between the first member and the second member such that the first member and the second member may not be in direct contact. Additionally, the present disclosure may repeat reference numerals and/or letters in various instances. This repetition is for the purpose of simplicity and clarity and does not in itself indicate a relationship between the various embodiments and/or configurations discussed.

Furthermore, for ease of description, spatially relative terms such as "below", "below", "under", "above", "on", "on" and the like may be used herein Used to describe the relationship of one element or component to another element or component(s), as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation other than the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and thus the spatially relative descriptors used herein may be similarly interpreted.

As used herein, terms such as "first", "second" and "third" describe various elements, components, regions, layers and/or sections, such elements, components, regions, layers and/or Sections should not be limited by these terms. These terms may only be used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Terms such as "first," "second," and "third," when used herein do not imply a sequence or order unless clearly indicated by the context.

In some embodiments of the present disclosure, the three-dimensional structure observation of the positioning and the fixed point of the defect point of the semiconductor element includes providing a sample stage, and the structure of the sample stage is convenient for the sample to be modified using a sample system, such as STEM. Two-dimensional observation, as well as processing and sharpening the sample to modify it, can further use Atom Probe Tomography to analyze the three-dimensional structure and elemental composition of defect points.

As shown in the top view of FIG. 1A and the side view of FIG. 1B , in some embodiments, the sample stage 10 includes a base 11 and a first sample support 12 . The base 11 has a first surface 11A. The first sample support 12 is disposed on the first surface 11A of the base 11 . In some embodiments, the top surface 12A of the first sample post 12 has a groove 13 for placing the sample 14 .

One of the purposes of the first sample support 12 is to position the sample 14. Since the size of the sample 14 is about 100 nm, and the size of the base 11 can reach the spectrum of several micrometers to several millimeters, the sample 14 is much smaller than the base 11. In this case, the sample 14 needs to be set on a specific sample support to correctly identify the position of the sample 14 on the sample stage 10 , rather than directly placing the sample 14 on the first surface 11A of the base 11 . Further, in some embodiments, the groove 13 of the first sample support 12 further provides positioning of the sample 14 , for example, placing the sample 14 in the center of the groove 13 so that it can be observed through the position of the groove 13 Sample 14.

However, considering that when the sample is placed in a groove that is not generally an embodiment of the present invention, the sample is substantially submerged in the groove due to the depth of the groove, that is, the sample can only be observed through a top view, This makes the electron beam irradiate the sample at any angle, even if the electron beam penetrates the sample, the electron beam will be blocked by the structure of the sample support and cannot reach the detector, which seriously affects the resolution of the sample image. The trench design of the embodiment of the present invention can avoid the above situation of blocking the electron beam from reaching the detector.

Regarding the positional relationship between the electron beam and the sample stage, for example, as shown in FIG. 2A , a system for modifying a sample, such as STEM, is a schematic structural diagram. The electron beam source 21 is located above the sample stage 10 and is used to generate electron beams. Irradiate the sample. In some embodiments, the electron beam source 21 may include a high-voltage system, an electron gun, a condenser lens and other components (not shown in the figure). The high-brightness electron beam emitted by heating the field emission electron gun reaches and penetrates the sample 14 after passing through the condenser.

In addition to having a first sample support 12 on its first surface 11A (see previous FIG. 1B ), the sample stage 10 located below the electron beam source 21 , in some embodiments, the base 11 of the sample stage 10 is opposite to the sample stage 10 . The second surface 11B of the first surface 11A can be connected to a fixture 31 (as shown in the side view angle shown on the right side of FIG. 2A ), and the fixture 31 is used to move or rotate the sample stage 10 to adjust the sample stage 10 relative to the sample stage 10 . The angle of the electron beam source 21, for example, the electron beam generated by the electron beam source 21 has an included angle of less than or equal to 90 degrees with the first surface 11A, thereby allowing partial exposure to the first sample through the trench 13 The sample 14 outside the column 12 is penetrated by the electron beam generated by the electron beam source 21 . In some embodiments, the sample stage 10 has only a single first sample column 12 , or a plurality of first sample columns 12 are arranged in a single row, and the electron beam is irradiated on the first sample column 12 When the sample 14 is formed, the arrangement direction of the first sample pillars 12 is substantially orthogonal to the irradiation direction of the electron beam. In other words, after the electron beam passes through the sample 14 on any one of the first sample columns 12 , the electron beam will not be blocked by other first sample columns 12 on the traveling path.

Referring further to FIGS. 2B and 2C , they are a top view of the sample stage 10 whose inclination angle is adjusted by the clamp, and a three-dimensional schematic view of the first sample support 12 , respectively. As shown in the figure, the electron beam generated by the aforementioned electron beam source 21 has a traveling path _DE , which can irradiate the sample 14 at a position higher than the top surface 12A of the first sample support 12 without concern of being affected by the first sample When the sample 14 is irradiated at a position lower than the top surface 12A of the first sample support column 12 , it is necessary to pass through the groove on both edges of the top surface 12A of the first sample support column 12 . For example, the travel path _DE of the electron beam is parallel to the direction of the groove 13, so that the electron beam can directly irradiate the sample 14 through the electron beam inlet 13A and the electron beam outlet 13B, and does not penetrate the sample 14. Pass through the sample stage 10 blocked.

In some embodiments of the present disclosure, the trench 13 formed on the top surface 12A of the first sample pillar 12 can be further divided into a plurality of trenches in structure, such as the first sample shown in the leftmost part of FIG. 2B . Taking the pillar 12 as an example, its top surface has a first trench 131 and a second trench 132 orthogonal to the first trench 131, and presents a cross-shaped depression, and the sample 14 is placed in the first trench 131 and the second trench The positions of the grooves 132 are staggered. In some embodiments, the top surface 12A of the first sample column 12 is provided with a plurality of grooves 13 , and at least one groove extends to two opposite edges of the top surface 12A to form the aforementioned electron beam inlet 13A and electron beam outlet 13B.

In some embodiments, the electron beam passing through the sample 14 may then pass through multistage magnification elements (not shown) such as objective, intermediate and projection mirrors to a detector 22 located below the sample stage 10 . The detector 22 located under the sample stage 10 may be a Bright Field STEM Detector. When the electron beam generated by the electron beam source 21 passes through the sample 14, the electron beam interacts with the crystal of the sample 14 and is located under the sample stage 10 to generate various scattered electrons, among which the electrons with smaller scattering angles will enter the detection The detector 22 forms a transmission brightfield image to observe the two-dimensional structure of the sample 14 . In some embodiments, electrons penetrating the sample 14 will further pass through one or more Aperture Diaphragms. In some embodiments, the detector 22 may include a phosphor plate, a camera, or a Charge Coupled Device (CCD).

In addition to being provided with a single first sample column 12 or a single row of first sample columns 12 , as shown in FIG. 3A , in some embodiments, the sample stage 10 may further include one or more second sample columns 15 . The second sample support 15 is also disposed on the first surface 11A of the base 11 of the sample stage 10 , and is not located in the same row as the first sample support 12 , but the sample stage 10 as a whole has a multi-row sample support structure . Since the electron beam penetrating the sample still needs to travel to the detector 22, the second sample support 15 is staggered from the first sample support 12 in the traveling direction of the electron beam, so as to avoid blocking the traveling of the electron beam. In some embodiments, as shown in FIG. 3A and FIG. 3B , the second sample support 15 may be arranged in a single or multiple rows, so that the sample stage as a whole has two, three or more sample supports. When the second sample column 15 is arranged, it must be avoided that it overlaps with the first sample column or other second sample columns 15 in the traveling direction of the electron beam.

Traditionally, the material of the STEM sample stage contains copper, and is formed by processing the copper-based material through a Computer Numerical Control (CNC) process. However, considering that copper may interfere with the elemental analysis of the sample, such as excessive background noise during mass spectrometry analysis, which affects the determination of sample components, in some embodiments of the present disclosure, the sample carrier used The material of table 10 contains silicon. In some embodiments, the base 11 and the first and second sample pillars 12 and 15 of the sample stage 10 are all made of silicon. For example, a silicon wafer is processed by a laser, and a sample is engraved on one side of the silicon wafer. The top surface of the sample support column has a groove. In this embodiment, the base 11 of the sample stage 10 and the first and second sample support columns 12 and 15 can also be described as integrally formed. In the case of silicon wafer processing, the silicon wafer may be diced after the sample pillars are formed to achieve the desired pedestal area dimensions.

If only STEM is used to observe the two-dimensional structure of the sample, the sample does not need to be processed to have a tapered profile. However, one of the objectives of the present disclosure is to enable the sample stage 10 and the sample 14 thereon to be used for the observation of the three-dimensional structure and the quantitative identification of chemical components by using the Atom Probe Tomography (APT) technology. In some embodiments, as shown in FIG. 2A , the sample 14 is further processed and modified by using the ion beam source 23 , that is, the ion beam generated by the ion beam source 23 is used to cut the sample 14 on the sample stage 10 , so that Sample 14 has a tapered profile. In some embodiments, the ion beam source 23 is disposed above the sample stage 10 and has an angle with the electron beam source 21 , and the angle may be about 52 degrees.

In detail, APT is a technique for atomic-level material analysis that can provide three-dimensional images and quantitative chemical composition identification with high sensitivity. The technique relies on the ionization of individual atoms/clusters of atoms on the sample surface and subsequent Field Evaporation. Its samples are prepared in the form of conical tips. In general, in order to maintain analytical quality, the samples must meet several requirements: (1) the sample is conical and has an apex radius less than 100 nm; (2) the sample shape must be symmetrical, Avoid forming an elliptical cone; (3) the shape angle of the sample should not be too large; and (4) the conical cylinder of the sample must avoid micro-cracks. As for the sample preparation technology, currently it is mainly through the application of Focused Ion Beam (FIB), for example, the target analysis area of the semiconductor element is first plated with a protective layer of platinum (Pt), nickel (Ni) or other materials. Next, a wedge-shaped strip sample was cut out with a width of about 1-2 μm and a length of about 15-20 μm. Then, one end of the sample is cut off to be plated on a manipulator, and the other end is cut off, and then the sample is taken out from the main body of the semiconductor element. The sample is then plated onto the sample stage. After that, the radius of the sample is reduced to less than about 100 nm by an annular thinning method (Annular Milling), and finally, a lower voltage is used for cleaning to remove the damaged layer caused by, for example, gallium (Ga) ions.

The samples prepared by the above method can be applied to the atom probe tomography technology to scan the three-dimensional structure of the sample, so as to observe the defect points of the semiconductor element from a three-dimensional angle, including observing the morphology of the defect points and analyzing the location of the defect points. elemental composition.

Therefore, in some embodiments of the present disclosure, the ion beam source 23 is used to provide a focused ion beam. For example, the ion beam source 23 can use gallium as the ion source, considering that gallium has a low melting point, low vapor pressure and good Antioxidant power and so on. When the ion beam source 23 is in use, an electric field is applied to make the liquid gallium form a small tip, for example, the liquid gallium is pulled into a Taylor cone with a curvature radius smaller than a threshold radius, so that the gallium is freed and ejected to form gallium ion beam. The derived gallium ion beam can be focused by an electric lens, and the size of the ion beam can be determined by a series of variable apertures, and then focused on the surface of the sample for a second time, using physical collision to achieve the purpose of cutting. Generally, the size of the ion beam formed by this method is less than 10 nm, which can be used as a tool for precise nanostructure processing.

Further, the samples used in the present disclosure can also use the ion beam source 23 to mark the defect points of the semiconductor element. In order to reduce the power consumption of semiconductor components, improve performance and increase the density of transistors and other practical needs, the appearance of semiconductor components has been scaled down to the nanometer scale. Not only are their defects difficult to be directly observed with the naked eye, but in fact, electrical properties can only be checked through probes. The test method is used to accurately determine the area of electrical abnormality. For example, the electronic component at a specific coordinate position is tested to be abnormal. However, even if an electrical abnormality is detected by a probe, the location of the abnormality is known. However, if you want to observe the defect, it is not as direct as looking for the electrical abnormality. The traditional TEM or STEM needs to slice the sample for observation, but the sliced position does not necessarily correspond to the location of the defect accurately, forcing the operator to find a needle in a haystack even if the electrical property of the semiconductor element is abnormally measured by the operator. Generally look for the location of the defect structure under the microscope.

In some embodiments of the present disclosure, the ion beam source 23 can be used to make marks, such as using a focused ion beam to deposit metal lines on the surface of the sample. As shown in the top view of the semiconductor device shown in FIG. 4A , an electrical abnormality can be found in a semiconductor device 40 through electrical testing, that is, the location of the defect 41 can be accurately determined through electrical testing. The sample observed from a two-dimensional angle may be cut to other positions of the semiconductor element 40 , such as the area A, the area B, the area C, etc., which are not where the defect point 41 is located. Therefore, in some embodiments of the present disclosure, as shown in FIG. 4B , after electrical testing by the focused ion beam deposition technique, a plurality of metal line segments are directly deposited around the defect point 41 as the positioning mark 42 . Conventionally, focused ion beam is used to deposit metal lines, and one of its uses is for rewiring during circuit modification, or to adjust the resistivity of components. In this embodiment of the present disclosure, the positioning mark line 42 is used as Defect point 41 is used for marking. In some embodiments, the material of the locating marks 42 includes platinum (Pt), which can exhibit better contrast and thus be more easily observed than carbon-based materials. The principle of FIB deposition is to use a metal tube to supply a small amount of metal-based precursor (precursor) gas to the surface of the semiconductor element 40, and use ion beam bombardment to decompose the precursor to deposit metal, which can be classified as ion beam induced. A kind of deposition (Ion beam-induced deposition, IBID). In some embodiments, similar electron beam-induced deposition (EBID) may also be used to deposit the alignment marks 42 .

As shown in FIG. 4B , the top view of the semiconductor device provided with the positioning mark, in some embodiments, the positioning mark 42 may have a plurality of marking lines 42 a , 42 b , 42 c , 42 d pointing to the defect point 41 . In some embodiments, the marking lines 42 (a-d) in the positioning mark 41 are arranged in a cross shape, and the center of the cross shape is where the defect point 41 is located. In some embodiments, marked lines 42(a-d) do not touch each other, but defect points 41 are left uncovered by marked lines 42(a-d). For example, the marking lines in the same direction, such as marking lines 42a, 42c or a combination of marking lines 42b, 42d, have a spacing of less than about 30nm, so in some embodiments, the defect point 41 is located at about 30nm x 30nm and is surrounded by positioning marks 42.

The cross-sectional view of the semiconductor device shown in FIG. 4C is shown in cross-section along the line segment FF' of FIG. 4B . In some implementations, the marking line 42b (same for other marking lines) may have a substantially square or rectangular cross-sectional structure. In some embodiments, the aspect ratio of the marker lines is about 1:1 to about 1:3. In some embodiments, after the positioning mark 42 is made by FIB, organic colloid (not shown in the figure) can be further coated to cover the marking lines 42 (a-d) of the positioning mark 42, as a protective layer of the positioning mark, which can be used as a protective layer for the positioning mark. The aspect ratio of the aforementioned marking lines 42(a-d) is maintained without collapsing into a flattened shape.

In some embodiments of the present disclosure, after the semiconductor device 40 is confirmed to have defect points 41 through electrical testing, positioning marks 42 may be deposited first to complete the positioning of the defect points 41 , and then the three-dimensional shape of the defect points 41 may be further performed in the form of fixed points. For structural observation, the semiconductor device 40 can be cut to obtain a long strip of samples as described above for the preparation of the APT samples, and then plated onto the sample pillars (eg, the first sample pillars 12 ) of the sample stage 10 .

As shown in FIG. 5A , the top view of the semiconductor device provided with the positioning marks, and the three-dimensional schematic view of the sample in FIG. 5B , in some embodiments of the present disclosure, the sample 51 obtained after cutting the sample area 50 includes at least part of the positioning marks 42 , which can be Plated to the sample support of the sample stage. In some embodiments, after the positioning marks 42 are formed on the surface of the semiconductor device 40, in addition to the aforementioned organic colloid, other structures may be formed on the surface, such as forming a cap layer or a sacrificial layer 43 (see FIG. 6) Protect the lower region of interest (Region of Interest, ROI), for example, the structure including the defect point 41 from being damaged by gallium. In this embodiment, although the positioning marks 42 are covered, the positioning marks 42 can still realize the positioning of the defect points 41 in the process of preparing the APT sample.

As shown in FIG. 5B , no matter whether the positioning mark 42 on the sample 51 is covered by other structures, the side surface 420 of the positioning mark 42 can be observed. Therefore, as shown in FIG. 5C , FIG. 6A and FIG. 6B In the process of reducing the radius and gradually cutting into a tapered profile, it can be continuously observed from the side surface of the sample 51 and tracking the side surface 420 of the positioning mark 42, and it can be known that the sample 51 is still in the process of cutting into a tapered profile. Gradually approach the position of the defect point 41 . As mentioned above, the material of the positioning mark 42 contains platinum, and it can show better contrast with other surrounding materials (as shown in FIG. 6A ), so the marking line 42 (a-d) of the positioning mark 42 can be clearly seen ) are the positioning targets. In addition, since one end of the marking line 42 (a-d) points to the position of the defect point 41 but does not cover the defect point 41, during the process of cutting the sample 51 into a tapered profile, it is observed that the side of the cone has been removed from the marked line. 42(a-d) changes to no longer marked lines, such as the schematic diagrams in FIG. 6A and FIG. 6B, then it means that the sample 51 after cutting and modification has reached or is close to the defect point 41, and the sample 51 together with the sample stage 10 can be moved. To carry out APT technical analysis, that is, three-dimensional image observation and quantitative chemical composition identification of defect points. In some embodiments, the modified sample 51 has a height of about 40 nm, a bottom width of about 20 to 30 nm, and a top width of about 10 nm.

With the above, as shown in FIG. 7 , in some implementations of the present disclosure, a method for modifying a sample is disclosed, which at least includes step 601 : placing a sample on a sample support of a sample stage, the top surface of the sample support having grooves grooves extending to opposite edges of the top surface such that both sides of the sample are substantially unobstructed by the sample support; and step 602 : cutting the sample using an ion beam such that the sample Has a tapered profile. In addition, in some embodiments, before placing the sample on the sample stage, the present disclosure can measure the electrical properties of the semiconductor element to determine the defect point, and form positioning marks on the semiconductor element before the sample is cut and obtained from the semiconductor element. Using a plurality of marking lines of the positioning mark to point to the defect point, and then cutting the semiconductor element to obtain a sample, at this time, the sample contains at least part of the positioning mark. Then, in the step of using the ion beam to cut the sample, the part of the marking line of the positioning mark can be cut, so that the marking lines respectively expose their cross-sections, and the positions of the defect points can be identified by using the cross-sections.

To sum up, in some embodiments, the present disclosure provides a three-dimensional structure observation method for locating and locating defect points of a semiconductor device. This method can be combined with the novel sample stage structure, so that the sample on the sample stage can not only be observed by the electron beam and the detector for two-dimensional structure, but also can be cut and modified by the ion beam processing to have a conical profile and another 3D observation and elemental analysis for APT. In order to improve the accuracy of elemental analysis, the present disclosure uses silicon material to make the sample stage. And in order to enable the defect points to be correctly positioned and observed, the present disclosure uses a positioning mark containing platinum material, so that the process of cutting the sample into a tapered profile can confirm the position of the defect point through the positioning mark.

The foregoing outlines the structure of several embodiments so that those skilled in the art may better understand aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments described herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.

Symbol Description

10: Sample stage

11: Pedestal

11A: First surface

11B: Second Surface

12: First Sample Pillar

12A: Top surface

13: Groove

13A: Electron beam entrance

13B: Electron beam exit

131: First groove

132: Second groove

14: Sample

15: Second Sample Pillar

21: Electron beam source

22: Detector

23: Ion beam source

31: Fixtures

40: Semiconductor components

41: Defect point

42: Orientation Marker

42a: Marker line

42b: Marker line

42c: Marker line

42d: Marker line

420: Side

43: Sacrificial Layer

50: Sample area

51: Sample

601: Steps

602: Step

A: area

B: area

C: area

D _E : travel path

FF': Line segment.

Claims (10)

1. A sample carrier, comprising:

a base having a first surface; and

the first sample support is arranged on the first surface of the base, and the top surface of the first sample support is provided with a first groove for placing a sample.

2. The sample stage of claim 1, wherein the first trench extends to opposing edges of the top surface.

3. The sample stage of claim 1, wherein the material of the base and the first sample support posts comprises silicon.

4. The sample stage of claim 1, wherein the top surface of the first sample support post further has a second groove that is orthogonal to the first groove.

5. A system for modifying a sample, comprising:

an electron beam source for generating an electron beam;

a sample stage disposed under the electron beam source and having a sample support with a groove on a top surface thereof for placing a sample;

an ion beam source to generate an ion beam to cut the sample placed on the sample stage; and

a detector disposed under the sample stage;

wherein the sample stage can be adjusted to change its angle relative to the electron beam source such that the electron beam generated by the electron beam source can penetrate the sample and be detected by the detector.

6. The system of claim 5, further comprising a clamp connected to the sample stage for moving or rotating the sample stage.

7. A method of modifying a sample, comprising:

a sample support post for positioning a sample on a sample stage, the sample support post having a top surface with a channel extending to opposite edges of the top surface such that two sides of the sample are substantially free from the sample support post; and

and cutting the sample by using an ion beam to enable the sample to have a conical profile.

8. The method of claim 7, wherein prior to placing the sample on the sample stage, further comprising:

measuring the electrical property of the semiconductor element to judge the defect point;

forming a positioning mark on the semiconductor element, wherein the positioning mark is provided with a plurality of mark lines pointing to the defect points; and

cutting the semiconductor element to obtain the sample, wherein the sample at least comprises part of the positioning mark.

9. The method of claim 8, wherein the step of cutting the sample using an ion beam comprises cutting portions of the marking lines so that the marking lines respectively expose side surfaces thereof, and identifying the positions of the defect points using the side surfaces.

10. The method of claim 8, wherein prior to cutting the semiconductor element to obtain the sample, further comprising applying an organic colloid to cover the marking lines.

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