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CN115116979A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN115116979A
CN115116979A CN202110833899.5A CN202110833899A CN115116979A CN 115116979 A CN115116979 A CN 115116979A CN 202110833899 A CN202110833899 A CN 202110833899A CN 115116979 A CN115116979 A CN 115116979A
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CN
China
Prior art keywords
terminal
semiconductor device
semiconductor chip
semiconductor
sintered material
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Granted
Application number
CN202110833899.5A
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English (en)
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CN115116979B (zh
Inventor
川城史义
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Publication of CN115116979A publication Critical patent/CN115116979A/zh
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Publication of CN115116979B publication Critical patent/CN115116979B/zh
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Abstract

本发明的实施方式提供供给能力有所提高的半导体装置。实施方式的半导体装置具备：半导体芯片；设置在半导体芯片的周围且具有长方体状的形状且在底面的端部具有凹部的注塑树脂；以及设置在凹部的第一上表面且与半导体芯片电连接的第一端子。

Description

半导体装置
相关申请
本申请享受以日本专利申请2021-46291(申请日：2021年3月19日)为基础申请的优先权。本申请通过参照该基础申请，包含基础申请的全部内容。
技术领域
本发明的实施方式涉及半导体装置。
背景技术
面向发电或送电、泵或鼓风机等旋转器、通信系统或工厂等电源装置、利用交流发动机的铁道、电动汽车、家庭用电气化制品等广泛领域的MOSFET(Metal-Oxide-Semiconductor Field-Effect-Transistor，金氧半场效晶体管)或IGBT(Insulated GateBipolar Transistor，绝缘栅双极型晶体管)等的设计成电力控制用的功率半导体芯片正在进行开发。
另外，还进行着使用该功率半导体芯片的、作为电源组件的半导体装置的开发。这种半导体装置要求高电流密度化、低损失化、高放热化等技术条件。
发明内容
实施方式提供供给能力有所提高的半导体装置。
实施方式的半导体装置具备半导体芯片；设置在半导体芯片的周围且具有长方体状形状且在底面的端部具有凹部的注塑树脂；以及设置在凹部的第一上表面且与半导体芯片电连接的第一端子。
附图说明
图1(a)～(c)为实施方式的半导体装置的示意图。
图2为实施方式的半导体装置的示意截面图。
图3(a)、(b)为实施方式的半导体装置的示意仰视图。
图4为实施方式的半导体装置的制造工序的流程图。
图5(a)、(b)为比较方式的半导体装置的示意立体图。
具体实施方式
以下，一边参照附图一边说明本发明的实施方式。此外，以下的说明中，同一构件等带有同一符号，对于曾经说明过的构件等，适当将其说明省略。
本说明书中，为了表示部件等的位置关系，将附图的上方向表述为“上”、将附图的下方向表述为“下”。本说明书中，“上”、“下”的概念并非必须是表示与重力朝向的关系的用语。
(实施方式)
实施方式的半导体装置具备：半导体芯片；设置在半导体芯片的周围且具有长方体状形状且在底面的端部具有凹部的注塑树脂；以及设置在凹部的第一上表面且与半导体芯片电连接的第一端子。
图1为实施方式的半导体装置100的示意图。图1(a)为实施方式的半导体装置100的示意立体图。图1(b)为实施方式的半导体装置100的示意仰视图。图1(c)为平行于XZ面的面内的实施方式的半导体装置100的要部的示意截面图。图2为平行于XZ面的面内的实施方式的半导体装置100的示意截面图。
使用图1及图2，对实施方式的半导体装置100进行说明。
引线框2(图2)是配置半导体芯片4且包含铜(Cu)等导电性材料的板状构件。
将半导体芯片4(图2)例如设置在引线框2上。半导体芯片4例如为纵型的MOSFET或IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极型晶体管)，但并不限于此。例如，当半导体芯片4为MOSFET时，设置于半导体芯片4底面的漏电极5通过设置于半导体芯片4与引线框2之间的未图示的接合材料，与引线框2电连接。这里，作为接合材料使用软钎料或包含银微粒子的导电性树脂等。例如，在半导体芯片4的上面设置源电极6和栅电极7。
将注塑树脂10设置在半导体芯片4的周围。注塑树脂10是对半导体芯片4进行密封的树脂。注塑树脂10例如为环氧树脂等树脂。此外，注塑树脂10也可进一步包含硅氧化物等填充物。注塑树脂10具有长方体状的形状。在注塑树脂10的底面11的端部11a上设置凹部12。
这里，定义了X方向、垂直交叉于X方向的Y方向、垂直交叉于X方向及Y方向的Z方向。注塑树脂10的底面11与XY面平行。
例如，如图1(a)及图1(b)所示，在注塑树脂10的底面11上，在相互间相向的端部11a及端部11b上设置凹部12a及凹部12b。
在凹部12a上设置第一上表面14a。在第一上表面14a上设置第一端子20a、第一端子20b、第一端子20c及第一端子20d。
在凹部12b上设置第一上表面14b。在第一上表面14b设置第一端子20e、第一端子20f、第一端子20g及第一端子20h。
如图2所示，第一端子20a连接于引线框2。这里，如上所述，上述引线框2连接于半导体芯片4的漏电极5。因此，第一端子20a电连接于半导体芯片4的漏电极5。此外，省略了图示，但第一端子20b、第一端子20c及第一端子20d也同样电连接于半导体芯片4的漏电极5。
如图2所示，第一端子20e经由例如焊丝8与半导体芯片4的栅电极7连接。此外，第一端子20e也可以经由带、夹具或连接器与栅电极7连接。此外，虽省略了图示，但第一端子20f、第一端子20g及第一端子20h也同样经由例如焊丝、带、夹具或连接器与半导体芯片4的源电极6电连接。此外，焊丝8、带、夹具或连接器包含Cu(铜)、Al(铝)、Au(金)或Ag(银)。
第二端子30是板状的构件。第二端子30具有第二上表面32。第二端子30的膜厚例如为100μm左右。例如，第一端子20的Z方向的厚度与第二端子30的Z方向的厚度之和t3(图2中图示)优选基于JEDEC MP240为0.23mm～0.33mm。
第一端子20及第二端子30包含Au(金)、Ag(银)、Cu(铜)、Ni(镍)等金属材料。
将烧结材料40(图1(c))设置在第二上表面32上。烧结材料40的第一部分42连接于第一端子20。第二部分44及设有第二部分44的第二端子30的部分按照从注塑树脂10及凹部12突起的方式进行设置。
烧结材料40具有导电性。这里，作为该烧结材料40，例如优选使用利用了Ag(银)、Cu(铜)或Ni(镍)的粒子的烧结材料40。在烧结前，例如在Ag或Cu等微细粒子(纳米粒子或微粒子)的表面上设置保护膜，成为在分散于有机溶剂的物质。进而，通过烧结，保护膜和有机溶剂蒸发，形成烧结材料40。
此外，烧结材料40可以进一步包含树脂。这是由于，通过包含树脂、可以进一步确保耐热性。这里，作为树脂并无特别限定，例如优选使用环氧树脂。
例如，为不包含树脂的烧结材料40时，可以一边对例如使用压接机等接合而成的部分施加压力、一边将其烧结。为包含树脂的烧结材料40时，也可以在不施加上述压力的情况下将其烧结。此外，烧结的工艺并不限定于上述记载。
在烧结材料40的第一部分42及第二部分44中例如设有耗尽部46。耗尽部46例如在上述烧结时，通过保护膜、有机溶剂或树脂等进行蒸发来形成。烧结材料40的耗尽部46的比例优选为烧结材料的20％以下。进而，烧结材料40的金属的比例优选为烧结材料40的80％以上。此外，耗尽部46的个数或形状并不限定于图1(c)所示者。
烧结材料40的膜厚优选为5μm～200μm。
第二部分44的膜厚t2优选比第一部分42的膜厚t1厚。
第一部分42的膜厚例如为20μm左右。第二部分44的膜厚例如为40μm左右。
从注塑树脂10中的第二端子30的突出部分的长度为了提高导电性，优选尽量地短，例如优选为100μm以下。
第二端子30优选具有包含Cu(铜)的母材部34、和设置于母材部34的底面36(表面的一例)或母材部34的侧面38(表面的一例)中的膜50。这里，作为膜50(第一膜的一例)，优选包含Sn(锡)、Au(金)、Cu(铜)或Ag(银)等能够软钎料接合的金属。另外，作为膜50(第二膜的一例)，优选是BTA(苯并三唑)等含N(氮)的膜。
半导体装置100中使用的材料、半导体装置100的构成要素的尺寸、耗尽部46的比例等可以通过SEM(Scanning Electron Microscope：扫描型电子显微镜)、TEM(Transmission Electron Microscope：透过型电子显微镜)、俄歇电子分光法、XPS(X-rayPhotoelectron spectroscopy：X线光电子分光法)、EDX(Energy Dispersive X-rayspectroscopy：能量分散型X线分析)进行测定。
图3为实施方式的半导体装置的示意仰视图。如图3(a)所示，在底面11中，与半导体芯片4的漏电极5电连接的第二端子30a、第二端子30b、第二端子30c及第二端子30d优选与电连接于半导体芯片4的源电极6的第二端子30f、第二端子30g及第二端子30h相向地设置。此外，如图3(b)所示，电连接于半导体芯片4的漏电极5的第二端子30a、第二端子30b、第二端子30c与电连接于半导体芯片4的源电极6的第二端子30f、第二端子30g及第二端子30h也可分别设置在底面11中相邻的边上。
图4为实施方式的半导体装置的制造工序的流程图。
首先，作为“引线框”工序，准备引线框2(S2)。
接着，作为“半导体芯片固定”工序及“第一端子固定”工序，使用软钎料等接合材料将半导体芯片4固定在引线框2上。
接着，作为“助焊剂洗涤”，当在半导体芯片4的固定中使用的接合材料中包含助焊剂时，对助焊剂进行洗涤(S6)。
接着，作为“引线接合”工序，例如使用焊丝8将半导体芯片4的源电极6及栅电极7与第一端子20连接(S8)。此外，也可代替焊丝8使用带、夹具或连接器进行连接。
接着，作为“注塑成型”工序，使用注塑树脂10对引线框2、半导体芯片4及第一端子20进行密封(S10)。
接着，作为“刀片切割”，为了形成凹部12，使用刀片以两个阶段对注塑树脂10的底面11进行切割。首先，使用第一刀片，在Z方向上切断注塑树脂10的底面11。这里，使用第一刀片时，不在Z方向上将注塑树脂10完全地切断。接着，使用比第一刀片更细的第二刀片，将被第一刀片切断的注塑树脂10的底面11的部分在Z方向上切断。进而，以注塑外型进行单片化(S12)。如此，可以形成凹部12。
接着，作为“第二端子固定”工序，将在第二上表面32设有烧结前的烧结材料40的第二端子30固定在凹部(S14)。
接着，作为“加压压制”工序，通过加热及加压在第二上表面32形成烧结材料40，将第二端子30与第一端子20接合(S16)。
接着，作为“镀覆”工序，例如通过镀覆在第二端子30的底面36及侧面38上形成膜50。由此，获得实施方式的半导体装置100。
此外，实施方式的半导体装置100的制造方法并不限定于上述方法。
接着，记载实施方式的半导体装置的作用效果。
图5为比较方式的半导体装置800的示意立体图。
在利用注塑树脂10密封有半导体芯片4的半导体装置中，具有如图5(a)所示的半导体装置800a那样、第一端子20未从注塑树脂10中突出的装置；如图5(b)所以的半导体装置800b那样、第一端子20从注塑树脂10中突出的装置。半导体装置800a由于第一端子20未从注塑树脂10中突出，因此能够以高密度搭载于未图示的印刷基板等基板上。另一方面，半导体装置800b由于第一端子20从注塑树脂10中突出，因此与半导体装置800a相比，能够以更大的实际安装面积(接合面积)与未图示的印刷基板等基板接合。因此，由于实际安装面积增大，因此能够获得更高的可靠性。
如此，即便是使用相同半导体芯片4的半导体装置，根据其目的，有需求半导体装置800a的情况和需求半导体装置800b的情况。但是，在半导体装置800a和半导体装置800b中，由于制造工艺不同，因此有时难以根据使用目的或顾客要求，提供所需求的装置。
因此，实施方式的半导体装置具备：半导体芯片4；设置于半导体芯片4的周围且具有长方体状的形状且在底面的端部具有凹部的注塑树脂10；以及设置于凹部的第一上表面14且与半导体芯片4电连接的第一端子20。
根据该半导体装置，通过分开使用没有第二端子30者或者具有第二端子30者，也可以提供图5所示的半导体装置800a及半导体装置800b的任一种。因此，能够提供供给能力提高的半导体装置。
通过进一步具备：具有第二上表面32的第二端子30；及设置在第二上表面32上且具有连接于第一端子20的第一部分42和从凹部中突出的第二部分44的烧结材料40，可以提供端子从注塑树脂10中突出的半导体装置。此外，通过设置第二部分44，来自半导体芯片4的、经由第一端子20及第二端子30的放热性提高。
包含Ag(银)、Cu(铜)或Ni(镍)的烧结材料40显示良好的导电性。另外，该烧结材料40在使用软钎料等将半导体装置100实际安装在印刷基板等基板上时，例如在260℃左右的温度下不会溶解。因此，可以将半导体装置100良好地实际安装在印刷基板等基板上。
通过加压压制将第二端子30接合于第一端子20时，由于第一部分42连接于第一端子20，因此因该加压压制而压碎。因而，未连接于第一端子20的第二部分44的膜厚t2比第一部分42的膜厚t1厚。
在烧结时，在烧结材料40中形成耗尽部46。耗尽部46的比例为烧结材料40的20％以下时，由于金属增多，因此可以获得良好的导电性。
第二端子30具有含Cu(铜)的母材部34和设置于母材部34表面的包含能够软钎料接合的金属的膜50时，可以容易地进行在印刷基板等基板上的实际安装。
第二端子30具有含Cu(铜)的母材部34和设置于母材部34表面的含N(氮)的膜50时，可以获得耐氧化性强的第二端子30。
烧结材料40的膜厚优选为5μm～200μm。认为其原因在于，当小于5μm时，过薄，则第一端子20与第二端子30的接合性降低。另外，大于200μm时，由于膜厚过厚，因此耗尽部46的体积增大、强度易于下降。
根据实施方式的半导体装置，能够提供供给能力提高的半导体装置。
说明了本发明的数个实施方式，但这些实施方式是作为例子进行提示的，并不是为了限定发明的范围。这些新型的实施方式可以以其他各种方式进行实施，在不脱离发明主旨的范围内，可以进行各种省略、置换、变更。这些实施方式或其变形包含在发明范围或主旨中，同时包含在权利要求所记载的发明及其均等的范围内。

Claims (8)

1.一种半导体装置，其具备：
半导体芯片；
设置在所述半导体芯片的周围且具有长方体状的形状且在底面的端部具有凹部的注塑树脂；以及
设置在所述凹部的第一上表面且与所述半导体芯片电连接的第一端子。
2.根据权利要求1所述的半导体装置，其进一步具备具有第二上表面的第二端子；及设置于所述第二上表面且具有连接于所述第一端子的第一部分和从所述凹部突出的第二部分的烧结材料。
3.根据权利要求2所述的半导体装置，其中，所述第二部分的膜厚比所述第一部分的膜厚厚。
4.根据权利要求3所述的半导体装置，其中，所述烧结材料包含Ag(银)、Cu(铜)或Ni(镍)。
5.根据权利要求2或3所述的半导体装置，其中，所述烧结材料具有耗尽部。
6.根据权利要求5所述的半导体装置，其中，所述耗尽部的比例为所述烧结材料的20％以下。
7.根据权利要求2或3所述的半导体装置，其中，所述第二端子具有含Cu(铜)的母材部和设置于所述母材部的表面且包含能够软钎料接合的金属的第一膜。
8.根据权利要求2或3所述的半导体装置，其中，所述第二端子具有含Cu(铜)的母材部和设置于所述母材部的表面且含N(氮)的第二膜。
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