CN114725022A - A kind of preparation method of CMOS inverter based on GaOx-GaN - Google Patents

Abstract

The embodiment of the invention discloses a GaO-based method_x-a method of fabricating a CMOS inverter of GaN comprising: sequentially growing a carbon-doped GaN buffer layer on a single crystal Si substrate or a GaN substrate, and growing a GaN channel layer on the surface of the carbon-doped or silicon GaN buffer layer; photoetching the GaN channel layer and the carbon-doped GaN buffer layer in the direction vertical to the surface of the GaN channel layer to form an isolation region, and growing a high-thermal-conductivity substance in the isolation region; making grooves on the surface of the GaN layer on two sides of the isolation region, and depositing GaO in the grooves_xAnd depositing GaO_xInjecting Mg ions into the rear side to form Mg-GaO_x(ii) a Depositing a metal film and a dielectric layer on the surface of the device, annealing to obtain a drain electrode in the barrier layer region, a source electrode in the two end regions of the GaN layer, and GaO on the two sides_xLayer and Mg-GaO_xDepositing a metal film and a dielectric layer on the surface of the layer, stripping and annealing to obtain the grid. The invention forms GaO_x-GaN heterojunction, can be lifted upThe performance of the phase inverter is simpler in structure and good in heat dissipation.

Description

A kind of preparation method of CMOS inverter based on GaOx-GaN

technical field

The embodiments of the present invention relate to the technical field of materials, and in particular, to a method for preparing a GaO _x -GaN-based CMOS inverter.

Background technique

In recent _years , GaN and _Ga2O3 have been identified as one of the most important semiconductors for power applications, both of which have relatively large band gaps and breakdown electric fields, enabling high voltage, high current, and stable device operation . Inverters with GaN/AlGaN heterojunctions have attracted great attention and are widely used because of their excellent performance. The main features of this type of inverter are: (1) High switching speed and small parasitic inductance. (2) Applicable to high frequency, high voltage and other places.

However, the existing inverters have high power consumption, complex fabrication processes, complex circuits, poor heat dissipation, and the maximum on-current density is limited to several tens of mA/mm. The size of the device is large, and the device production process usually requires plasma Bulk etching will have a relatively large impact on device performance.

SUMMARY OF THE INVENTION

An embodiment of the present invention provides a method for preparing a GaO _x -GaN-based CMOS inverter, including:

A carbon-doped GaN buffer layer is sequentially grown on a single crystal Si substrate or a GaN substrate, and a GaN channel layer is grown on the surface of the carbon-doped or silicon GaN buffer layer;

Photolithography of the GaN channel layer and the carbon-doped GaN buffer layer in the direction perpendicular to the surface of the GaN channel layer forms an isolation region, and a high thermal conductivity substance is grown in the isolation region;

Make grooves on the surface of the GaN layer on both sides of the isolation region, deposit _GaOx in the grooves, and implant Mg ions on the side after the deposition of _GaOx to form Mg-GaOx;

Deposit a metal film and a dielectric layer on the surface of the device, anneal, get the drain in the barrier layer region, get the source electrode in the two end regions of the GaN layer, and deposit the metal film and dielectric on the surfaces of the GaO _x layer and the Mg-GaO _x layer on both sides layer, stripped, and annealed to get the gate.

Further, the thickness of the carbon or silicon doped GaN buffer layer is 3-6 μm, and the concentration of carbon or silicon doped is 1˜3×10 ¹⁸ cm ⁻³ .

Further, the thickness of the GaN channel layer is 150-250 nm.

Further, the thicknesses of the GaO _x layer and the Mg-GaO _x layer are 40-60 nm.

Further, the doping concentration of Mg in the Mg-GaO _x layer is 1˜3×10 ¹⁸ cm ⁻³ .

Further, the length of the high thermal conductivity substance is 4 to 10 μm.

Further, a photoresist is coated on the surface after the deposition of _GaOx , and the photoresist on one side of the groove is peeled off to expose the _GaOx , and Mg ions are implanted.

Further, Al ₂ O ₃ is used as the gate dielectric layer, the thickness of Al ₂ O ₃ is 20-30 nm, silicon is used as a dopant, and the doping concentration is 2×10 ¹⁸ cm ⁻³ .

Further, Ti, Al, Ni or Au are used for the drain and source metal films, and the annealing is performed at 650° C. in an N2 environment.

Further, as the gate metal film, Ni or Au is used.

The present invention proposes a _GaOx -GaN-based CMOS inverter, which forms a _GaOx -GaN heterojunction, the advantages of which are: ( ₁ ) _Ga2O3 has a high band gap and supports higher frequencies, etc. The advantages can improve the performance of the inverter, so that it can be better used in power devices such as high voltage, high temperature and high power; (2) The structure is simpler, and Ga ₂ O ₃ is n-type due to self-compensation, eliminating one step of doping Step; (3) adopting diamond isolation, good heat dissipation.

Description of drawings

In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained from these drawings without creative effort.

Fig. 1 is a preparation method of a GaO _x -GaN-based CMOS inverter provided by an embodiment of the present invention;

FIG. 2 is another preparation method of a GaO _x -GaN-based CMOS inverter provided by an embodiment of the present invention;

Fig. 3 is another preparation method of a GaO _x -GaN-based CMOS inverter provided by an embodiment of the present invention;

FIG. 4 is a fourth preparation method of a GaO _x -GaN-based CMOS inverter provided by an embodiment of the present invention;

5 is a schematic structural diagram of a GaO _x -GaN-based CMOS inverter prepared in an embodiment of the present invention;

FIG. 6 is a schematic diagram of a circuit structure of a GaO _x -GaN-based CMOS inverter prepared in an embodiment of the present invention.

Detailed ways

In order for those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

An embodiment of the present invention provides a preparation method of a GaO _x -GaN-based CMOS inverter, comprising the following steps:

Step 1, growing a carbon-doped GaN buffer layer on a single crystal Si substrate or a GaN substrate in turn, and growing a GaN channel layer on the surface of the carbon-doped or silicon GaN buffer layer;

In this embodiment, as shown in FIG. 1 , preferably, a 4um carbon-doped GaN buffer layer is grown on a Si substrate or a GaN substrate by organic chemical vapor deposition (MOCVD). Gallium nitride (GaN), preferably 200 nm, is grown on the substrate on the buffer layer by organic chemical vapor deposition (MOCVD). Preferably, the concentration of carbon or silicon doping is 2×10 ¹⁸ cm ⁻³ . The thickness of the substrate is 1 to 1.5 mm, preferably 1.15 mm.

Step 2, photolithography the GaN channel layer and the carbon-doped GaN buffer layer in a direction perpendicular to the surface of the GaN channel layer to form an isolation region, and grow a material with high thermal conductivity in the isolation region;

In an embodiment of the present invention, as shown in FIG. 2 , a metal organic chemical vapor deposition (MOCVD) is used to vertically grow diamond (Diamond) or aluminum nitride ceramics in the buffer layer of the intermediate isolation region. The length of the high thermal conductivity substance is 4 to 10 μm, preferably 5 μm. The thickness of the GaN channel layer is 150-250 nm, preferably 200 nm.

Step 3, making grooves on the surface of the GaN layer on both sides of the isolation region, depositing GaO _x in the groove, and implanting Mg ions on the side after depositing GaO _x to form Mg-GaO _x ;

In the embodiment of the present invention, as shown in FIG. 3 , when making the groove, a photolithography process is used to form the groove on the gallium nitride (GaN) layers on both sides of the isolation region, and the depth is 10-100 nm, preferably 50 nm. GaO _x is deposited on the groove side by methods such as hydride vapor phase epitaxy (HVPE) and molecular organic vapor deposition (MBE) to the same depth as the groove depth. Coat photoresist on the surface after depositing GaO _x , peel off the photoresist on one side of the groove to expose GaO _x , and implant Mg ions. The doping concentration of Mg in the Mg-GaO _x layer is 1～3×10 ¹⁸ cm ^-3 . It is preferably 2×10 ¹⁸ cm ⁻³ , and in other embodiments, the Mg ions can also be replaced by other metal ions. The thickness of the GaO _x layer and the Mg—GaO _x layer is 40 to 60 nm, preferably 50 nm.

Step 4: Deposit a metal film and a dielectric layer on the surface of the device, anneal, obtain a drain in the barrier layer region, obtain a source electrode in the two end regions of the GaN layer, and deposit metal on the surfaces of the GaO _x layer and the Mg-GaO _x layer on both sides The film and dielectric layers are stripped and annealed to obtain the gate.

In the embodiment of the present invention, as shown in FIG. 4, when preparing the drain electrode and the source electrode: use thermal evaporation, magnetron sputtering or electron beam evaporation and other methods to evaporate a metal film (such as Ti(25nm)/Al(75nm)/ Ni(25nm)/Au(75nm)), the electrodes were formed using a lift-off process and then annealed at 650°C in a N ₂ environment. When preparing the gate electrode (Gate), use thermal evaporation, magnetron sputtering or electron beam evaporation to evaporate metal films (such as Ni(25nm)/Au(25nm)) on the _GaOx and Mg- _GaOx layers, respectively. , and annealed at 650°C under N ₂ environment after forming electrodes using a lift-off process.

In the embodiment of the present invention, Al ₂ O ₃ is used as the gate dielectric layer, the thickness of Al ₂ O ₃ is 20-30 nm, silicon is used as the dopant, and the doping concentration is 2×10 ¹⁸ cm ⁻³ .

Figure 5 is a schematic structural diagram of the prepared GaO _x -GaN-based CMOS inverter, wherein 1 and 9 are gate electrodes, 2 and 10 are source electrodes, 3 is a GaO _x layer, and 4 and 12 are GaN channels layer, 5 and 13 are GaN buffer layers, 6 is a silicon single crystal substrate, 7 is a drain, 8 is a gate dielectric layer, 11 is a Mg-GaO _x layer, and 14 is a diamond layer. FIG. 6 is a circuit diagram of a _GaOx -GaN based CMOS inverter.

The present invention proposes a _GaOx -GaN CMOS inverter, which forms a _GaOx -GaN heterojunction, and has the advantages of: ( ₁ ) _Ga2O3 has the advantages of high forbidden band width and higher frequency support, etc. Improve the performance of the inverter, so that it can be better used in high-voltage, high-temperature and high-power power devices; (2) the structure is simpler, and Ga ₂ O ₃ is n-type due to self-compensation, eliminating one doping step; (3) Using diamond isolation, good heat dissipation.

Obviously, the above-mentioned embodiments are only examples for clear description, and are not intended to limit the implementation manner. For those of ordinary skill in the art, changes or modifications in other different forms can also be made on the basis of the above description. There is no need and cannot be exhaustive of all implementations here. And the obvious changes or changes derived from this are still within the protection scope of the present invention.

The above are only some embodiments of the present invention. It should be pointed out that for those skilled in the art, without departing from the principles of the present invention, several improvements and modifications can also be made. It should be regarded as the protection scope of the present invention.

Claims (10)

1. Based on GaO_x-a method for fabricating a CMOS inverter of GaN, comprising:

sequentially growing a carbon-doped GaN buffer layer on a single crystal Si substrate or a GaN substrate, and growing a GaN channel layer on the surface of the carbon-doped or silicon GaN buffer layer;

photoetching the GaN channel layer and the carbon-doped GaN buffer layer in the direction vertical to the surface of the GaN channel layer to form an isolation region, and growing a high-thermal-conductivity substance in the isolation region;

manufacturing grooves on the surface of the GaN layer on two sides of the isolation region, and depositing GaO in the grooves_xAnd depositing GaO_xInjecting Mg ions into the rear side to form Mg-GaO_x；

Depositing a metal film and a dielectric layer on the surface of the device, annealing, obtaining a drain electrode in the barrier layer region, obtaining source electrodes in the two end regions of the GaN layer, and obtaining GaO on the two sides_xLayer and Mg-GaO_xAnd depositing a metal film and a dielectric layer on the surface of the layer, stripping and annealing to obtain the grid.

2. The method of claim 1, wherein the carbon-doped or silicon GaN buffer layer has a thickness of 3-6 μm and a concentration of 1-3 x 10¹⁸cm^-3。

3. The method as claimed in claim 1, wherein the GaN channel layer has a thickness of 150-250 nm.

4. The method according to claim 1, wherein the GaO is a gas_xLayer and Mg-GaO_xThe thickness of the layer is 40-60 nm.

5. The method according to claim 4, wherein the Mg-GaO_xThe doping concentration of Mg in the layer is 1-3 x 10¹⁸cm^-3。

6. The method according to claim 1, wherein the length of the high thermal conductivity material is 4 to 10 μm.

7. The method according to claim 1, wherein GaO is deposited_xCoating photoresist on the rear surface, and stripping the photoresist in the groove on one side to ensure that the GaO is formed_xExposing and implanting Mg ions.

8. The method according to claim 1, wherein Al is used₂O₃As a gate dielectric layer, Al₂O₃The thickness of (2) is 20-30 nm, silicon is used as a dopant, and the doping concentration is 2 multiplied by 10¹⁸cm^-3。

9. The method of claim 1, wherein the drain and source metal films are formed of Ti, Al, Ni or Au and annealed at 650 ℃ with N₂And annealing under the environment.

10. The method according to claim 1, wherein Ni or Au is used for the gate metal film.

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