CN114690866A - Temperature control method and data storage system - Google Patents

Abstract

The invention provides a temperature control method and a data storage system. The method includes: detecting whether a memory device is in a busy state; detecting whether a temperature of the memory device is above a first threshold; in response to the memory device being in the busy state and the temperature of the memory device being above a the first threshold, instructing the memory device to perform a cooling procedure; and in response to the memory device not being in the busy state and the temperature of the memory device being below a second threshold, instructing the memory device End the cooling procedure. Therefore, the temperature control capability for the memory device can be improved.

Description

Temperature control method and data storage system

technical field

The present invention relates to a temperature control technology, and in particular, to a temperature control method and a data storage system.

Background technique

Generally, memory devices or other types of electronic devices generally have built-in temperature control mechanisms. When the temperature inside the device is too high, this temperature control mechanism can be activated to cool down. However, most of the temperature control mechanisms used in electronic devices are preset according to temperature change curves evaluated by manufacturers. Taking a memory device as an example, when the temperature is higher than a default threshold, the memory device can generally use a default cooling method (eg, reducing data access performance) to cool down. However, in the actual cooperative operation of the memory device and the host system, when the memory device is in a busy state, even if the temperature of the memory device drops temporarily, once the cooling process is stopped, the temperature of the memory device may immediately rise again. Repeatedly starting and stopping the cooling process may not only easily lead to unstable access performance of the memory device, but also may cause the memory device to not cool enough to cause damage to the device.

SUMMARY OF THE INVENTION

The present invention provides a temperature control method and a data storage system, which can improve the temperature control capability of a memory device.

An embodiment of the present invention provides a temperature control method for controlling the temperature of a memory device, the temperature control method comprising: detecting whether the memory device is in a busy state; detecting whether the temperature of the memory device is higher than a first threshold; instructing the memory device to perform a cool-down procedure in response to the memory device being in the busy state and the temperature of the memory device being above the first threshold; and in response to the memory device Not being in the busy state and the temperature of the memory device is lower than a second threshold, instructing the memory device to end the cooling process.

Embodiments of the present invention further provide a data storage system, which includes a host system and a memory device. The memory device is connected to the host system. The host system is used to detect whether the memory device is in a busy state. The host system is further configured to detect whether the temperature of the memory device is higher than a first threshold. The host system is further configured to instruct the memory device to perform a cooling process in response to the memory device being in the busy state and the temperature of the memory device being higher than the first threshold. The host system is further configured to instruct the memory device to end the cooling process in response to the memory device not being in the busy state and the temperature of the memory device being lower than a second threshold.

Based on the above, according to the present invention, whether the memory device is in a busy state and whether the temperature of the memory device is higher than the first threshold value (or lower than the second threshold value) can be used as a double verification of whether to start (or stop) the cooling process. Thereby, the temperature control capability of the memory device can be effectively improved.

Description of drawings

1 is a schematic diagram of a data storage system according to an embodiment of the present invention;

2 is a schematic diagram illustrating the correspondence between a count value and an accumulated busy time of a memory device according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of the time correlation between the first count value and the second count value according to an embodiment of the present invention;

FIG. 4 is a flow chart of a temperature control method according to an embodiment of the present invention.

Detailed ways

Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and description to refer to the same or like parts.

FIG. 1 is a schematic diagram of a data storage system according to an embodiment of the present invention. Referring to FIG. 1 , the data storage system 10 includes a host system 11 and a memory device 12 . Host system 11 may store data to and read data from memory device 12 . For example, host system 11 is any system that can substantially cooperate with memory device 12 to store data, such as a computer system, digital camera, camcorder, communication device, audio player, video player, or tablet computer, etc., while the memory device 12 can be USB flash drives, memory cards, Solid State Drives (SSD), Secure Digital (SD) cards, Compact Flash (CF) cards or embedded storage devices. volatile memory device.

In this embodiment, the host system 11 includes a processor 111 and a connection interface 112 . The processor 111 may include a central processing unit (CPU), or other programmable general-purpose or special-purpose microprocessors, digital signal processors (Digital Signal Processors, DSPs), programmable controllers, application-specific integrated circuits (Application Specific Integrated Circuits, ASIC), Programmable Logic Device (Programmable Logic Device, PLD) or other similar devices or a combination of these devices. The processor 111 is used to control the whole or part of the operation of the host system 11 . In the following embodiments, the description of the operation of the host system 11 may be equivalent to the description of the operation of the processor 111 .

The connection interface 112 is connected to the processor 111 and used to transmit data to or receive data from the memory device 12 . In one embodiment, the host system 11 also includes any practically required hardware devices, such as a battery unit, a network interface card, a keyboard (or touchpad), a screen and/or speakers, and the like.

The memory device 12 includes a connection interface 121 , a memory controller 122 and a memory module 123 . The connection interface 121 is used to connect to the connection interface 112 of the host system 11 and communicate with the host system 11 via the connection interface 112 . In one embodiment, the connection interfaces 112 and 121 conform to the NVM Express (NVMe) interface specification. In another embodiment, the connection interfaces 112 and 121 may also conform to Serial Advanced Technology Attachment (SATA), Parallel Advanced Technology Attachment (PATA), high-speed peripheral component connection interface (Peripheral Component Various connection interface standards such as Interconnect Express, PCI Express) or Universal Serial Bus (Universal Serial Bus, USB).

The memory controller 122 is connected to the connection interface 121 and the memory module 123 . The memory controller 122 is used to execute a plurality of logic gates or control instructions implemented in hardware or firmware and perform operations such as writing, reading, and erasing data in the memory module 123 according to the instructions of the host system 11 . In addition, the memory controller 122 can also control the overall operation of the memory device 12 . In one embodiment, the memory controller 122 is also referred to as a flash memory controller.

The memory module 123 is used for storing data written by the host system 11 . For example, the memory module 123 may include a single level cell (SLC) NAND type flash memory module (ie, a flash memory module in which one memory cell can store 1 bit), a multi level cell (MLC) ) NAND type flash memory module (ie, one memory cell can store 2 bits of flash memory module), triple level cell (TLC) NAND type flash memory module (ie, one memory cell can store 3 1-bit flash memory module) and/or quad level cell (QLC) NAND type flash memory module (ie, one memory cell can store 4-bit flash memory module). In addition, the memory cells in the memory module 123 store data with changes in threshold voltages.

In one embodiment, the host system 11 can detect whether the memory device 12 is in a busy state. In the busy state, since the memory device 12 may need to continuously process instructions from the host system 11 and/or perform other data access operations (eg, write or read operations to the memory module 123 ), the temperature of the memory device 12 is relatively high. Easy to rise.

In one embodiment, the host system 11 may detect the temperature of the memory device 12 . For example, a temperature sensor may be configured inside the memory device 12 . This temperature sensor can be used to detect and record the temperature of the memory device 12 . The host system 11 may read the temperature data recorded by this temperature sensor from the memory device 12 . In addition, the host system 11 can detect whether the temperature of the memory device 12 is higher than a threshold value (also referred to as a first threshold value). For example, the first threshold value may be 65 degrees or other temperature value.

In one embodiment, it is assumed that the host system 11 determines that the memory device 12 is in a busy state and the temperature of the memory device 12 is higher than the first threshold. At this time, in response to the memory device 12 being in a busy state and the temperature of the memory device 12 is higher than the first threshold, the host system 11 may instruct the memory device 12 to perform a cooling procedure. This cooling procedure can be used to lower the temperature of the memory device 12 .

In one embodiment, the cooling procedure is dedicated to cooling the memory device 12 in a busy state. For example, in this cooling procedure, the cooling means that the memory controller 122 can use may include, but are not limited to, changing the working state of the memory device 12 (eg PS0 to PS1 ), reducing the clock frequency of the memory device 12 , reducing the Any technical means that can be used to cool down the memory device 12, such as operating voltage, reducing the access speed to the memory module 123 and/or reducing the power consumption of the decoding engine of the memory device 12, etc. can be used.

In one embodiment, after the cooling process is started, the host system 11 can continue to detect whether the memory device 12 is in a busy state and whether the temperature of the memory device 12 is lower than another threshold (also referred to as a second threshold). For example, the second threshold may be 55 degrees or other temperature values lower than the first threshold.

In one embodiment, it is assumed that the host system 11 determines that the memory device 12 is not in a busy state and the temperature of the memory device 12 is lower than the second threshold. At this time, in response to the memory device 12 not being in a busy state and the temperature of the memory device 12 being lower than the second threshold, the host system 11 may instruct the memory device 12 to stop the cooling process.

In one embodiment, host system 11 may read a count value from memory device 12 . This count value may reflect the cumulative length of time that the memory device 12 is in a busy state. The host system 11 can determine whether the memory device 12 is in a busy state according to the count value.

In one embodiment, the memory controller 122 can determine whether the memory device 12 is in a busy state according to the current operating state of the memory device 12 . The memory controller 122 may update this count value in response to the time the memory device 12 is busy increasing by a default length of time. For example, assuming that the default time length is 1 minute, the memory controller 122 may increment the count value by 1 when the time that the memory controller 122 continues to be busy (eg, performing a write or read operation) increases by 1 minute.

In one embodiment, after the count value is reset, the count value can reflect the accumulated time length that the memory device 12 is in a busy state. For example, assuming that the current count value is 5, it means that the cumulative length of time that the memory device 12 is in the busy state is 5 minutes after the count value is reset. Furthermore, if the memory controller 122 enters an idle state (eg, stops performing write or read operations), the memory controller 122 may suspend accumulating the accumulated time that the memory device 12 is in a busy state and may suspend updating the count value.

FIG. 2 is a schematic diagram illustrating the correspondence between the count value and the accumulated busy time of the memory device according to an embodiment of the present invention. Referring to FIG. 2 , in an embodiment, the corresponding relationship between the count value and the accumulated busy time of the memory device 12 (ie, the accumulated time length of the memory device 12 in a busy state) may be as shown in FIG. 2 . That is, as the accumulated busy time of memory device 12 continues to increase (eg, from T(0) to T(i+1)), the count value may also continue to be updated (eg, from V(1) to V( i+1)). For example, when the accumulated busy time of memory device 12 increases from 0 to T(0), the count value may also be updated from 0 to V(1); when the accumulated busy time of memory device 12 increases from T(0) To T(1), the count value may also be updated from V(1) to V(2); and so on, as the accumulated busy time of memory device 12 increases from T(i) to T(i+1 ), the count value can also be updated from V(i) to V(i+1).

In one embodiment, the host system 11 may read a count value (also referred to as a first count value) recorded at a certain time point (also referred to as a first time point) from the memory device 12 . Later, the host system 11 may read the count value (also referred to as the second count value) recorded at another point in time (also referred to as the second point in time) from the memory device 12 . The first point in time may be earlier than the second point in time. For example, the interval between the first time point and the second time point may be 3 minutes or some sampling time interval.

FIG. 3 is a schematic diagram showing the correlation between the first count value and the second count value in time according to an embodiment of the present invention. Referring to FIG. 3, it is assumed that the first time point is time point T(S1), the second time point is time point T(S2), and time point T(S1) is earlier than time point T(S2). A sampling time interval (eg, 3 minutes) may be spaced between the time point T(S1) and the time point T(S2). The count value V(S1) may represent a value obtained by reading or sampling the count value of FIG. 2 at the time point T(S1). The count value V(S2) may represent a value obtained by reading or sampling the count value of FIG. 2 at the time point T(S2).

In one embodiment, the host system 11 can determine whether the memory device 12 is in a busy state according to the numerical relationship between the first count value and the second count value. For example, the numerical relative relationship may refer to the numerical magnitude relationship between the first count value and the second count value. For example, the numerical relative relationship may include that the second count value is greater than the first count value, the second count value is equal to the first count value, and the second count value is smaller than the first count value.

In one embodiment, if the numerical relative relationship between the first count value and the second count value is that the second count value is greater than the first count value, it means that in the sampling time interval of the two count values, the The cumulative busy time continues to increase (resulting in a numerical change or increase in the count value). Therefore, the host system 11 can determine that the memory device 11 is in a busy state according to the fact that the second count value is greater than the first count value.

In one embodiment, if the numerical relative relationship between the first count value and the second count value is that the second count value is not greater than (or equal to) the first count value, it means that in the sampling time interval of the two count values , the accumulated busy time of the memory device 12 does not continue to increase (the count value for the two samples does not change or increase). Therefore, the host system 11 can determine that the memory device 11 is not in a busy state according to the fact that the second count value is not greater than (or equal to) the first count value.

In one embodiment, only when the host system 11 determines that the memory device 12 is no longer in the busy state (or leaves the busy state) and the temperature of the memory device 12 is lower than the second threshold, both conditions are satisfied, the host system 11 may The memory device 12 is instructed to stop the cooling procedure. In other words, in one embodiment, if the host system 11 determines that the memory device 12 is still in a busy state, the host system 11 does not instruct the memory device 12 to stop the cooling process regardless of whether the temperature of the memory device 12 is lower than the second threshold. Alternatively, in one embodiment, if the host system 11 determines that the memory device 12 is not in a busy state but the temperature of the memory device 12 is not lower than the second threshold, the host system 11 does not instruct the memory device 12 to stop the cooling process.

From another perspective, in one embodiment, once the cooling process is started when the memory device 12 is in a busy state, the host system 11 only determines that the memory device 12 has left the busy state and the temperature of the memory device 12 is low. When the two conditions of the second threshold are satisfied at the same time, the host system 11 may instruct the memory device 12 to stop the cooling process currently being executed. In this way, it is possible to reduce repeatedly starting and stopping the cooling process before the memory device 12 leaves the busy state, thereby improving the operation stability of the memory device 12 .

In one embodiment, after initiating the cooling process, the memory controller 122 may compare the temperature of the memory device 12 to at least one of at least two thresholds (eg, referred to as a third threshold and a fourth threshold) . The fourth threshold value is higher than the third threshold value. For example, the third threshold may be 67 degrees, and the fourth threshold may be 69 degrees. The memory controller 122 can adjust the cooling means used in the cooling procedure according to the comparison result until the cooling procedure is stopped. It should be noted that each of the aforementioned thresholds can be adjusted according to practical needs, which is not limited in the present invention.

For example, in the cooling procedure of an embodiment, if the temperature of the memory device 12 is not higher than the third threshold value, the memory controller 122 may perform an initial cooling method to initially cool the memory device 12 . If the temperature of the memory device 12 is between the third threshold value and the fourth threshold value, the memory controller 122 may execute an advanced cooling method to perform an advanced cooling process for the memory device 12 . In addition, if the temperature of the memory device 12 is higher than the fourth threshold value, the memory controller 122 can perform a strong cooling method to cool the memory device 12 strongly. Among them, the cooling efficiency of the intensive cooling means is higher than that of the advanced cooling means, and the cooling efficiency of the advanced cooling means is higher than that of the primary cooling means. In addition, the cooling means of each stage can adopt at least one of the above-mentioned various cooling means, so as to achieve the required cooling demand.

FIG. 4 is a flowchart of a temperature control method according to an embodiment of the present invention. Referring to FIG. 4 , in step S401 , it is detected whether the memory device is in a busy state. If the memory device is in a busy state, in step S402, it is detected whether the temperature of the memory device is higher than a first threshold value. In response to the memory device being in a busy state and the temperature of the memory device being higher than the first threshold value, in step S403 , instructing the memory device to perform a cooling procedure. However, if it is determined in step S401 that the memory device is not in a busy state, or it is determined in step S402 that the temperature of the memory device is not higher than the first threshold value, then step S401 may be returned without going to step S403.

After the cooling procedure is started, in step S404, it is detected whether the temperature of the memory device is lower than a second threshold value. If the temperature of the memory device is lower than the second threshold, in step S405, it is detected whether the memory device is in a busy state. In response to the memory device not being in a busy state and the temperature of the memory device being lower than the second threshold, in step S406, instructing the memory device to end the cooling process. However, it should be noted that, after the cooling process is started, if the memory device is not in a busy state and the temperature of the memory device is lower than the second threshold, the two conditions are not fully divided at the same time, then the process can go back to step S403 The memory device is instructed to maintain the cool down procedure until both the aforementioned conditions are met simultaneously.

However, each step in FIG. 4 has been described in detail as above, and will not be repeated here. It should be noted that each step in FIG. 4 can be implemented as a plurality of program codes or circuits, which is not limited in the present invention. In addition, the method of FIG. 4 can be used in conjunction with the above exemplary embodiments, and can also be used alone, which is not limited in the present invention.

To sum up, the embodiments of the present invention propose whether the host system is started (or stopped) according to whether the memory device is in a busy state and whether the temperature of the memory device is higher than the first threshold value (or lower than the second threshold value) Two-factor validation of cooling procedures. Thereby, it is possible to reduce repeatedly starting and stopping the cooling process before the memory device leaves the busy state, thereby improving the operation stability of the memory device and/or improving the temperature control capability of the memory device.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions described in the foregoing embodiments can still be modified, or some or all of the technical features thereof can be equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the embodiments of the present invention. scope.

Claims (10)

1. A temperature control method, characterized in that it is used for controlling the temperature of a memory device, the temperature control method comprising: detecting whether the memory device is in a busy state; detecting whether the temperature of the memory device is higher than a first threshold; In response to the memory device being in the busy state and the temperature of the memory device being above the first threshold, instructing the memory device to perform a cool down procedure; and In response to the memory device not being in the busy state and the temperature of the memory device being below a second threshold, instructing the memory device to end the cool down procedure. 2. The temperature control method of claim 1, wherein the step of detecting whether the memory device is in the busy state comprises: reading a count value from the memory device, wherein the count value reflects an accumulated length of time that the memory device has been in the busy state; and Whether the memory device is in the busy state is determined according to the count value. 3. The temperature control method of claim 2, wherein the count value comprises a first count value read from the memory device at a first time point and a count value read from the memory device at a second time point A second count value, the second time point is later than the first time point, and the step of determining whether the memory device is in the busy state according to the count value includes: Whether the memory device is in the busy state is determined according to the numerical relative relationship between the first count value and the second count value. 4. The temperature control method of claim 3, wherein the step of determining whether the memory device is in the busy state according to the numerical relative relationship between the first count value and the second count value comprises the step of determining whether the memory device is in the busy state. : If the second count value is greater than the first count value, determining that the memory device is in the busy state; and If the second count value is not greater than the first count value, it is determined that the memory device is not in the busy state. 5. The temperature control method according to claim 2, further comprising: The count value is updated by the memory device in response to the time the memory device is in the busy state increasing by a default length of time. 6. A data storage system, comprising: the host system; and a memory device connected to the host system, wherein the host system is used to detect whether the memory device is in a busy state, The host system is further configured to detect whether the temperature of the memory device is higher than a first threshold value, The host system is further configured to instruct the memory device to perform a cooling process in response to the memory device being in the busy state and the temperature of the memory device being higher than the first threshold, and The host system is further configured to instruct the memory device to end the cooling process in response to the memory device not being in the busy state and the temperature of the memory device being lower than a second threshold. 7. The data storage system of claim 6, wherein detecting whether the memory device is in the busy state comprises: reading a count value from the memory device, wherein the count value reflects an accumulated length of time that the memory device has been in the busy state; and Whether the memory device is in the busy state is determined according to the count value. 8. The data storage system of claim 7, wherein the count value comprises a first count value recorded by the memory device at a first time point and a second count value recorded by the memory device at a second time point , the second time point is later than the first time point, and the operation of determining whether the memory device is in the busy state according to the count value includes: Whether the memory device is in the busy state is determined according to the numerical relative relationship between the first count value and the second count value. 9. The data storage system of claim 8, wherein determining whether the memory device is in the busy state according to the numerical relative relationship between the first count value and the second count value comprises: : If the second count value is greater than the first count value, determining that the memory device is in the busy state; and If the second count value is not greater than the first count value, it is determined that the memory device is not in the busy state. 10. The data storage system of claim 7, wherein the memory device is configured to update the count value in response to a time that the memory device is in the busy state by increasing a default length of time.

Images