CN104898982A - Data transmission method, memory control circuit unit and memory storage device - Google Patents
Data transmission method, memory control circuit unit and memory storage device Download PDFInfo
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Abstract
本发明提供一种数据传输方法、存储器控制电路单元与存储器储存装置，本方法包括：初始地设定第一门槛值与第一累加值；并且每隔第一预先定义时间，通过将第一门槛值加上第一累加值以更新第一门槛值。此外，当所检测的存储器储存装置的温度大于或等于温度门槛值时，判断所接收的写入数据的大小是否大于或等于第一门槛值；并且若非，则将写入数据写入至可复写式非易失性存储器模块并且通过将第一门槛值减去写入数据的大小以更新第一门槛值。反之，则不将写入数据写入至可复写式非易失性存储器模块。基此，本方法可有效地避免存储器储存装置运作时所造成的系统过热现象。
The present invention provides a data transmission method, a memory control circuit unit and a memory storage device. The method includes: initially setting a first threshold value and a first accumulated value; and updating the first threshold value by adding the first accumulated value to the first threshold value at a first predetermined time interval. In addition, when the temperature of the detected memory storage device is greater than or equal to the temperature threshold value, it is determined whether the size of the received write data is greater than or equal to the first threshold value; and if not, the write data is written to a rewritable non-volatile memory module and the first threshold value is subtracted from the size of the write data to update the first threshold value. Otherwise, the write data is not written to the rewritable non-volatile memory module. Based on this, the method can effectively avoid system overheating caused by the operation of the memory storage device.
Description
Technical field
The invention relates to a kind of data transmission method, and relate to a kind of data transmission method, memorizer control circuit unit and memorizer memory devices especially.
Background technology
Digital camera, mobile phone and MP3 are very rapid in growth over the years, and the demand of consumer to Storage Media is also increased rapidly.Due to type nonvolatile (rewritable non-volatile memory) there is data non-volatile, power saving, the characteristic such as volume is little, mechanical structure, read or write speed are fast, therefore, type nonvolatile industry becomes a ring quite popular in electronic industry in recent years.Such as, the solid state hard disc (Solid-state drive) using flash memory as Storage Media widespread use as the hard disk of host computer, to promote the access usefulness of computer.
In addition, due to the memorizer memory devices when this type of with type nonvolatile be in working at high speed time, such as, perform the write of mass data with when reading, need consume a large amount of energy and produce a large amount of heats, therefore easily cause memorizer memory devices temperature too high, and make its access efficiency also reduce or cause it to damage.Base this, under the access usefulness taking into account memorizer memory devices and execution performance, the system overheat phenomenon caused when memorizer memory devices operates, namely maintenance system heat production and heat dissipation balancing become computer system task performance and constantly promote down, indispensable important topic.
Summary of the invention
The invention provides a kind of data transmission method, memorizer control circuit unit and memorizer memory devices, it can reduce power consumption effectively, and then makes the generation of the heat of memorizer memory devices and heat radiation reach steady state (SS).
One embodiment of the invention propose a kind of data transmission method of the memorizer memory devices for having reproducible nonvolatile memorizer module, and notebook data transmission method comprises: (a) initially sets the first threshold value and the first accumulated value; B () pre-defines the time, by the first threshold value being added the first accumulated value is to upgrade the first threshold value every one first; C () receives write data; D () detects the temperature of memorizer memory devices; E () judges whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value, if wherein the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, if perform step (f) and the temperature of memorizer memory devices when being more than or equal to temperature door threshold value, perform step (g); F write data are write to reproducible nonvolatile memorizer module by (); G () judges whether the size writing data is more than or equal to the first threshold value, if when wherein writing that the size of data is non-is more than or equal to the first threshold value, if perform step (h) and the size of write data when being more than or equal to the first threshold value, perform step (i); H () is for writing to reproducible nonvolatile memorizer module by write data and writing the size of data to upgrade the first threshold value by being deducted by the first threshold value; And (i) be not for write to reproducible nonvolatile memorizer module by write data and re-execute step (g) after the first Preset Time.
In one embodiment of this invention, the step of above-mentioned setting first accumulated value comprises: if the temperature of this memorizer memory devices is non-when being more than or equal to temperature door threshold value, set the first accumulated value with the first value; And if when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, set the first accumulated value with the second value.Particularly, the first value is greater than the second value.
In one embodiment of this invention, above-mentioned every the first pre-defined time, initially set maximum data value; By the first threshold value is added that the first accumulated value comprises with the step upgrading the first threshold value: the first threshold value to be added the first accumulated value is to obtain a updated value; If the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, upgrade the first threshold value with this updated value; If when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, judge whether this updated value is more than or equal to maximum data value; If this updated value is non-when being more than or equal to maximum data value, upgrade the first threshold value with this updated value; And if when this updated value is more than or equal to maximum data value, upgrade the first threshold value with maximum data value.
In one embodiment of this invention, when the temperature of memorizer memory devices is non-be more than or equal to temperature door threshold value time, the first threshold value is more than or equal to maximum data value.
In one embodiment of this invention, above-mentioned data transmission method also comprises: (j) initially sets the second threshold value and the second accumulated value; K () pre-defines the time, by the second threshold value being added the second accumulated value is to upgrade the second threshold value every one second; L () receives a reading command; M () detects the temperature of memorizer memory devices; N () judges whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value, if wherein temperature is non-when being more than or equal to temperature door threshold value, if perform step (o) and temperature when being more than or equal to temperature door threshold value, perform step (p); O () reads the reading data of this reading command corresponding from reproducible nonvolatile memorizer module; And whether the size of reading data that (p) judges for reading from reproducible nonvolatile memorizer module is more than or equal to the second threshold value, if when reading that the size of data is non-is more than or equal to the second threshold value, if perform step (q) and read the size of data when being more than or equal to the second threshold value, perform step (r); Wherein step (q) be from reproducible nonvolatile memorizer module read this reading command corresponding reading data and by the size that the second threshold value deducted reading data to upgrade the second threshold value; And step (r) reads data for not reading this from reproducible nonvolatile memorizer module and re-execute step (p) after the second Preset Time.
In one embodiment of this invention, the step of above-mentioned setting second accumulated value comprises: if the temperature of this memorizer memory devices is non-when being more than or equal to temperature door threshold value, set the second accumulated value with the 3rd value; And if when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, set the second accumulated value with the 4th value.Particularly, the 3rd value is greater than the 4th value.
One embodiment of the invention provides a kind of memorizer control circuit unit, and for the reproducible nonvolatile memorizer module of control store storage device, this memorizer control circuit unit comprises: in order to be coupled to the host interface of host computer system; In order to be coupled to the memory interface of reproducible nonvolatile memorizer module; And be coupled to the memory management circuitry of host interface and memory interface.Memory management circuitry initially can set the first threshold value and the first accumulated value, and every the pre-defined time, by the first threshold value being added the first accumulated value is to upgrade the first threshold value.Wherein memory management circuitry is also in order to receive write data; Wherein memory management circuitry is also in order to detect the temperature of memorizer memory devices and to judge whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value; If the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memory management circuitry can send one first instruction sequence (command sequence), this first instruction sequence writes running, so that write data are write to reproducible nonvolatile memorizer module in order to indicate execution one data; If when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memory management circuitry also judges running in order to perform the first data volume, to judge whether the size writing data is more than or equal to the first threshold value; If the size of write data is non-when being more than or equal to the first threshold value, memory management circuitry can send the first instruction sequence, this first instruction sequence performs data write running in order to instruction, write data are write to reproducible nonvolatile memorizer module and writes the size of data to upgrade the first threshold value by being deducted by the first threshold value; If the size of write data is non-when being more than or equal to the first threshold value, memory management circuitry can perform suspends write running, judges running write data are not write to reproducible nonvolatile memorizer module and re-execute above-mentioned first data volume after a Preset Time.
In one embodiment of this invention, above-mentioned in the running of setting first accumulated value, memory management circuitry can detect the temperature of memorizer memory devices, and judges whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value; If the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memory management circuitry can set the first accumulated value with the first value, and when if the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memory management circuitry can set the first accumulated value with the second value, and wherein the first value is greater than the second value.
In one embodiment of this invention, above-mentioned every the first pre-defined time, by the first threshold value being added the first accumulated value is to upgrade in the running of the first threshold value, memory management circuitry can initially set maximum data value and the first threshold value be added the first accumulated value is to obtain a updated value, if wherein the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memory management circuitry can upgrade the first threshold value with updated value, otherwise, if when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memory management circuitry can judge whether this updated value is more than or equal to maximum data value, if wherein this updated value is non-when being more than or equal to maximum data value, memory management circuitry can upgrade the first threshold value with this updated value, if and when this updated value is more than or equal to maximum data value, memory management circuitry can upgrade the first threshold value with maximum data value.
In one embodiment of this invention, when the temperature of memorizer memory devices is non-be more than or equal to temperature door threshold value time, the first threshold value is more than or equal to maximum data value.
In one embodiment of this invention, above-mentioned memory management circuitry also in order to initially to set the second threshold value and the second accumulated value, and pre-defines the time, by the second threshold value being added the second accumulated value is to upgrade the second threshold value every second.Wherein memory management circuitry is also in order to receive a reading command and detect the temperature of memorizer memory devices and judge whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value from host computer system; If the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memory management circuitry can send the second instruction sequence, this second instruction sequence performs digital independent running in order to instruction, to read the reading data of this reading command corresponding from reproducible nonvolatile memorizer module; If when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memory management circuitry also judges running, to judge whether the size of the reading data for reading from reproducible nonvolatile memorizer module is more than or equal to the second threshold value in order to perform the second data volume.If when reading that the size of data is non-is more than or equal to the second threshold value, memory management circuitry can send the second instruction sequence, this second instruction sequence performs digital independent running in order to instruction, with read from reproducible nonvolatile memorizer module this reading command corresponding reading data and by the size that the second threshold value deducted reading data to upgrade the second threshold value, if and read the size of data when being more than or equal to the second threshold value, memory management circuitry can perform to suspend and read running, read data not read this from reproducible nonvolatile memorizer module and after one second Preset Time, re-execute above-mentioned second data volume judgement running.
In one embodiment of this invention, above-mentioned in the running of setting second accumulated value, memory management circuitry can detect the temperature of memorizer memory devices, and judges whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value; If the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memory management circuitry can set the second accumulated value with the 3rd value, and when if the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memory management circuitry can set the second accumulated value with the 4th value, and wherein the 3rd value is greater than the 4th value.
One embodiment of the invention provide a kind of memorizer memory devices, and it comprises: in order to be coupled to the connector of host computer system, reproducible nonvolatile memorizer module and memorizer control circuit unit.Memorizer control circuit unit is coupled to connector and reproducible nonvolatile memorizer module, and initially set the first threshold value and the first accumulated value, and every the pre-defined time, by the first threshold value being added the first accumulated value is to upgrade the first threshold value.Memorizer control circuit unit is also in order to receive write data and detect the temperature of memorizer memory devices and judge whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value; If the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit can send the first instruction sequence, this first instruction sequence performs data write running, so that write data are write to reproducible nonvolatile memorizer module in order to instruction; If when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memorizer control circuit unit can perform the first data volume and judge running, to judge whether the size writing data is more than or equal to the first threshold value; If the size of write data is non-when being more than or equal to the first threshold value, memorizer control circuit unit can send the first instruction sequence, this first instruction sequence performs data write running in order to instruction, write data are write to reproducible nonvolatile memorizer module and writes the size of data to upgrade the first threshold value by being deducted by the first threshold value; And if the size of write data is non-when being more than or equal to the first threshold value, memorizer control circuit unit performs one and suspends write running, judges running write data are not write to reproducible nonvolatile memorizer module and re-execute above-mentioned first data volume after a Preset Time.
In one embodiment of this invention, above-mentioned in the running of setting first accumulated value, if the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit can set the first accumulated value with the first value, if and when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memorizer control circuit unit can set the first accumulated value with the second value.Wherein the first value is greater than the second value.
In one embodiment of this invention, above-mentioned every the first pre-defined time, by the first threshold value being added the first accumulated value is to upgrade in the running of the first threshold value, memorizer control circuit unit can initially set maximum data value and the first threshold value be added the first accumulated value is to obtain a updated value, if wherein the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit can upgrade the first threshold value with updated value; Otherwise if when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memorizer control circuit unit can judge whether this updated value is more than or equal to maximum data value; If wherein this updated value is non-when being more than or equal to maximum data value, memorizer control circuit unit can upgrade the first threshold value with this updated value, if and when this updated value is more than or equal to maximum data value, memorizer control circuit unit can upgrade the first threshold value with maximum data value.
In one embodiment of this invention, the temperature of above-mentioned memorizer memory devices is non-when being more than or equal to temperature door threshold value, and the first threshold value is more than or equal to maximum data value.
In one embodiment of this invention, above-mentioned memorizer control circuit unit also in order to initially to set the second threshold value and the second accumulated value, and pre-defines the time, by the second threshold value being added the second accumulated value is to upgrade the second threshold value every second.Memorizer control circuit unit is also in order to receive a reading command and detect the temperature of memorizer memory devices and judge whether the temperature of memorizer memory devices is more than or equal to temperature door threshold value from host computer system; If the temperature of memorizer control circuit unit is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit can send the second instruction sequence, this second instruction sequence performs digital independent running in order to instruction, to read the reading data of this reading command corresponding from reproducible nonvolatile memorizer module; if when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memorizer control circuit unit can perform the second data volume and judge running, to judge whether the size of the reading data for reading from reproducible nonvolatile memorizer module is more than or equal to the second threshold value, if when wherein reading that the size of data is non-is more than or equal to the second threshold value, memorizer control circuit unit can send the second instruction sequence, this second instruction sequence performs digital independent running in order to instruction, with read from reproducible nonvolatile memorizer module this reading command corresponding reading data and by the size that the second threshold value deducted reading data to upgrade the second threshold value, if and read the size of data when being more than or equal to the second threshold value, memorizer control circuit unit can perform to suspend and read running, read data not read this from reproducible nonvolatile memorizer module and after the second Preset Time, re-execute above-mentioned second data volume judgement running.
In one embodiment of this invention, above-mentioned in the running of setting second accumulated value, if the temperature of memorizer memory devices is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit can set the second accumulated value with the 3rd value, if and when the temperature of memorizer memory devices is more than or equal to temperature door threshold value, memorizer control circuit unit can set the second accumulated value with the 4th value.Wherein the 3rd value is greater than the 4th value.
Based on above-mentioned, the data transmission method of above-described embodiment, memorizer control circuit unit and memorizer memory devices are when the temperature of memorizer memory devices rises to threshold, can effectively control data access speed, and then reduce the consumption of power, avoid the situation that the memory storage system that causes because constantly accessing mass data is overheated thus.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Accompanying drawing explanation
Figure 1A is host computer system shown according to a first embodiment of the present invention and the schematic diagram of memorizer memory devices;
Figure 1B is the schematic diagram of computer, input/output device and memorizer memory devices shown by the embodiment of the present invention;
Fig. 1 C is the schematic diagram of host computer system shown by the embodiment of the present invention and memorizer memory devices;
Fig. 2 is the structural representation that the memorizer memory devices shown in Figure 1A is shown;
Fig. 3 is the structural representation of memorizer control circuit unit shown according to a first embodiment of the present invention;
Fig. 4 is write data transmission method process flow diagram shown according to a first embodiment of the present invention;
Fig. 5 is reading data transmission method process flow diagram shown according to a first embodiment of the present invention;
Fig. 6 is the process flow diagram of the step of renewal threshold value shown according to a first embodiment of the present invention;
Fig. 7 is the write data transmission method process flow diagram dynamically updating accumulated value shown according to a second embodiment of the present invention;
Fig. 8 is the reading data transmission method process flow diagram dynamically updating accumulated value shown according to a second embodiment of the present invention.
Description of reference numerals
1000: host computer system;
1100: computer;
1102: microprocessor;
1104: random access memory (RAM);
1106: input/output device;
1108: system bus;
1110: data transmission interface;
1202: mouse;
1204: keyboard;
1206: display;
1208: printer;
1212: walkman;
1214: storage card;
1216: solid state hard disc;
1310: digital camera;
1312:SD card;
1314:MMC card;
1316: memory stick;
1318:CF card;
1320: embedded storage device;
100: memorizer memory devices;
102: connecting interface unit;
104: memorizer control circuit unit;
106: reproducible nonvolatile memorizer module;
108 (0) ~ 108 (R): physics delete cells;
202: memory management circuitry;
204: host interface;
206: memory interface;
208: memory buffer;
210: electric power management circuit;
212: bug check and correcting circuit;
S401, S403, S405, S407, S409, S411, S413, S415, S417: the step of write data transmission method;
S501, S503, S505, S507, S509, S511, S513, S515, S517: the step reading data transmission method;
S601, S603, S605, S607, S609, S611, S613: the step upgrading threshold value;
S701, S703, S705, S707, S709, S711, S713, S715, S717, S719, S721, S723, S725: the step dynamically updating the write data transmission method of accumulated value;
S801, S803, S805, S807, S809, S811, S813, S815, S817, S819, S821, S823, S825: the step dynamically updating the reading data transmission method of accumulated value.
Embodiment
[the first embodiment]
Generally speaking, memorizer memory devices (also claiming, memory storage system) comprises reproducible nonvolatile memorizer module and controller (also claiming, control circuit).Usual memorizer memory devices uses together with host computer system, data can be write to memorizer memory devices or read data from memorizer memory devices to make host computer system.
Figure 1A is host computer system shown according to a first embodiment of the present invention and the schematic diagram of memorizer memory devices, Figure 1B is the schematic diagram of computer, input/output device and memorizer memory devices shown by the embodiment of the present invention, and Fig. 1 C is the schematic diagram of host computer system shown by the embodiment of the present invention and memorizer memory devices.
Please refer to Figure 1A, host computer system 1000 generally comprises computer 1100, and (input/output is called for short: I/O) device 1106 with I/O.RAM) 1104, system bus 1108 and data transmission interface 1110 computer 1100 comprises microprocessor 1102, (random access memory is called for short: random access memory.Input/output device 1106 comprises as the mouse 1202 of Figure 1B, keyboard 1204, display 1206 and printer 1208.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other devices.
In embodiments of the present invention, memorizer memory devices 100 is electrically connected by data transmission interface 1110 other elements with host computer system 1000.Data can be write to memorizer memory devices 100 by microprocessor 1102, random access memory 1104 with the running of input/output device 1106 or read data from memorizer memory devices 100.Such as, memorizer memory devices 100 can be that (Solid State Drive is called for short: SSD) the type nonvolatile storage device of 1216 grades for walkman 1212 as shown in Figure 1B, storage card 1214 or solid state hard disc.
Generally speaking, host computer system 1000 is to coordinate any system with storage data substantially with memorizer memory devices 100.Although in the present embodiment, host computer system 1000 explains with computer system, but host computer system 1000 can be the systems such as digital camera, video camera, communicator, audio player or video player in an alternative embodiment of the invention.Such as, when host computer system is the digital camera (video camera) 1310 in Fig. 1 C, type nonvolatile storage device is then its SD card 1312 used, mmc card 1314, memory stick (memory stick) 1316, CF card 1318 or embedded storage device 1320 (as shown in Figure 1 C).Embedded storage device 1320 comprises embedded multi-media card, and (Embedded MMC is called for short: eMMC).It is worth mentioning that, embedded multi-media card is directly electrically connected on the substrate of host computer system.
Fig. 2 is the structural representation that the memorizer memory devices shown in Figure 1A is shown.
Please refer to Fig. 2, memorizer memory devices 100 comprises connecting interface unit 102, memorizer control circuit unit 104 and reproducible nonvolatile memorizer module 106.
In the present embodiment, connecting interface unit 102 is compatible to the advanced annex of sequence (Serial Advanced Technology Attachment, abbreviation: SATA) standard.But, it must be appreciated, the present invention is not limited thereto, connecting interface unit 102 also can be meet advanced annex arranged side by side (Parallel Advanced Technology Attachment, be called for short: PATA) standard, Institute of Electrical and Electric Engineers (Institute of Electrical and Electronic Engineers, be called for short: IEEE) 1394 standards, high-speed peripheral component connecting interface (Peripheral Component Interconnect Express, be called for short: PCI Express) standard, universal serial bus (Universal Serial Bus, be called for short: USB) standard, a hypervelocity generation (Ultra High Speed-I, be called for short: UHS-I) interface standard, hypervelocity two generation (Ultra High Speed-II, be called for short: UHS-II) interface standard, secure digital (Secure Digital, be called for short: SD) interface standard, memory stick (Memory Stick, be called for short: MS) interface standard, Multi Media Card (Multi Media Card, be called for short: MMC) interface standard, compact flash (Compact Flash, be called for short: CF) interface standard, integrated driving electrical interface (Integrated Device Electronics, be called for short: IDE) standard or other standards be applicable to.In the present embodiment, connector can with memorizer control circuit unit package in a chip, or is laid in one and comprises outside the chip of memorizer control circuit unit.
Memorizer control circuit unit 104 in order to perform in the form of hardware or multiple logic lock of form of firmware implementation or steering order, and carries out the runnings such as the write of data, reading, deletion and merging according to the instruction of host computer system 1000 in reproducible nonvolatile memorizer module 106.
Reproducible nonvolatile memorizer module 106 is coupled to memorizer control circuit unit 104, and in order to store the data that host computer system 1000 writes.Reproducible nonvolatile memorizer module 106 has physics delete cells 108 (0) ~ 108 (R).Such as, physics delete cells 108 (0) ~ 108 (R) can belong to same memory crystal grain (die) or belong to different memory crystal grain.Each physics delete cells has a plurality of physical procedures unit respectively, and the physical procedures unit wherein belonging to same physics delete cells can be written independently and side by side be deleted.In addition, each physics delete cells can be made up of 64 physical procedures unit, 256 physical procedures unit or other any physical procedures unit.
In more detail, physics delete cells is the least unit of deleting.That is each physics delete cells contains the storage unit deleted in the lump of minimal amount.Physical procedures unit is the minimum unit of sequencing.That is, physical procedures unit is the minimum unit of write data.Each physical procedures unit generally includes data bit district and redundancy ratio special zone.Data bit district comprises multiple physics access address in order to store the data of user, and redundancy ratio special zone is in order to the data (such as, control information and error correcting code) of stocking system.In the present embodiment, 4 physics access addresses in the data bit district of each physical procedures unit, can be comprised, and the size of a physics access address is 512 bytes (byte).But in other embodiments, can comprise the more or less physics access address of number in data bit district, the present invention does not limit size and the number of physics access address yet.Such as, in one embodiment, physics delete cells is physical blocks, and physical procedures unit is physical page or physical sector, but the present invention is not as limit.
In the present embodiment, reproducible nonvolatile memorizer module 106 is multilayered memory unit (Multi Level Cell, be called for short: MLC) NAND type flash memory module (that is, the flash memory module of 2 Bit datas can be stored in a storage unit).But, the present invention is not limited thereto, reproducible nonvolatile memorizer module 106 may also be individual layer storage unit (Single Level Cell, be called for short: SLC) NAND type flash memory module (namely, the flash memory module of 1 Bit data can be stored) in a storage unit, plural layer storage unit (Trinary Level Cell, be called for short: TLC) NAND type flash memory module (namely, the flash memory module of 3 Bit datas can be stored) in a storage unit, other flash memory module or other there is the memory module of identical characteristics.
Fig. 3 is the structural representation of memorizer control circuit unit shown according to a first embodiment of the present invention.
Please refer to Fig. 3, memorizer control circuit unit 104 comprises memory management circuitry 202, host interface 204 and memory interface 206.
Memory management circuitry 202 is in order to the overall operation of control store control circuit unit 104.Specifically, memory management circuitry 202 has multiple steering order, and when memorizer memory devices 100 operates, this little steering order can be performed to carry out data write, read and the running such as deletion.
In the present embodiment, the steering order of memory management circuitry 202 carrys out implementation with form of firmware.Such as, memory management circuitry 202 has microprocessor unit (not shown) and ROM (read-only memory) (not shown), and this little steering order is burned onto in this ROM (read-only memory).When memorizer memory devices 100 operates, this little steering order can by microprocessor unit perform to carry out data write, read and the running such as deletion.
In an alternative embodiment of the invention, the steering order of memory management circuitry 202 also can procedure code form be stored in the specific region (such as, being exclusively used in the system region of storage system data in memory module) of reproducible nonvolatile memorizer module 106.In addition, memory management circuitry 202 has microprocessor unit (not shown), ROM (read-only memory) (not shown) and random access memory (not shown).Particularly, this ROM (read-only memory) has driving code, and when memorizer control circuit unit 104 is by intelligence, microprocessor unit first can perform this and drive code section the steering order be stored in reproducible nonvolatile memorizer module 106 to be loaded in the random access memory of memory management circuitry 202.Afterwards, microprocessor unit can operate this little steering order with carry out data write, read and the running such as deletion.
Host interface 204 is coupled to memory management circuitry 202 and in order to be coupled to connecting interface unit 102, to receive and to identify the instruction that host computer system 1000 transmits and data.That is, the instruction that transmits of host computer system 1000 and data can be sent to memory management circuitry 202 by host interface 204.In the present embodiment, host interface 204 is compatible to SATA standard.But, it must be appreciated and the present invention is not limited thereto, host interface 204 also can be compatible to PATA standard, IEEE1394 standard, PCI Express standard, USB standard, UHS-I interface standard, UHS-II interface standard, SD standard, MS standard, MMC standard, CF standard, IDE standard or other data transmission standards be applicable to.
Memory interface 206 is coupled to memory management circuitry 202 and in order to access reproducible nonvolatile memorizer module 106.That is, the data for writing to reproducible nonvolatile memorizer module 106 can be converted to the receptible form of reproducible nonvolatile memorizer module 106 via memory interface 206.
In an embodiment of the present invention, memorizer control circuit unit 104 also comprises memory buffer 208, electric power management circuit 210 and bug check and correcting circuit 212.
Memory buffer 208 is coupled to memory management circuitry 202 and comes from the data and instruction of host computer system 1000 in order to temporary or come from the data of reproducible nonvolatile memorizer module 106.
Electric power management circuit 210 is coupled to memory management circuitry 202 and in order to the power supply of control store storage device 100.
Bug check and correcting circuit 212 are coupled to memory management circuitry 202 and in order to execution error inspection and correction program to guarantee the correctness of data.Specifically, when memory management circuitry 202 receives write instruction from host computer system 1000, bug check and correcting circuit 212 can be that the corresponding data that this writes instruction produce corresponding bug check and correcting code (Error Checking and Correcting Code, be called for short: ECC Code), and the data of this write instruction corresponding can write in reproducible nonvolatile memorizer module 106 with corresponding bug check and correcting code by memory management circuitry 202.Afterwards, can read bug check corresponding to these data and correcting code when memory management circuitry 202 reads data from reproducible nonvolatile memorizer module 106, and bug check and correcting circuit 212 can according to this bug check and correcting code to read data execution error inspection and correction programs simultaneously.
Referring again to Fig. 2, memorizer control circuit unit 104 (or memory management circuitry 202) initially can set the first threshold value and the first accumulated value, and every the pre-defined time (such as, 1 millisecond), the first threshold value is added that the first accumulated value is to upgrade the first threshold value.Particularly, when receiving the data for write reproducible nonvolatile memorizer module 106 that host computer system 1000 transmits, memorizer control circuit unit 104 (or memory management circuitry 202) can detect the temperature of memorizer memory devices 100 and judge whether the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value.If the temperature of memorizer memory devices 100 is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can send an instruction sequence (command sequence), write data are write to reproducible nonvolatile memorizer module in order to instruction by this instruction sequence, particularly, this instruction sequence can be one or a plurality of instruction.Otherwise, if when the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can perform the first data volume and judge running, to judge whether the size writing data is more than or equal to the first set threshold value.If the size of write data is non-when being more than or equal to the first threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can send an instruction sequence, this instruction sequence performs data write running in order to instruction, write data are write to reproducible nonvolatile memorizer module 106 and writes the size of data to upgrade the first threshold value by being deducted by the first threshold value.Otherwise, when the size writing data is more than or equal to the first threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can perform and suspend write running, and write data are not write to reproducible nonvolatile memorizer module 106 and (such as, 1 millisecond) re-executes the above-mentioned running judging to write the size of data and whether be more than or equal to the first threshold value after one first Preset Time.
Specifically, by above-mentioned data transmission method, reduce power consumption by limiting message transmission rate.Such as, if for message transmission rate being limited in 100MB/s (being equivalent to the sector data that every 1 millisecond (ms) transmits 200 512 bytes (Byte)), and hypothesis memorizer control circuit unit 104 (or memory management circuitry 202) initially set the first threshold value be 300 and first accumulated value be 200, and by the first threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can add that the first accumulated value is to upgrade the first threshold value every 1 millisecond.When the data for write reproducible nonvolatile memorizer module 106 are 200 sector datas, memorizer control circuit unit 104 (or memory management circuitry 202) can judge to write that the size (200 sector datas) of data is non-is more than or equal to set the first threshold value (300), and 200 sector datas are write to reproducible nonvolatile memorizer module 106 and by the first threshold value is deducted write data size to upgrade the first threshold value.Now, the first threshold value after renewal is 100.If because the first threshold value adds the first accumulated value after 1 millisecond, then the first threshold value can be turned into 300, when the write data that simultaneous memory control circuit unit 104 (or memory management circuitry 202) receives are 500 sector datas, then memorizer control circuit unit 104 (or memory management circuitry 202) judges that the size (500 sector datas) of write data is more than or equal to current the first threshold value (300), therefore can perform and suspend write running, and write data are not write to reproducible nonvolatile memorizer module 106 and after 1 millisecond, rejudge the size writing data whether be more than or equal to the first threshold value.Because the first threshold value is added that the first accumulated value is to upgrade the first threshold value every 1 millisecond by memorizer control circuit unit 104 (or memory management circuitry 202), therefore when whether the size rejudging write data is more than or equal to the first threshold value, the first threshold value upgraded becomes 500, now memorizer control circuit unit 104 (or memory management circuitry 202) can judge to write that the size (500 sector datas) of data is non-is more than or equal to current the first threshold value (500), and write data are write to reproducible nonvolatile memorizer module 106 and upgrades the first threshold value according to above-mentioned steps, thus, control data writing rate can be reached and maintain 100MB/s.
It is worth mentioning that, the power consumed needed for the data write running of reproducible nonvolatile memorizer module 106 and digital independent operate is different, particularly, when performing digital independent running, comparatively data write running is many in the action of its input/output, therefore relative under digital independent running, the speed that the temperature of memorizer memory devices 100 rises.Therefore, in one embodiment, in order to the generation and heat radiation making heat reaches steady state (SS), by respectively to the data write running threshold value different from digital independent operating settings and accumulated value, the speed that limited number is reportedly defeated is carried out.
Memorizer control circuit unit 104 (or memory management circuitry 202) can be initially digital independent operating settings second threshold value and the second accumulated value, and every one second pre-defined time (such as, 1 millisecond), the second threshold value is added that the second accumulated value is to upgrade the second threshold value.When memorizer control circuit unit 104 (or memory management circuitry 202) receives a reading command from host computer system, during for reading the data in reproducible nonvolatile memorizer module 106, memorizer control circuit unit 104 (or memory management circuitry 202) can detect the temperature of memorizer memory devices 100 and judge whether the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value.If the temperature of memorizer memory devices 100 is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can send an instruction sequence (command sequence), and this instruction sequence reads the reading data of this reading command corresponding from reproducible nonvolatile memorizer module in order to instruction.Otherwise, if when the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can perform the second data volume and judge running, to judge whether the size of the reading data for reading from reproducible nonvolatile memorizer module 106 is more than or equal to the second threshold value.If when reading that the size of data is non-is more than or equal to the second threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can send instruction sequence, this instruction sequence performs digital independent running in order to instruction, with read from reproducible nonvolatile memorizer module 106 this reading command corresponding reading data and by size of the second threshold value being deducted these reading data to upgrade the second threshold value.Otherwise, if when the size reading data is more than or equal to the second threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can perform to suspend and read running, and from reproducible nonvolatile memorizer module 106, do not read this read data and (such as, 1 millisecond) re-executes and above-mentionedly judges to read the second the data volume whether size of data be more than or equal to the second threshold value and judge running after the second Preset Time.
Specifically, due to the power of consumption required when digital independent operates, comparatively data write running is large, therefore above-mentioned second threshold value and the second accumulated value can be set as the numerical value being less than the first threshold value and the first accumulated value respectively.Such as, when the first threshold value is set as 300, the second threshold value can be set as 200, and when the first accumulated value is set as 200, the second accumulated value can be set as 100.
It is worth mentioning that, due to when memorizer memory devices 100 operates, such as, constantly write is with when reading a large amount of data, and it needs consume a large amount of energy and produce a large amount of heat energy, therefore easily causes memorizer memory devices 100 overheated.In the present embodiment, memorizer control circuit unit 104 (or memory management circuitry 202) is also in order to detect the temperature of memorizer memory devices 100 and to judge whether the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value.When memorizer control circuit unit 104 (or memory management circuitry 202) judges that the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, that is, when memorizer memory devices 100 is overheated, just can perform above-mentioned first data volume judge running or the second data volume judge running, and according to this first data volume judge running perform data write running or suspend write running and according to the second data volume judge running perform digital independent running or suspend reading operate.
Particularly, because memorizer control circuit unit 104 (or memory management circuitry 202) can pre-define the time (such as every one, 1 millisecond) the first threshold value is added that the first accumulated value is to upgrade the first threshold value, therefore in order to when the temperature of memorizer memory devices 100 exceedes temperature door threshold value, controlling this first threshold value maintains in certain scope, memorizer control circuit unit 104 (or memory management circuitry 202) can calculate a maximum data value before renewal first threshold value, and after the first threshold value is added that the first accumulated value obtains the updated value of the first threshold value, detect the temperature of memorizer memory devices 100 and judge whether the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, if the temperature of memorizer memory devices 100 is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can upgrade the first threshold value with updated value, particularly, if when the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can judge whether this updated value is more than or equal to calculated maximum data value.If updated value is non-be more than or equal to maximum data value, then memorizer control circuit unit 104 (or memory management circuitry 202) can upgrade the first threshold value with updated value, otherwise, then upgrade the first threshold value with maximum data value.At this, maximum data value is a systemic presupposition value, so, the present invention is not limited thereto, and maximum data value also can adjust according to the execution performance of reproducible nonvolatile memorizer module 106 and set.
Fig. 4 is the process flow diagram of write data transmission method shown according to a first embodiment of the present invention.
Please refer to Fig. 4, in step S401, memorizer control circuit unit 104 (or memory management circuitry 202) initially can set the first threshold value and the first accumulated value.And, in step S403, memorizer control circuit unit 104 (or memory management circuitry 202) can pre-define the time (such as, 1 millisecond), by the first threshold value being added the first accumulated value is to upgrade the first threshold value every one first.
In step S405, the data for write reproducible nonvolatile memorizer module 106 that memorizer control circuit unit 104 (or memory management circuitry 202) Receiving Host system 1000 transmits, and memorizer control circuit unit 104 (or memory management circuitry 202) can detect the temperature of memorizer memory devices 100 in step S 407.
In step S409, memorizer control circuit unit 104 (or memory management circuitry 202) can judge whether the temperature of detected memorizer memory devices 100 is more than or equal to temperature door threshold value.If the temperature of memorizer memory devices 100 is non-be more than or equal to temperature door threshold value, then in step S411, memorizer control circuit unit 104 (or memory management circuitry 202) can perform general data write running, so that received write data are write to reproducible nonvolatile memorizer module 106.Otherwise when the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, in step S413, memorizer control circuit unit 104 (or memory management circuitry 202) can perform data volume and judge running.
In step S413, memorizer control circuit unit 104 (or memory management circuitry 202) can judge whether the size writing data is more than or equal to the first threshold value.If the size of write data is non-when being more than or equal to the first threshold value, then in step S415, memorizer control circuit unit 104 (or memory management circuitry 202) can perform data write running, write data are write to reproducible nonvolatile memorizer module 106 and writes the size of data to upgrade the first threshold value by being deducted by the first threshold value.Otherwise, when the size writing data is more than or equal to the first threshold value, then in step S417, memorizer control circuit unit 104 (or memory management circuitry 202) can perform and suspend write running, and write data are not write to reproducible nonvolatile memorizer module 106 and (such as, 1 millisecond) re-executes step S413 after the first Preset Time.
Particularly, due in step S403, memorizer control circuit unit 104 (or memory management circuitry 202) can pre-define the time (such as every one first, 1 millisecond), by the first threshold value is added the first accumulated value to upgrade the first threshold value, therefore the first threshold value can constantly change, that is, time-out write running performed in above-mentioned steps S417, meeting until the first threshold value be updated to be equivalent to write data size (that is, the size of write data is non-is more than or equal to the first threshold value) time, step S415 just can be performed, control data writing speed is to reduce power consumption thus.
Fig. 5 is the process flow diagram of reading data transmission method shown according to a first embodiment of the present invention.
Please refer to Fig. 5, first, in step S501, memorizer control circuit unit 104 (or memory management circuitry 202) initially can set the second threshold value and the second accumulated value.And, in step S503, memorizer control circuit unit 104 (or memory management circuitry 202) can pre-define the time (such as, 1 millisecond), by the second threshold value being added the second accumulated value is to upgrade the second threshold value every one second.
In step S505, when memorizer control circuit unit 104 (or memory management circuitry 202) receives a reading command from host computer system 1000, during for reading data from reproducible nonvolatile memorizer module 106, then in step s 507, the temperature of memorizer memory devices 100 can be detected.
In step S509, memorizer control circuit unit 104 (or memory management circuitry 202) can judge whether the temperature of detected memorizer memory devices 100 is more than or equal to temperature door threshold value.If the temperature of memorizer memory devices 100 is non-be more than or equal to temperature door threshold value, then in step S511, memorizer control circuit unit 104 (or memory management circuitry 202) can perform general digital independent running, to read the reading data of this reading command corresponding from reproducible nonvolatile memorizer module 106.Otherwise when the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, in step S513, memorizer control circuit unit 104 (or memory management circuitry 202) can perform data volume and judge running.
In step S513, whether the size of the reading data that memorizer control circuit unit 104 (or memory management circuitry 202) can judge for reading from reproducible nonvolatile memorizer module 106 is more than or equal to the second threshold value.If when reading that the size of data is non-is more than or equal to the second threshold value, then in step S515, memorizer control circuit unit 104 (or memory management circuitry 202) can perform digital independent running, with from reproducible nonvolatile memorizer module 106 read institute wish reading data and by the second threshold value is deducted reading data size to upgrade the second threshold value.Otherwise, when the size writing data is more than or equal to the second threshold value, then in step S517, memorizer control circuit unit 104 (or memory management circuitry 202) can perform to suspend and read running, and from reproducible nonvolatile memorizer module 106 read institute for reading data and after the second Preset Time (such as, 1 millisecond) re-execute step S513.
Particularly, due in step S503, memorizer control circuit unit 104 (or memory management circuitry 202) can pre-define the time (such as every one second, 1 millisecond), by the second threshold value is added the second accumulated value to upgrade the second threshold value, therefore the second threshold value can constantly change.That is, time-out performed in above-mentioned steps S517 reads running, meeting until the second threshold value be updated to be equivalent to read data size (that is, the size of reading data is non-is more than or equal to the second threshold value) time, step S515 just can be performed, and can control data reading speed thus to reduce power consumption.
Fig. 6 is the process flow diagram of the step of renewal threshold value shown according to a first embodiment of the present invention.
Please refer to Fig. 6, in step s 601, memorizer control circuit unit 104 (or memory management circuitry 202) initially can set a maximum data value, this maximum data value is a systemic presupposition value, so, the present invention is not limited thereto, maximum data value also can adjust according to the execution performance of reproducible nonvolatile memorizer module 106 and set.
Because the first threshold value constantly can be added that the first accumulated value is to upgrade the first threshold value every the pre-defined time by memorizer control circuit unit 104 (or memory management circuitry 202) in the present embodiment, therefore, in step S603, memorizer control circuit unit 104 (or memory management circuitry 202) first can obtain the updated value that this first threshold value adds the first accumulated value.
Then, in step s 605, memorizer control circuit unit 104 (or memory management circuitry 202) can detect the temperature of memorizer memory devices 100, and in step S607, judges whether the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value.Particularly, if when the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) just can perform the step S609 ~ S613 limiting the first threshold value.In step S609, memorizer control circuit unit 104 (or memory management circuitry 202) can judge whether this updated value is more than or equal to maximum data value.If updated value is more than or equal to maximum data value, then in step s 611, memorizer control circuit unit 104 (or memory management circuitry 202) can upgrade the first threshold value with maximum data value, otherwise, then in step S613, memorizer control circuit unit 104 (or memory management circuitry 202) can upgrade the first threshold value with updated value.Under the state rising to temperature door threshold value in the temperature of memorizer memory devices 100 thus, memorizer control circuit unit 104 (or memory management circuitry 202) can control this first threshold value and maintain in certain scope.It is worth mentioning that, if the temperature of memorizer memory devices 100 is non-when being more than or equal to temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can upgrade the first threshold value (step S615) with updated value, the first threshold value can't be limited with maximum data value, that is, when the temperature of memorizer memory devices 100 is non-be more than or equal to temperature door threshold value time, the first threshold value can be more than or equal to maximum data value.
[the second embodiment]
The memorizer memory devices of second embodiment of the invention and host computer system are the memorizer memory devices and the host computer system that are same as the first embodiment in essence, and wherein difference is that the first accumulated value of the second embodiment can be adjusted according to the change of the temperature of memorizer memory devices.Below the difference section of the second embodiment and the first embodiment is described the apparatus structure of use Figure 1A, Fig. 2 and Fig. 3.
In the present embodiment, in the running of setting first accumulated value, memorizer control circuit unit 104 (or memory management circuitry 202) can detect the temperature of memorizer memory devices 100, and judges whether the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value.If when the temperature of memorizer memory devices 100 is non-be more than or equal to temperature door threshold value time, memorizer control circuit unit 104 (or memory management circuitry 202) can set the first accumulated value with the first value.Otherwise when the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, then set the first accumulated value with the second value, wherein the first value is more than or equal to the second value.Specifically, when temperature due to memorizer memory devices 100 does not reach temperature door threshold value, memorizer control circuit unit 104 (or memory management circuitry 202) can not perform described in the first embodiment in order to limit the data transmission method of message transmission rate, therefore the first larger value can be used to set the first accumulated value, access usefulness during to promote message transmission rate and to promote the running of memorizer memory devices 100.
Fig. 7 is the write data transmission method process flow diagram dynamically updating accumulated value shown according to a second embodiment of the present invention.
Please refer to Fig. 7, in step s 701, memorizer control circuit unit 104 (or memory management circuitry 202) initially can set the first threshold value, the first value and the second value.Wherein the first value can be set as the numerical value being greater than the second value.
In step S703, memorizer control circuit unit 104 (or memory management circuitry 202) can detect the temperature of memorizer memory devices 100, and in step S705, judge whether the temperature of the memorizer memory devices 100 detected is more than or equal to temperature door threshold value.If the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, then in step S707, memorizer control circuit unit 104 (or memory management circuitry 202) can with the less second value setting first accumulated value, otherwise, when the temperature of memorizer memory devices 100 is non-be more than or equal to temperature door threshold value time, then in step S709, memorizer control circuit unit 104 (or memory management circuitry 202) can with the larger first value setting first accumulated value.
Then, step S711 to step S725 be the step S403 of the write data transmission method be same as in Fig. 4 of the first embodiment to step S417, no longer repeat at this.Particularly, when getting back to step S703 after execution of step S719 and step S723, to perform step S703 to the S709 of dynamic setting the first accumulated value.
Fig. 8 is the reading data transmission method process flow diagram dynamically updating accumulated value shown according to a second embodiment of the present invention.
Please refer to Fig. 8, in step S801, memorizer control circuit unit 104 (or memory management circuitry 202) initially can set the second threshold value, the 3rd value and the 4th value.Wherein the 3rd value can be set as the numerical value being greater than the 4th value.
In step S803, memorizer control circuit unit 104 (or memory management circuitry 202) can detect the temperature of memorizer memory devices 100, and in step S805, judge whether the temperature of the memorizer memory devices 100 detected is more than or equal to temperature door threshold value.If the temperature of memorizer memory devices 100 is more than or equal to temperature door threshold value, then in step S807, memorizer control circuit unit 104 (or memory management circuitry 202) can with the less the 4th value setting second accumulated value, otherwise, when the temperature of memorizer memory devices 100 is non-be more than or equal to temperature door threshold value time, then in step S809, memorizer control circuit unit 104 (or memory management circuitry 202) can with the larger the 3rd value setting second accumulated value.
Then, step S811 to step S825 be the step S503 of the reading data transmission method be same as in Fig. 5 of the first embodiment to step S517, no longer repeat at this.Particularly, when getting back to step S803 after execution of step S819 and step S823, to perform the step S803 of adjustment second accumulated value to step S809.
In sum, the data transmission method of the embodiment of the present invention, memorizer control circuit unit and memorizer memory devices can when the temperature of memorizer memory devices reach threshold value, restricting data transfer rate is carried out by control gate threshold value, reduce power consumption thus, and then when avoiding memorizer memory devices to operate fast and the system overheat phenomenon that causes of a large amount of access data.In addition, also can according to the setting accumulated value of the temperature dynamic of memorizer memory devices at the data transmission method of the present embodiment, memorizer control circuit unit and memorizer memory devices, under the generation of heat taking into account memorizer memory devices and heat dissipation balancing state, message transmission rate and data access usefulness can be promoted thus.
Last it is noted that above embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to previous embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
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