CN112951716A - Method for improving flatness and roughness through mixed corrosion - Google Patents
Method for improving flatness and roughness through mixed corrosion Download PDFInfo
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- CN112951716A CN112951716A CN202110302019.1A CN202110302019A CN112951716A CN 112951716 A CN112951716 A CN 112951716A CN 202110302019 A CN202110302019 A CN 202110302019A CN 112951716 A CN112951716 A CN 112951716A
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- 230000007797 corrosion Effects 0.000 title claims abstract description 71
- 238000005260 corrosion Methods 0.000 title claims abstract description 71
- 238000000034 method Methods 0.000 title claims abstract description 37
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 claims abstract description 44
- 239000003513 alkali Substances 0.000 claims abstract description 42
- 239000002253 acid Substances 0.000 claims abstract description 41
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 32
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 32
- 239000010703 silicon Substances 0.000 claims abstract description 32
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 30
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims abstract description 15
- 229910017604 nitric acid Inorganic materials 0.000 claims abstract description 15
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 6
- 239000002585 base Substances 0.000 claims abstract description 3
- 238000005530 etching Methods 0.000 claims description 42
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 15
- 238000000227 grinding Methods 0.000 claims description 9
- 229910001018 Cast iron Inorganic materials 0.000 claims description 3
- 238000000498 ball milling Methods 0.000 claims description 3
- 238000005498 polishing Methods 0.000 abstract description 11
- 235000012431 wafers Nutrition 0.000 description 26
- 239000004065 semiconductor Substances 0.000 description 11
- 239000000758 substrate Substances 0.000 description 10
- 229960000583 acetic acid Drugs 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 238000005457 optimization Methods 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 230000003746 surface roughness Effects 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 3
- 239000003814 drug Substances 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000012362 glacial acetic acid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000004576 sand Substances 0.000 description 1
- 238000004506 ultrasonic cleaning Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention provides a method for improving flatness and roughness by mixed corrosion, which is used for corroding a silicon wafer with the ground thickness of 770 mu m and comprises the following steps: A. alkali corrosion: corroding 3-6 microns by using a strong base solution with the mass fraction of 45-55% at 75-85 ℃; B. acid corrosion: and D, continuously corroding the silicon wafer treated in the step A at the temperature of 25-35 ℃ by using a mixed acid solution of nitric acid, acetic acid and hydrofluoric acid, wherein the corrosion thickness is 24-27 mu m, the concentration of the nitric acid solution is 33-35%, the concentration of the acetic acid solution is 21-23%, the concentration of the hydrofluoric acid solution is 9-11%, and the volume ratio of the nitric acid solution, the acetic acid solution, the hydrofluoric acid solution and water is 2-3: 1-2: 0.5-1.5: 2-3. The invention essentially improves the level of polishing SFQR, improves the SFQR and the roughness of the back surface, can simultaneously meet the requirements of the roughness of the back surface being less than 190nm and the flatness being less than 0.12 mu m, and has high practicability.
Description
Technical Field
The invention relates to the technical field of silicon chip corrosion, in particular to a method for improving flatness and roughness through mixed corrosion.
Background
With the increasing competition of semiconductor chips, the requirements of customers for substrate polishing sheets become more and more strict, and the flatness SFQR and the backside roughness are two very important indexes: the excessively high roughness of the substrate polished wafer can affect the WER abnormality, the electrical breakdown and the like in an IC factory, and particularly has a greater influence on a surface effect type MOS large-scale integrated circuit, the conventional backside roughness Sa in the industry is generally more than 250nm at present, and the microstructure is shown in FIG. 1. Currently, some cash IC factories have required the roughness to be controlled below 190nm, and there is no particularly effective method for improving the backside roughness, which is mainly optimized by conventional cleaning technology and is difficult to be substantially improved. The requirements of IC factories and epitaxial factories on flatness SFQR become more and more strict, the SFQR is one of the core parameters of the substrate polishing sheet, and a considerable part of IC factories currently require the SFQR to be controlled below 0.12 um; considering that the aspects of semiconductor processing equipment, raw materials, processes and the like in China are relatively lagged behind, according to the graph of FIG. 2, the conventional SFQR test has more failure areas, so that the SFQR is a key ring for restricting substrate silicon wafer manufacturers to seek technical breakthrough.
At present, the conventional corrosion process in the industry is a pure acid corrosion process, the acid corrosion removal amount is about 30um, and the SFQR mean value of a product of the pure acid corrosion process after polishing is generally more than 0.12 um. The improvement of SFQR mainly focuses on polishing engineering, such as flatness limitation of a ceramic disc, optimization of polishing cloth, and optimization of processes of pressure, rotating speed, temperature and flow rate of polishing surface plate, but has little effect.
Chinese patent No. CN109545663A discloses a process for processing a silicon corrosion wafer with high flatness, which comprises selecting flat-plate aluminum oxide as grinding sand, performing ultrasonic cleaning after grinding both sides of the silicon wafer, and performing corrosion by mixed corrosion after cleaning. When the etching operation is carried out, firstly, the etching is carried out by using an acidic etching solution prepared from nitric acid, hydrofluoric acid and glacial acetic acid, the etching amount is 25.0 +/-2.0 mu m, and then, the etching is carried out by using an alkaline etching solution, and the etching amount is 5.0 +/-1.0 mu m.
The method of firstly carrying out acid corrosion and then carrying out alkali corrosion in the patent has the following disadvantages: (1) the occurrence of stains is easily caused, and in the conventional case, after the alkali corrosion, the liquid medicine residue and the poor stains are easily generated, and the acid corrosion can corrode the stains. If the acid corrosion is carried out firstly and then the alkali corrosion is carried out, the bad stains and the residual liquid medicine are easily caused; (2) the surface roughness of the silicon wafer is not favorable, the surface roughness after corrosion is not favorable due to alkali corrosion, and the surface roughness of the silicon wafer is easy to deteriorate due to the alkali corrosion; (3) the metal impurity removing effect is not good, the metal removing effect of acid corrosion is better than that of alkali corrosion, and if acid is firstly carried out and then alkali is carried out, the metal removing effect capability is also poor, so that the metal impurity residue on the silicon wafer is easily caused.
In addition, the patent only simply finds improvement on the corrosion pits through acid corrosion and then alkali corrosion, only remains the improvement level of a certain bad item of the corrosion process, and has no any mention and data display on information in the aspects of flatness and the like.
Disclosure of Invention
The invention is carried out to solve the technical problems, finds the contradictory relation between roughness and flatness, researches the correlation between flatness SFQR and back roughness and the removal amount of mixed corrosion by adjusting different proportions of mixed corrosion processes, effectively finds the optimal process conditions, can simultaneously meet the requirements of back roughness (<190nm) and flatness (<0.12um), has high practicability and provides a brand new direction for improving the flatness SFQR and the roughness of the substrate polished slice in the semiconductor industry.
The improvement idea of the invention is as follows: and while optimizing the polishing process, the removal amount of acid corrosion is reduced and the removal amount of alkali corrosion is increased by adjustment, so that the SFQR is improved from the other direction while the level of polished SFQR is essentially improved.
The key points of the patent are as follows: the optimal alkali and acid removal ratio is found in the process of increasing the alkali corrosion removal amount. Experiments show that the alkali corrosion improves the SFQR capability (figure 3) and is disadvantageous to the back roughness (figure 4), and the key point of the patent is how to find the defect that the SFQR level can be met and the back roughness can be ensured by the removal amount of the alkali corrosion.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
the invention provides a method for improving flatness and roughness by mixed corrosion, which is used for corroding a silicon wafer with the ground thickness of 770 mu m and comprises the following steps:
A. corrosion by alkali
Corroding 3-6 microns by using a strong base solution with the mass fraction of 45-55% at 75-85 ℃;
B. acid etching
B, adopting a mixed acid solution of nitric acid, acetic acid and hydrofluoric acid to continuously corrode the silicon wafer treated in the step A at the temperature of 25-35 ℃, wherein the corrosion thickness is 24-27 mu m,
wherein the concentration of the nitric acid solution is 33-35%, the concentration of the acetic acid solution is 21-23%, the concentration of the hydrofluoric acid solution is 9-11%, and the volume ratio of the nitric acid solution to the acetic acid solution to the hydrofluoric acid solution to water is 2-3: 1-2: 0.5-1.5: 2-3.
Preferably, the silicon wafer is ground by ball-milling cast iron, the grinding amount is 65 +/-1 mu m, and the thickness of the silicon wafer before grinding is 835 mu m.
Preferably, the alkali etching thickness is 6 μm and the acid etching thickness is 24 μm. Experiments verify that when the alkali corrosion removal amount is 6um and the acid corrosion removal amount is 24um, optimization can be achieved, the roughness is below 190nm, the SFQR is about 0.11um (figures 3 and 4), and the highest standards of two key performance parameters of the substrate silicon wafer in the industry at present can be just met. Meanwhile, no abnormal change was confirmed under the corrosion appearance spotlight, and no other abnormal change was observed on the surface of the substrate silicon wafer on the premise of substantially improving the SFQR level (fig. 5).
Preferably, in the step A, the strong alkali solution is NaOH solution, the concentration of the NaOH solution is 49%, and the alkali corrosion temperature is preferably 80 +/-0.5 ℃; in the step B, the acid corrosion temperature is 30 +/-1 ℃.
Preferably, in the step B, the volume ratio of the nitric acid solution, the acetic acid solution, the hydrofluoric acid solution and the water is preferably 2.76:1.95:1: 2.85.
The invention has the following beneficial guarantee and effects:
the method disclosed by the invention has the following effects that 3-6 microns are corroded by alkali, and 24-27 microns are corroded by acid: the corrosion effect of the acid corrosion and the alkali corrosion on the surface of the silicon wafer is different, and after the acid corrosion treatment is carried out after the alkali corrosion, the surface state of the silicon wafer can be improved, and stains and liquid medicine residues can be reduced; in addition, since the alkali corrosion is unfavorable for the roughness, the alkali corrosion and the acid corrosion can play a role in improving the surface roughness of the silicon wafer to a certain extent, the metal removing capability of the alkali corrosion is not as good as that of the acid corrosion, and the alkali corrosion and the acid corrosion are also a guarantee for the metal removing capability.
Compared with the prior art, the invention improves the SFQR from the other direction by adjusting and reducing the removal amount of acid corrosion and increasing the removal amount of alkali corrosion, essentially improves the level of polishing the SFQR, improves the SFQR and simultaneously considers the improvement of the roughness of the back surface, can simultaneously meet the requirements of the roughness of the back surface being less than 190nm and the flatness being less than 0.12um, has high practicability and provides a new direction and thought for the improvement of the flatness SFQR and the roughness of the substrate polishing sheet in the semiconductor industry.
Drawings
FIG. 1 is a schematic diagram of the backside roughness microstructure (Sa: 272.075nm) of a conventional semiconductor chip in the industry at present;
FIG. 2 is a schematic diagram of an SFQR test failure area of a conventional semiconductor chip in the current industry;
FIG. 3 is a box diagram illustrating the correspondence between different mixed etching processes and the semiconductor chip flatness SFQR in accordance with the present invention;
FIG. 4 is a box diagram illustrating the correspondence between different mixed etching processes and the roughness of the back surface of the semiconductor chip in the present invention;
FIG. 5 is a schematic view (Sa: 187.934nm) showing the microstructure of the roughness of the back surface of the semiconductor chip when the amount of the alkali etching removed is 6 μm and the amount of the acid etching removed is 24 μm in the present invention;
FIG. 6 is a picture showing the appearance of a semiconductor chip in which the amount of alkali etching removed is 6 μm and the amount of acid etching removed is 24 μm according to the present invention;
fig. 7 is a picture of the appearance of a conventional semiconductor chip under the current acid etching condition.
Detailed Description
The following embodiments are implemented on the premise of the technical scheme of the present invention, and give detailed implementation modes and specific operation procedures, but the protection scope of the present invention is not limited to the following embodiments.
Unless otherwise specified, the concentrations of the agents of the present invention are expressed in mass fractions.
Example 1 relationship between the amount of alkali etching removed and the flatness SFQR and roughness
At present, the conventional removal amount of pure acid etching is about 30 mu m. In this example, the experiment of increasing the amount of the alkali etching removed with 3 μm as a step was conducted, and the amount of the acid etching removed was reduced, but the total amount of the acid etching removed was maintained at 30 μm, which is the total amount of the conventional etching removed.
In this example, a silicon wafer with a ground thickness of 770 μm was etched, six experimental groups of 0+30 μm, 3+27 μm, 6+24 μm, 9+21 μm, 12+18 μm, and 15+15 μm were provided, and at least three parallel tests were provided for each group.
The thickness of the silicon wafer before grinding is 835 μm, and the silicon wafer is ground by ball-milling cast iron with the grinding amount of 65 +/-1 μm.
When mixed corrosion is carried out, the adopted process conditions are as follows:
A. corrosion by alkali
Corroding a damage layer with corresponding thickness by adopting a NaOH solution with the mass fraction of 49% at the temperature of 80 +/-0.5 ℃ according to each group of experimental arrangement;
B. acid etching
And D, continuously corroding the silicon wafer treated in the step A at the temperature of 30 +/-1 ℃ by adopting a mixed acid solution of nitric acid, acetic acid and hydrofluoric acid, and corroding the damage layer with the corresponding thickness. Wherein the concentration of the nitric acid solution is 33-35%, the concentration of the acetic acid solution is 21-23%, the concentration of the hydrofluoric acid solution is 9-11%, and the volume ratio of the nitric acid solution to the acetic acid solution to the hydrofluoric acid solution to water is 2.76:1.95:1: 2.85.
After the corrosion is finished, carrying out roughness test on each group; and then, polishing and other subsequent treatments are carried out on the experimental silicon wafer according to the normal processing flow of the silicon wafer, wherein the processing flow is determined by the same procedure of a unified machine, and after all the flows are processed, the SFQR level test of the flatness is carried out. The flatness SFQR levels for each experimental group are shown in table 1 and fig. 3, and the roughness levels are shown in table 2 and fig. 4:
TABLE 1 silicon wafer flatness SFQR levels under different mixed corrosion conditions
TABLE 2 roughness levels of the backside of silicon wafers under different mixed corrosion conditions
| Serial number | Group (mum) | Amount of alkali removed (. mu.m) | Amount of acid removed (. mu.m) | Roughness (nm) |
| 1 | 0+30 | 0 | 30 | 140 |
| 2 | 3+27 | 3 | 27 | 160 |
| 3 | 6+24 | 6 | 24 | 190 |
| 4 | 9+21 | 9 | 21 | 230 |
| 5 | 12+18 | 12 | 18 | 250 |
| 6 | 15+15 | 15 | 15 | 280 |
According to the data, the SFQR level is substantially improved along with the increase of the removal amount of the alkali corrosion, and the improvement degree is far greater than that of the polishing engineering; but with a consequent deterioration of the roughness of the back surface: the average deterioration of the roughness of the back surface is about 10nm when the amount of alkali etching is increased by 1 μm, and the increase in the amount of alkali etching removal is accompanied by the optimization of SFQR and the deterioration of the roughness.
When the alkali corrosion removal amount is 6 μm and the acid corrosion removal amount is 24 μm, the optimization can be achieved, the roughness is below 190nm (figure 5), and the SFQR is about 0.11um, so that the highest standard of two key performance parameters of the substrate silicon wafer in the industry at present can be met.
Comparing fig. 6 and 7, the etching appearance was observed under a spotlight after changing the conventional etching process to 6 μm for alkali etching removal and 24 μm for acid etching removal, without any abnormal change. Namely, the pure acid etching is adjusted to mixed etching, and other abnormal changes are not seen on the surface of the substrate silicon wafer on the premise of essentially improving the SFQR level.
While the preferred embodiments of the present invention have been described in detail, it will be understood by those skilled in the art that the invention is not limited thereto, and that various changes and modifications may be made without departing from the spirit of the invention, and the scope of the appended claims is to be accorded the full scope of the invention.
Claims (7)
1. A method for improving flatness and roughness by mixed etching is characterized in that a silicon wafer with the thickness of 770 μm after grinding is etched, and comprises the following steps:
A. corrosion by alkali
Corroding 3-6 microns by using a strong base solution with the mass fraction of 45-55% at 75-85 ℃;
B. acid etching
B, adopting a mixed acid solution of nitric acid, acetic acid and hydrofluoric acid to continuously corrode the silicon wafer treated in the step A at the temperature of 25-35 ℃, wherein the corrosion thickness is 24-27 mu m,
wherein the concentration of the nitric acid solution is 33-35%, the concentration of the acetic acid solution is 21-23%, the concentration of the hydrofluoric acid solution is 9-11%, and the volume ratio of the nitric acid solution, the acetic acid solution, the hydrofluoric acid solution and the water is 2-3: 1-2: 0.5-1.5: 2-3.
2. The method of claim 1, wherein the etching process comprises:
the silicon wafer is ground by ball-milling cast iron, the grinding amount is 65 +/-1 mu m, and the thickness of the silicon wafer before grinding is 835 mu m.
3. The method of claim 1, wherein the etching process comprises:
wherein the thickness of the alkali etching is 6 μm, and the thickness of the acid etching is 24 μm.
4. The method of claim 1, wherein the etching process comprises:
in the step A, the strong alkali solution is NaOH solution, and the concentration of the NaOH solution is 49%.
5. The method of claim 1, wherein the etching process comprises:
wherein, in the step A, the alkali corrosion temperature is 80 +/-0.5 ℃.
6. The method of claim 1, wherein the etching process comprises:
wherein, in the step B, the acid corrosion temperature is 30 +/-1 ℃.
7. The method of claim 1, wherein the etching process comprises:
wherein the volume ratio of the nitric acid solution to the acetic acid solution to the hydrofluoric acid solution to the water is 2.76:1.95:1: 2.85.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113539793A (en) * | 2021-07-15 | 2021-10-22 | 江苏晟驰微电子有限公司 | Surface treatment process before feeding of power chip |
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| CN1592970A (en) * | 2001-11-27 | 2005-03-09 | 信越半导体株式会社 | Method of manufacturing bonded wafers |
| CN102021658A (en) * | 2010-12-10 | 2011-04-20 | 天津中环领先材料技术有限公司 | Heavily doped monocrystalline silicon wafer corrosion technique by alkali corrosion before acid corrosion |
| CN109545663A (en) * | 2018-12-12 | 2019-03-29 | 中国电子科技集团公司第四十六研究所 | A kind of silicon corrosion machining process of high flat degree |
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| US20010008807A1 (en) * | 1997-12-09 | 2001-07-19 | Shin-Etsu Handotai Co., Ltd. | Semiconductor wafer processing method and semiconductor wafers produced by the same |
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| JP2002203823A (en) * | 2000-06-29 | 2002-07-19 | Shin Etsu Handotai Co Ltd | Method for processing semiconductor wafer, and semiconductor wafer |
| CN1592970A (en) * | 2001-11-27 | 2005-03-09 | 信越半导体株式会社 | Method of manufacturing bonded wafers |
| CN102021658A (en) * | 2010-12-10 | 2011-04-20 | 天津中环领先材料技术有限公司 | Heavily doped monocrystalline silicon wafer corrosion technique by alkali corrosion before acid corrosion |
| CN109545663A (en) * | 2018-12-12 | 2019-03-29 | 中国电子科技集团公司第四十六研究所 | A kind of silicon corrosion machining process of high flat degree |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113539793A (en) * | 2021-07-15 | 2021-10-22 | 江苏晟驰微电子有限公司 | Surface treatment process before feeding of power chip |
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